claude is gud

author: polwex <polwex@sortug.com> 2025-10-05 21:56:51 +0700
committer: polwex <polwex@sortug.com> 2025-10-05 21:56:51 +0700
commit: fcedfddf00b3f994e4f4e40332ac7fc192c63244 (patch)
tree: 51d38e62c7bdfcc5f9a5e9435fe820c93cfc9a3d /vere/ext/gmp/gen/x86_64-macos
74 files changed, 16973 insertions, 0 deletions
diff --git a/vere/ext/gmp/gen/x86_64-macos/config.h b/vere/ext/gmp/gen/x86_64-macos/config.h
new file mode 100644
index 0000000..c0e4285
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/config.h
@@ -0,0 +1,672 @@
+/* config.h.  Generated from config.in by configure.  */
+/* config.in.  Generated from configure.ac by autoheader.  */
+
+/*
+
+Copyright 1996-2022 Free Software Foundation, Inc.
+
+This file is part of the GNU MP Library.
+
+The GNU MP Library is free software; you can redistribute it and/or modify
+it under the terms of either:
+
+  * the GNU Lesser General Public License as published by the Free
+    Software Foundation; either version 3 of the License, or (at your
+    option) any later version.
+
+or
+
+  * the GNU General Public License as published by the Free Software
+    Foundation; either version 2 of the License, or (at your option) any
+    later version.
+
+or both in parallel, as here.
+
+The GNU MP Library is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received copies of the GNU General Public License and the
+GNU Lesser General Public License along with the GNU MP Library.  If not,
+see https://www.gnu.org/licenses/.
+*/
+
+/* Define if building universal (internal helper macro) */
+/* #undef AC_APPLE_UNIVERSAL_BUILD */
+
+/* The gmp-mparam.h file (a string) the tune program should suggest updating.
+   */
+#define GMP_MPARAM_H_SUGGEST "./mpn/x86_64/coreihwl/gmp-mparam.h"
+
+/* Define to 1 if you have the `alarm' function. */
+#define HAVE_ALARM 1
+
+/* Define to 1 if alloca() works (via gmp-impl.h). */
+#define HAVE_ALLOCA 1
+
+/* Define to 1 if you have <alloca.h> and it should be used (not on Ultrix).
+   */
+#define HAVE_ALLOCA_H 1
+
+/* Define to 1 if the compiler accepts gcc style __attribute__ ((const)) */
+#define HAVE_ATTRIBUTE_CONST 1
+
+/* Define to 1 if the compiler accepts gcc style __attribute__ ((malloc)) */
+#define HAVE_ATTRIBUTE_MALLOC 1
+
+/* Define to 1 if the compiler accepts gcc style __attribute__ ((mode (XX)))
+   */
+#define HAVE_ATTRIBUTE_MODE 1
+
+/* Define to 1 if the compiler accepts gcc style __attribute__ ((noreturn)) */
+#define HAVE_ATTRIBUTE_NORETURN 1
+
+/* Define to 1 if you have the `attr_get' function. */
+/* #undef HAVE_ATTR_GET */
+
+/* Define to 1 if tests/libtests has calling conventions checking for the CPU
+   */
+#define HAVE_CALLING_CONVENTIONS 1
+
+/* Define to 1 if you have the `clock' function. */
+#define HAVE_CLOCK 1
+
+/* Define to 1 if you have the `clock_gettime' function */
+#define HAVE_CLOCK_GETTIME 1
+
+/* Define to 1 if you have the `cputime' function. */
+/* #undef HAVE_CPUTIME */
+
+/* Define to 1 if you have the declaration of `fgetc', and to 0 if you don't.
+   */
+#define HAVE_DECL_FGETC 1
+
+/* Define to 1 if you have the declaration of `fscanf', and to 0 if you don't.
+   */
+#define HAVE_DECL_FSCANF 1
+
+/* Define to 1 if you have the declaration of `optarg', and to 0 if you don't.
+   */
+#define HAVE_DECL_OPTARG 1
+
+/* Define to 1 if you have the declaration of `sys_errlist', and to 0 if you
+   don't. */
+#define HAVE_DECL_SYS_ERRLIST 1
+
+/* Define to 1 if you have the declaration of `sys_nerr', and to 0 if you
+   don't. */
+#define HAVE_DECL_SYS_NERR 1
+
+/* Define to 1 if you have the declaration of `ungetc', and to 0 if you don't.
+   */
+#define HAVE_DECL_UNGETC 1
+
+/* Define to 1 if you have the declaration of `vfprintf', and to 0 if you
+   don't. */
+#define HAVE_DECL_VFPRINTF 1
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#define HAVE_DLFCN_H 1
+
+/* Define one of the following to 1 for the format of a `double'.
+   If your format is not among these choices, or you don't know what it is,
+   then leave all undefined.
+   IEEE_LITTLE_SWAPPED means little endian, but with the two 4-byte halves
+   swapped, as used by ARM CPUs in little endian mode.  */
+/* #undef HAVE_DOUBLE_IEEE_BIG_ENDIAN */
+#define HAVE_DOUBLE_IEEE_LITTLE_ENDIAN 1
+/* #undef HAVE_DOUBLE_IEEE_LITTLE_SWAPPED */
+/* #undef HAVE_DOUBLE_VAX_D */
+/* #undef HAVE_DOUBLE_VAX_G */
+/* #undef HAVE_DOUBLE_CRAY_CFP */
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#define HAVE_FCNTL_H 1
+
+/* Define to 1 if you have the <float.h> header file. */
+#define HAVE_FLOAT_H 1
+
+/* Define to 1 if you have the `getpagesize' function. */
+#define HAVE_GETPAGESIZE 1
+
+/* Define to 1 if you have the `getrusage' function. */
+#define HAVE_GETRUSAGE 1
+
+/* Define to 1 if you have the `getsysinfo' function. */
+/* #undef HAVE_GETSYSINFO */
+
+/* Define to 1 if you have the `gettimeofday' function. */
+#define HAVE_GETTIMEOFDAY 1
+
+/* Define to 1 if the compiler accepts gcc style __attribute__ ((visibility))
+   and __attribute__ ((alias)) */
+/* #undef HAVE_HIDDEN_ALIAS */
+
+/* Define one of these to 1 for the host CPU family.
+   If your CPU is not in any of these families, leave all undefined.
+   For an AMD64 chip, define "x86" in ABI=32, but not in ABI=64. */
+/* #undef HAVE_HOST_CPU_FAMILY_alpha */
+/* #undef HAVE_HOST_CPU_FAMILY_m68k */
+/* #undef HAVE_HOST_CPU_FAMILY_power */
+/* #undef HAVE_HOST_CPU_FAMILY_powerpc */
+/* #undef HAVE_HOST_CPU_FAMILY_x86 */
+#define HAVE_HOST_CPU_FAMILY_x86_64 1
+
+/* Define one of the following to 1 for the host CPU, as per the output of
+   ./config.guess.  If your CPU is not listed here, leave all undefined.  */
+/* #undef HAVE_HOST_CPU_alphaev67 */
+/* #undef HAVE_HOST_CPU_alphaev68 */
+/* #undef HAVE_HOST_CPU_alphaev7 */
+/* #undef HAVE_HOST_CPU_m68020 */
+/* #undef HAVE_HOST_CPU_m68030 */
+/* #undef HAVE_HOST_CPU_m68040 */
+/* #undef HAVE_HOST_CPU_m68060 */
+/* #undef HAVE_HOST_CPU_m68360 */
+/* #undef HAVE_HOST_CPU_powerpc604 */
+/* #undef HAVE_HOST_CPU_powerpc604e */
+/* #undef HAVE_HOST_CPU_powerpc750 */
+/* #undef HAVE_HOST_CPU_powerpc7400 */
+/* #undef HAVE_HOST_CPU_supersparc */
+/* #undef HAVE_HOST_CPU_i386 */
+/* #undef HAVE_HOST_CPU_i586 */
+/* #undef HAVE_HOST_CPU_i686 */
+/* #undef HAVE_HOST_CPU_pentium */
+/* #undef HAVE_HOST_CPU_pentiummmx */
+/* #undef HAVE_HOST_CPU_pentiumpro */
+/* #undef HAVE_HOST_CPU_pentium2 */
+/* #undef HAVE_HOST_CPU_pentium3 */
+/* #undef HAVE_HOST_CPU_pentium4 */
+/* #undef HAVE_HOST_CPU_core2 */
+/* #undef HAVE_HOST_CPU_nehalem */
+/* #undef HAVE_HOST_CPU_westmere */
+/* #undef HAVE_HOST_CPU_sandybridge */
+/* #undef HAVE_HOST_CPU_ivybridge */
+#define HAVE_HOST_CPU_haswell 1
+/* #undef HAVE_HOST_CPU_broadwell */
+/* #undef HAVE_HOST_CPU_skylake */
+/* #undef HAVE_HOST_CPU_silvermont */
+/* #undef HAVE_HOST_CPU_goldmont */
+/* #undef HAVE_HOST_CPU_tremont */
+/* #undef HAVE_HOST_CPU_k8 */
+/* #undef HAVE_HOST_CPU_k10 */
+/* #undef HAVE_HOST_CPU_bulldozer */
+/* #undef HAVE_HOST_CPU_piledriver */
+/* #undef HAVE_HOST_CPU_steamroller */
+/* #undef HAVE_HOST_CPU_excavator */
+/* #undef HAVE_HOST_CPU_zen */
+/* #undef HAVE_HOST_CPU_bobcat */
+/* #undef HAVE_HOST_CPU_jaguar */
+/* #undef HAVE_HOST_CPU_s390_z900 */
+/* #undef HAVE_HOST_CPU_s390_z990 */
+/* #undef HAVE_HOST_CPU_s390_z9 */
+/* #undef HAVE_HOST_CPU_s390_z10 */
+/* #undef HAVE_HOST_CPU_s390_z196 */
+/* #undef HAVE_HOST_CPU_s390_z13 */
+/* #undef HAVE_HOST_CPU_s390_z14 */
+/* #undef HAVE_HOST_CPU_s390_z15 */
+
+/* Define to 1 iff we have a s390 with 64-bit registers.  */
+/* #undef HAVE_HOST_CPU_s390_zarch */
+
+/* Define to 1 if the system has the type `intmax_t'. */
+#define HAVE_INTMAX_T 1
+
+/* Define to 1 if the system has the type `intptr_t'. */
+#define HAVE_INTPTR_T 1
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#define HAVE_INTTYPES_H 1
+
+/* Define to 1 if you have the <invent.h> header file. */
+/* #undef HAVE_INVENT_H */
+
+/* Define to 1 if you have the <langinfo.h> header file. */
+#define HAVE_LANGINFO_H 1
+
+/* Define one of these to 1 for the endianness of `mp_limb_t'.
+   If the endianness is not a simple big or little, or you don't know what
+   it is, then leave both undefined. */
+/* #undef HAVE_LIMB_BIG_ENDIAN */
+#define HAVE_LIMB_LITTLE_ENDIAN 1
+
+/* Define to 1 if you have the `localeconv' function. */
+#define HAVE_LOCALECONV 1
+
+/* Define to 1 if you have the <locale.h> header file. */
+#define HAVE_LOCALE_H 1
+
+/* Define to 1 if the system has the type `long double'. */
+#define HAVE_LONG_DOUBLE 1
+
+/* Define to 1 if the system has the type `long long'. */
+#define HAVE_LONG_LONG 1
+
+/* Define to 1 if you have the <machine/hal_sysinfo.h> header file. */
+/* #undef HAVE_MACHINE_HAL_SYSINFO_H */
+
+/* Define to 1 if you have the <memory.h> header file. */
+#define HAVE_MEMORY_H 1
+
+/* Define to 1 if you have the `memset' function. */
+#define HAVE_MEMSET 1
+
+/* Define to 1 if you have the `mmap' function. */
+#define HAVE_MMAP 1
+
+/* Define to 1 if you have the `mprotect' function. */
+#define HAVE_MPROTECT 1
+
+/* Define to 1 each of the following for which a native (ie. CPU specific)
+    implementation of the corresponding routine exists.  */
+#define HAVE_NATIVE_mpn_add_n 1
+/* #undef HAVE_NATIVE_mpn_add_n_sub_n */
+#define HAVE_NATIVE_mpn_add_nc 1
+/* #undef HAVE_NATIVE_mpn_addaddmul_1msb0 */
+#define HAVE_NATIVE_mpn_addlsh1_n 1
+#define HAVE_NATIVE_mpn_addlsh2_n 1
+#define HAVE_NATIVE_mpn_addlsh_n 1
+#define HAVE_NATIVE_mpn_addlsh1_nc 1
+#define HAVE_NATIVE_mpn_addlsh2_nc 1
+/* #undef HAVE_NATIVE_mpn_addlsh_nc */
+/* #undef HAVE_NATIVE_mpn_addlsh1_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh2_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh1_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh2_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_addlsh1_n_ip2 */
+/* #undef HAVE_NATIVE_mpn_addlsh2_n_ip2 */
+/* #undef HAVE_NATIVE_mpn_addlsh_n_ip2 */
+/* #undef HAVE_NATIVE_mpn_addlsh1_nc_ip2 */
+/* #undef HAVE_NATIVE_mpn_addlsh2_nc_ip2 */
+/* #undef HAVE_NATIVE_mpn_addlsh_nc_ip2 */
+/* #undef HAVE_NATIVE_mpn_addmul_1c */
+#define HAVE_NATIVE_mpn_addmul_2 1
+/* #undef HAVE_NATIVE_mpn_addmul_3 */
+/* #undef HAVE_NATIVE_mpn_addmul_4 */
+/* #undef HAVE_NATIVE_mpn_addmul_5 */
+/* #undef HAVE_NATIVE_mpn_addmul_6 */
+/* #undef HAVE_NATIVE_mpn_addmul_7 */
+/* #undef HAVE_NATIVE_mpn_addmul_8 */
+/* #undef HAVE_NATIVE_mpn_addmul_2s */
+#define HAVE_NATIVE_mpn_and_n 1
+#define HAVE_NATIVE_mpn_andn_n 1
+#define HAVE_NATIVE_mpn_bdiv_dbm1c 1
+#define HAVE_NATIVE_mpn_bdiv_q_1 1
+#define HAVE_NATIVE_mpn_pi1_bdiv_q_1 1
+#define HAVE_NATIVE_mpn_cnd_add_n 1
+#define HAVE_NATIVE_mpn_cnd_sub_n 1
+#define HAVE_NATIVE_mpn_com 1
+#define HAVE_NATIVE_mpn_copyd 1
+#define HAVE_NATIVE_mpn_copyi 1
+#define HAVE_NATIVE_mpn_div_qr_1n_pi1 1
+/* #undef HAVE_NATIVE_mpn_div_qr_2 */
+#define HAVE_NATIVE_mpn_divexact_1 1
+/* #undef HAVE_NATIVE_mpn_divexact_by3c */
+#define HAVE_NATIVE_mpn_divrem_1 1
+/* #undef HAVE_NATIVE_mpn_divrem_1c */
+#define HAVE_NATIVE_mpn_divrem_2 1
+/* #undef HAVE_NATIVE_mpn_gcd_1 */
+#define HAVE_NATIVE_mpn_gcd_11 1
+#define HAVE_NATIVE_mpn_gcd_22 1
+#define HAVE_NATIVE_mpn_hamdist 1
+#define HAVE_NATIVE_mpn_invert_limb 1
+#define HAVE_NATIVE_mpn_ior_n 1
+#define HAVE_NATIVE_mpn_iorn_n 1
+#define HAVE_NATIVE_mpn_lshift 1
+#define HAVE_NATIVE_mpn_lshiftc 1
+/* #undef HAVE_NATIVE_mpn_lshsub_n */
+/* #undef HAVE_NATIVE_mpn_mod_1 */
+#define HAVE_NATIVE_mpn_mod_1_1p 1
+/* #undef HAVE_NATIVE_mpn_mod_1c */
+#define HAVE_NATIVE_mpn_mod_1s_2p 1
+#define HAVE_NATIVE_mpn_mod_1s_4p 1
+#define HAVE_NATIVE_mpn_mod_34lsub1 1
+#define HAVE_NATIVE_mpn_modexact_1_odd 1
+#define HAVE_NATIVE_mpn_modexact_1c_odd 1
+#define HAVE_NATIVE_mpn_mul_1 1
+/* #undef HAVE_NATIVE_mpn_mul_1c */
+#define HAVE_NATIVE_mpn_mul_2 1
+/* #undef HAVE_NATIVE_mpn_mul_3 */
+/* #undef HAVE_NATIVE_mpn_mul_4 */
+/* #undef HAVE_NATIVE_mpn_mul_5 */
+/* #undef HAVE_NATIVE_mpn_mul_6 */
+#define HAVE_NATIVE_mpn_mul_basecase 1
+#define HAVE_NATIVE_mpn_mullo_basecase 1
+#define HAVE_NATIVE_mpn_nand_n 1
+#define HAVE_NATIVE_mpn_nior_n 1
+#define HAVE_NATIVE_mpn_popcount 1
+#define HAVE_NATIVE_mpn_preinv_divrem_1 1
+/* #undef HAVE_NATIVE_mpn_preinv_mod_1 */
+#define HAVE_NATIVE_mpn_redc_1 1
+/* #undef HAVE_NATIVE_mpn_redc_2 */
+#define HAVE_NATIVE_mpn_rsblsh1_n 1
+#define HAVE_NATIVE_mpn_rsblsh2_n 1
+#define HAVE_NATIVE_mpn_rsblsh_n 1
+#define HAVE_NATIVE_mpn_rsblsh1_nc 1
+/* #undef HAVE_NATIVE_mpn_rsblsh2_nc */
+/* #undef HAVE_NATIVE_mpn_rsblsh_nc */
+#define HAVE_NATIVE_mpn_rsh1add_n 1
+#define HAVE_NATIVE_mpn_rsh1add_nc 1
+#define HAVE_NATIVE_mpn_rsh1sub_n 1
+#define HAVE_NATIVE_mpn_rsh1sub_nc 1
+#define HAVE_NATIVE_mpn_rshift 1
+/* #undef HAVE_NATIVE_mpn_sbpi1_bdiv_r */
+#define HAVE_NATIVE_mpn_sqr_basecase 1
+/* #undef HAVE_NATIVE_mpn_sqr_diagonal */
+#define HAVE_NATIVE_mpn_sqr_diag_addlsh1 1
+#define HAVE_NATIVE_mpn_sub_n 1
+#define HAVE_NATIVE_mpn_sub_nc 1
+#define HAVE_NATIVE_mpn_sublsh1_n 1
+#define HAVE_NATIVE_mpn_sublsh2_n 1
+/* #undef HAVE_NATIVE_mpn_sublsh_n */
+/* #undef HAVE_NATIVE_mpn_sublsh1_nc */
+/* #undef HAVE_NATIVE_mpn_sublsh2_nc */
+/* #undef HAVE_NATIVE_mpn_sublsh_nc */
+/* #undef HAVE_NATIVE_mpn_sublsh1_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_sublsh2_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_sublsh_n_ip1 */
+/* #undef HAVE_NATIVE_mpn_sublsh1_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_sublsh2_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_sublsh_nc_ip1 */
+/* #undef HAVE_NATIVE_mpn_submul_1c */
+/* #undef HAVE_NATIVE_mpn_tabselect */
+/* #undef HAVE_NATIVE_mpn_udiv_qrnnd */
+/* #undef HAVE_NATIVE_mpn_udiv_qrnnd_r */
+/* #undef HAVE_NATIVE_mpn_umul_ppmm */
+/* #undef HAVE_NATIVE_mpn_umul_ppmm_r */
+#define HAVE_NATIVE_mpn_xor_n 1
+#define HAVE_NATIVE_mpn_xnor_n 1
+
+/* Define to 1 if you have the `nl_langinfo' function. */
+#define HAVE_NL_LANGINFO 1
+
+/* Define to 1 if you have the <nl_types.h> header file. */
+#define HAVE_NL_TYPES_H 1
+
+/* Define to 1 if you have the `obstack_vprintf' function. */
+/* #undef HAVE_OBSTACK_VPRINTF */
+
+/* Define to 1 if you have the `popen' function. */
+#define HAVE_POPEN 1
+
+/* Define to 1 if you have the `processor_info' function. */
+#define HAVE_PROCESSOR_INFO 1
+
+/* Define to 1 if <sys/pstat.h> `struct pst_processor' exists and contains
+   `psp_iticksperclktick'. */
+/* #undef HAVE_PSP_ITICKSPERCLKTICK */
+
+/* Define to 1 if you have the `pstat_getprocessor' function. */
+/* #undef HAVE_PSTAT_GETPROCESSOR */
+
+/* Define to 1 if the system has the type `ptrdiff_t'. */
+#define HAVE_PTRDIFF_T 1
+
+/* Define to 1 if the system has the type `quad_t'. */
+#define HAVE_QUAD_T 1
+
+/* Define to 1 if you have the `raise' function. */
+#define HAVE_RAISE 1
+
+/* Define to 1 if you have the `read_real_time' function. */
+/* #undef HAVE_READ_REAL_TIME */
+
+/* Define to 1 if you have the `sigaction' function. */
+#define HAVE_SIGACTION 1
+
+/* Define to 1 if you have the `sigaltstack' function. */
+#define HAVE_SIGALTSTACK 1
+
+/* Define to 1 if you have the `sigstack' function. */
+/* #undef HAVE_SIGSTACK */
+
+/* Tune directory speed_cyclecounter, undef=none, 1=32bits, 2=64bits) */
+#define HAVE_SPEED_CYCLECOUNTER 2
+
+/* Define to 1 if you have the <sstream> header file. */
+/* #undef HAVE_SSTREAM */
+
+/* Define to 1 if the system has the type `stack_t'. */
+#define HAVE_STACK_T 1
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#define HAVE_STDINT_H 1
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#define HAVE_STDLIB_H 1
+
+/* Define to 1 if the system has the type `std::locale'. */
+/* #undef HAVE_STD__LOCALE */
+
+/* Define to 1 if you have the `strchr' function. */
+#define HAVE_STRCHR 1
+
+/* Define to 1 if you have the `strerror' function. */
+#define HAVE_STRERROR 1
+
+/* Define to 1 if you have the <strings.h> header file. */
+#define HAVE_STRINGS_H 1
+
+/* Define to 1 if you have the <string.h> header file. */
+#define HAVE_STRING_H 1
+
+/* Define to 1 if you have the `strnlen' function. */
+#define HAVE_STRNLEN 1
+
+/* Define to 1 if you have the `strtol' function. */
+#define HAVE_STRTOL 1
+
+/* Define to 1 if you have the `strtoul' function. */
+#define HAVE_STRTOUL 1
+
+/* Define to 1 if you have the `sysconf' function. */
+#define HAVE_SYSCONF 1
+
+/* Define to 1 if you have the `sysctl' function. */
+#define HAVE_SYSCTL 1
+
+/* Define to 1 if you have the `sysctlbyname' function. */
+#define HAVE_SYSCTLBYNAME 1
+
+/* Define to 1 if you have the `syssgi' function. */
+/* #undef HAVE_SYSSGI */
+
+/* Define to 1 if you have the <sys/attributes.h> header file. */
+/* #undef HAVE_SYS_ATTRIBUTES_H */
+
+/* Define to 1 if you have the <sys/iograph.h> header file. */
+/* #undef HAVE_SYS_IOGRAPH_H */
+
+/* Define to 1 if you have the <sys/mman.h> header file. */
+#define HAVE_SYS_MMAN_H 1
+
+/* Define to 1 if you have the <sys/param.h> header file. */
+#define HAVE_SYS_PARAM_H 1
+
+/* Define to 1 if you have the <sys/processor.h> header file. */
+/* #undef HAVE_SYS_PROCESSOR_H */
+
+/* Define to 1 if you have the <sys/pstat.h> header file. */
+/* #undef HAVE_SYS_PSTAT_H */
+
+/* Define to 1 if you have the <sys/resource.h> header file. */
+#define HAVE_SYS_RESOURCE_H 1
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#define HAVE_SYS_STAT_H 1
+
+/* Define to 1 if you have the <sys/sysctl.h> header file. */
+#define HAVE_SYS_SYSCTL_H 1
+
+/* Define to 1 if you have the <sys/sysinfo.h> header file. */
+/* #undef HAVE_SYS_SYSINFO_H */
+
+/* Define to 1 if you have the <sys/syssgi.h> header file. */
+/* #undef HAVE_SYS_SYSSGI_H */
+
+/* Define to 1 if you have the <sys/systemcfg.h> header file. */
+/* #undef HAVE_SYS_SYSTEMCFG_H */
+
+/* Define to 1 if you have the <sys/times.h> header file. */
+#define HAVE_SYS_TIMES_H 1
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#define HAVE_SYS_TIME_H 1
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#define HAVE_SYS_TYPES_H 1
+
+/* Define to 1 if you have the `times' function. */
+#define HAVE_TIMES 1
+
+/* Define to 1 if the system has the type `uint_least32_t'. */
+#define HAVE_UINT_LEAST32_T 1
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#define HAVE_UNISTD_H 1
+
+/* Define to 1 if you have the `vsnprintf' function and it works properly. */
+#define HAVE_VSNPRINTF 1
+
+/* Define to 1 for Windos/64 */
+/* #undef HOST_DOS64 */
+
+/* Assembler local label prefix */
+#define LSYM_PREFIX "L"
+
+/* Define to the sub-directory where libtool stores uninstalled libraries. */
+#define LT_OBJDIR ".libs/"
+
+/* Define to 1 to disable the use of inline assembly */
+/* #undef NO_ASM */
+
+/* Name of package */
+#define PACKAGE "gmp"
+
+/* Define to the address where bug reports for this package should be sent. */
+#define PACKAGE_BUGREPORT "gmp-bugs@gmplib.org (see https://gmplib.org/manual/Reporting-Bugs.html)"
+
+/* Define to the full name of this package. */
+#define PACKAGE_NAME "GNU MP"
+
+/* Define to the full name and version of this package. */
+#define PACKAGE_STRING "GNU MP 6.3.0"
+
+/* Define to the one symbol short name of this package. */
+#define PACKAGE_TARNAME "gmp"
+
+/* Define to the home page for this package. */
+#define PACKAGE_URL "http://www.gnu.org/software/gmp/"
+
+/* Define to the version of this package. */
+#define PACKAGE_VERSION "6.3.0"
+
+/* Define as the return type of signal handlers (`int' or `void'). */
+#define RETSIGTYPE void
+
+/* The size of `mp_limb_t', as computed by sizeof. */
+#define SIZEOF_MP_LIMB_T 8
+
+/* The size of `unsigned', as computed by sizeof. */
+#define SIZEOF_UNSIGNED 4
+
+/* The size of `unsigned long', as computed by sizeof. */
+#define SIZEOF_UNSIGNED_LONG 8
+
+/* The size of `unsigned short', as computed by sizeof. */
+#define SIZEOF_UNSIGNED_SHORT 2
+
+/* The size of `void *', as computed by sizeof. */
+#define SIZEOF_VOID_P 8
+
+/* Define to 1 if sscanf requires writable inputs */
+/* #undef SSCANF_WRITABLE_INPUT */
+
+/* Define to 1 if you have the ANSI C header files. */
+#define STDC_HEADERS 1
+
+/* Define to 1 if you can safely include both <sys/time.h> and <time.h>. */
+#define TIME_WITH_SYS_TIME 1
+
+/* Maximum size the tune program can test for SQR_TOOM2_THRESHOLD */
+/* #undef TUNE_SQR_TOOM2_MAX */
+
+/* Version number of package */
+#define VERSION "6.3.0"
+
+/* Define to 1 to enable ASSERT checking, per --enable-assert */
+/* #undef WANT_ASSERT */
+
+/* Define to 1 to enable GMP_CPU_TYPE faking cpuid, per --enable-fake-cpuid */
+/* #undef WANT_FAKE_CPUID */
+
+/* Define to 1 when building a fat binary. */
+/* #undef WANT_FAT_BINARY */
+
+/* Define to 1 to enable FFTs for multiplication, per --enable-fft */
+#define WANT_FFT 1
+
+/* Define to 1 to enable old mpn_mul_fft_full for multiplication, per
+   --enable-old-fft-full */
+/* #undef WANT_OLD_FFT_FULL */
+
+/* Define to 1 if --enable-profiling=gprof */
+/* #undef WANT_PROFILING_GPROF */
+
+/* Define to 1 if --enable-profiling=instrument */
+/* #undef WANT_PROFILING_INSTRUMENT */
+
+/* Define to 1 if --enable-profiling=prof */
+/* #undef WANT_PROFILING_PROF */
+
+/* Define one of these to 1 for the desired temporary memory allocation
+   method, per --enable-alloca. */
+#define WANT_TMP_ALLOCA 1
+/* #undef WANT_TMP_REENTRANT */
+/* #undef WANT_TMP_NOTREENTRANT */
+/* #undef WANT_TMP_DEBUG */
+
+/* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most
+   significant byte first (like Motorola and SPARC, unlike Intel). */
+#if defined AC_APPLE_UNIVERSAL_BUILD
+# if defined __BIG_ENDIAN__
+#  define WORDS_BIGENDIAN 1
+# endif
+#else
+# ifndef WORDS_BIGENDIAN
+/* #  undef WORDS_BIGENDIAN */
+# endif
+#endif
+
+/* Define to 1 if the assembler understands the mulx instruction */
+#define X86_ASM_MULX 1
+
+/* Define to 1 if `lex' declares `yytext' as a `char *' by default, not a
+   `char[]'. */
+#define YYTEXT_POINTER 1
+
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+   calls it, or to nothing if 'inline' is not supported under any name.  */
+#ifndef __cplusplus
+/* #undef inline */
+#endif
+
+/* Define to the equivalent of the C99 'restrict' keyword, or to
+   nothing if this is not supported.  Do not define if restrict is
+   supported directly.  */
+#define restrict __restrict
+/* Work around a bug in Sun C++: it does not support _Restrict or
+   __restrict__, even though the corresponding Sun C compiler ends up with
+   "#define restrict _Restrict" or "#define restrict __restrict__" in the
+   previous line.  Perhaps some future version of Sun C++ will work with
+   restrict; if so, hopefully it defines __RESTRICT like Sun C does.  */
+#if defined __SUNPRO_CC && !defined __RESTRICT
+# define _Restrict
+# define __restrict__
+#endif
+
+/* Define to empty if the keyword `volatile' does not work. Warning: valid
+   code using `volatile' can become incorrect without. Disable with care. */
+/* #undef volatile */
diff --git a/vere/ext/gmp/gen/x86_64-macos/fac_table.h b/vere/ext/gmp/gen/x86_64-macos/fac_table.h
new file mode 100644
index 0000000..6708348
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/fac_table.h
@@ -0,0 +1,49 @@
+/* This file is automatically generated by gen-fac.c */
+
+#if GMP_NUMB_BITS != 64
+Error , error this data is for 64 GMP_NUMB_BITS only
+#endif
+/* This table is 0!,1!,2!,3!,...,n! where n! has <= GMP_NUMB_BITS bits */
+#define ONE_LIMB_FACTORIAL_TABLE CNST_LIMB(0x1),CNST_LIMB(0x1),CNST_LIMB(0x2),CNST_LIMB(0x6),CNST_LIMB(0x18),CNST_LIMB(0x78),CNST_LIMB(0x2d0),CNST_LIMB(0x13b0),CNST_LIMB(0x9d80),CNST_LIMB(0x58980),CNST_LIMB(0x375f00),CNST_LIMB(0x2611500),CNST_LIMB(0x1c8cfc00),CNST_LIMB(0x17328cc00),CNST_LIMB(0x144c3b2800),CNST_LIMB(0x13077775800),CNST_LIMB(0x130777758000),CNST_LIMB(0x1437eeecd8000),CNST_LIMB(0x16beecca730000),CNST_LIMB(0x1b02b9306890000),CNST_LIMB(0x21c3677c82b40000)
+
+/* This table is 0!,1!,2!/2,3!/2,...,n!/2^sn where n!/2^sn is an */
+/* odd integer for each n, and n!/2^sn has <= GMP_NUMB_BITS bits */
+#define ONE_LIMB_ODD_FACTORIAL_TABLE CNST_LIMB(0x1),CNST_LIMB(0x1),CNST_LIMB(0x1),CNST_LIMB(0x3),CNST_LIMB(0x3),CNST_LIMB(0xf),CNST_LIMB(0x2d),CNST_LIMB(0x13b),CNST_LIMB(0x13b),CNST_LIMB(0xb13),CNST_LIMB(0x375f),CNST_LIMB(0x26115),CNST_LIMB(0x7233f),CNST_LIMB(0x5cca33),CNST_LIMB(0x2898765),CNST_LIMB(0x260eeeeb),CNST_LIMB(0x260eeeeb),CNST_LIMB(0x286fddd9b),CNST_LIMB(0x16beecca73),CNST_LIMB(0x1b02b930689),CNST_LIMB(0x870d9df20ad),CNST_LIMB(0xb141df4dae31),CNST_LIMB(0x79dd498567c1b),CNST_LIMB(0xaf2e19afc5266d),CNST_LIMB(0x20d8a4d0f4f7347),CNST_LIMB(0x335281867ec241ef)
+#define ODD_FACTORIAL_TABLE_MAX CNST_LIMB(0x335281867ec241ef)
+#define ODD_FACTORIAL_TABLE_LIMIT (25)
+
+/* Previous table, continued, values modulo 2^GMP_NUMB_BITS */
+#define ONE_LIMB_ODD_FACTORIAL_EXTTABLE CNST_LIMB(0x9b3093d46fdd5923),CNST_LIMB(0x5e1f9767cc5866b1),CNST_LIMB(0x92dd23d6966aced7),CNST_LIMB(0xa30d0f4f0a196e5b),CNST_LIMB(0x8dc3e5a1977d7755),CNST_LIMB(0x2ab8ce915831734b),CNST_LIMB(0x2ab8ce915831734b),CNST_LIMB(0x81d2a0bc5e5fdcab),CNST_LIMB(0x9efcac82445da75b),CNST_LIMB(0xbc8b95cf58cde171),CNST_LIMB(0xa0e8444a1f3cecf9),CNST_LIMB(0x4191deb683ce3ffd),CNST_LIMB(0xddd3878bc84ebfc7),CNST_LIMB(0xcb39a64b83ff3751),CNST_LIMB(0xf8203f7993fc1495),CNST_LIMB(0xbd2a2a78b35f4bdd),CNST_LIMB(0x84757be6b6d13921),CNST_LIMB(0x3fbbcfc0b524988b),CNST_LIMB(0xbd11ed47c8928df9),CNST_LIMB(0x3c26b59e41c2f4c5),CNST_LIMB(0x677a5137e883fdb3),CNST_LIMB(0xff74e943b03b93dd),CNST_LIMB(0xfe5ebbcb10b2bb97),CNST_LIMB(0xb021f1de3235e7e7),CNST_LIMB(0x33509eb2e743a58f),CNST_LIMB(0x390f9da41279fb7d),CNST_LIMB(0xe5cb0154f031c559),CNST_LIMB(0x93074695ba4ddb6d),CNST_LIMB(0x81c471caa636247f),CNST_LIMB(0xe1347289b5a1d749),CNST_LIMB(0x286f21c3f76ce2ff),CNST_LIMB(0xbe84a2173e8ac7),CNST_LIMB(0x1595065ca215b88b),CNST_LIMB(0xf95877595b018809),CNST_LIMB(0x9c2efe3c5516f887),CNST_LIMB(0x373294604679382b),CNST_LIMB(0xaf1ff7a888adcd35),CNST_LIMB(0x18ddf279a2c5800b),CNST_LIMB(0x18ddf279a2c5800b),CNST_LIMB(0x505a90e2542582cb),CNST_LIMB(0x5bacad2cd8d5dc2b),CNST_LIMB(0xfe3152bcbff89f41)
+#define ODD_FACTORIAL_EXTTABLE_LIMIT (67)
+
+/* This table is 1!!,3!!,...,(2n+1)!! where (2n+1)!! has <= GMP_NUMB_BITS bits */
+#define ONE_LIMB_ODD_DOUBLEFACTORIAL_TABLE CNST_LIMB(0x1),CNST_LIMB(0x3),CNST_LIMB(0xf),CNST_LIMB(0x69),CNST_LIMB(0x3b1),CNST_LIMB(0x289b),CNST_LIMB(0x20fdf),CNST_LIMB(0x1eee11),CNST_LIMB(0x20dcf21),CNST_LIMB(0x27065f73),CNST_LIMB(0x33385d46f),CNST_LIMB(0x49a10615f9),CNST_LIMB(0x730b9982551),CNST_LIMB(0xc223930bef8b),CNST_LIMB(0x15fe07a85a22bf),CNST_LIMB(0x2a9c2ed62ea3521),CNST_LIMB(0x57e22099c030d941)
+#define ODD_DOUBLEFACTORIAL_TABLE_MAX CNST_LIMB(0x57e22099c030d941)
+#define ODD_DOUBLEFACTORIAL_TABLE_LIMIT (33)
+
+/* This table x_1, x_2,... contains values s.t. x_n^n has <= GMP_NUMB_BITS bits */
+#define NTH_ROOT_NUMB_MASK_TABLE (GMP_NUMB_MASK),CNST_LIMB(0xffffffff),CNST_LIMB(0x285145),CNST_LIMB(0xffff),CNST_LIMB(0x1bdb),CNST_LIMB(0x659),CNST_LIMB(0x235),CNST_LIMB(0xff)
+
+/* This table contains inverses of odd factorials, modulo 2^GMP_NUMB_BITS */
+
+/* It begins with (2!/2)^-1=1 */
+#define ONE_LIMB_ODD_FACTORIAL_INVERSES_TABLE CNST_LIMB(0x1),CNST_LIMB(0xaaaaaaaaaaaaaaab),CNST_LIMB(0xaaaaaaaaaaaaaaab),CNST_LIMB(0xeeeeeeeeeeeeeeef),CNST_LIMB(0x4fa4fa4fa4fa4fa5),CNST_LIMB(0x2ff2ff2ff2ff2ff3),CNST_LIMB(0x2ff2ff2ff2ff2ff3),CNST_LIMB(0x938cc70553e3771b),CNST_LIMB(0xb71c27cddd93e49f),CNST_LIMB(0xb38e3229fcdee63d),CNST_LIMB(0xe684bb63544a4cbf),CNST_LIMB(0xc2f684917ca340fb),CNST_LIMB(0xf747c9cba417526d),CNST_LIMB(0xbb26eb51d7bd49c3),CNST_LIMB(0xbb26eb51d7bd49c3),CNST_LIMB(0xb0a7efb985294093),CNST_LIMB(0xbe4b8c69f259eabb),CNST_LIMB(0x6854d17ed6dc4fb9),CNST_LIMB(0xe1aa904c915f4325),CNST_LIMB(0x3b8206df131cead1),CNST_LIMB(0x79c6009fea76fe13),CNST_LIMB(0xd8c5d381633cd365),CNST_LIMB(0x4841f12b21144677),CNST_LIMB(0x4a91ff68200b0d0f),CNST_LIMB(0x8f9513a58c4f9e8b),CNST_LIMB(0x2b3e690621a42251),CNST_LIMB(0x4f520f00e03c04e7),CNST_LIMB(0x2edf84ee600211d3),CNST_LIMB(0xadcaa2764aaacdfd),CNST_LIMB(0x161f4f9033f4fe63),CNST_LIMB(0x161f4f9033f4fe63),CNST_LIMB(0xbada2932ea4d3e03),CNST_LIMB(0xcec189f3efaa30d3),CNST_LIMB(0xf7475bb68330bf91),CNST_LIMB(0x37eb7bf7d5b01549),CNST_LIMB(0x46b35660a4e91555),CNST_LIMB(0xa567c12d81f151f7),CNST_LIMB(0x4c724007bb2071b1),CNST_LIMB(0xf4a0cce58a016bd),CNST_LIMB(0xfa21068e66106475),CNST_LIMB(0x244ab72b5a318ae1),CNST_LIMB(0x366ce67e080d0f23),CNST_LIMB(0xd666fdae5dd2a449),CNST_LIMB(0xd740ddd0acc06a0d),CNST_LIMB(0xb050bbbb28e6f97b),CNST_LIMB(0x70b003fe890a5c75),CNST_LIMB(0xd03aabff83037427),CNST_LIMB(0x13ec4ca72c783bd7),CNST_LIMB(0x90282c06afdbd96f),CNST_LIMB(0x4414ddb9db4a95d5),CNST_LIMB(0xa2c68735ae6832e9),CNST_LIMB(0xbf72d71455676665),CNST_LIMB(0xa8469fab6b759b7f),CNST_LIMB(0xc1e55b56e606caf9),CNST_LIMB(0x40455630fc4a1cff),CNST_LIMB(0x120a7b0046d16f7),CNST_LIMB(0xa7c3553b08faef23),CNST_LIMB(0x9f0bfd1b08d48639),CNST_LIMB(0xa433ffce9a304d37),CNST_LIMB(0xa22ad1d53915c683),CNST_LIMB(0xcb6cbc723ba5dd1d),CNST_LIMB(0x547fb1b8ab9d0ba3),CNST_LIMB(0x547fb1b8ab9d0ba3),CNST_LIMB(0x8f15a826498852e3)
+
+/* This table contains 2n-popc(2n) for small n */
+
+/* It begins with 2-1=1 (n=1) */
+#define TABLE_2N_MINUS_POPC_2N 1,3,4,7,8,10,11,15,16,18,19,22,23,25,26,31,32,34,35,38,39,41,42,46,47,49,50,53,54,56,57,63,64,66,67,70,71,73,74,78
+#define TABLE_LIMIT_2N_MINUS_POPC_2N 81
+#define ODD_CENTRAL_BINOMIAL_OFFSET (13)
+
+/* This table contains binomial(2k,k)/2^t */
+
+/* It begins with ODD_CENTRAL_BINOMIAL_TABLE_MIN */
+#define ONE_LIMB_ODD_CENTRAL_BINOMIAL_TABLE CNST_LIMB(0x13d66b),CNST_LIMB(0x4c842f),CNST_LIMB(0x93ee7d),CNST_LIMB(0x11e9e123),CNST_LIMB(0x22c60053),CNST_LIMB(0x873ae4d1),CNST_LIMB(0x10757bd97),CNST_LIMB(0x80612c6cd),CNST_LIMB(0xfaa556bc1),CNST_LIMB(0x3d3cc24821),CNST_LIMB(0x77cfeb6bbb),CNST_LIMB(0x7550ebd97c7),CNST_LIMB(0xe5f08695caf),CNST_LIMB(0x386120ffce11),CNST_LIMB(0x6eabb28dd6df),CNST_LIMB(0x3658e31c82a8f),CNST_LIMB(0x6ad2050312783),CNST_LIMB(0x1a42902a5af0bf),CNST_LIMB(0x33ac44f881661d),CNST_LIMB(0xcb764f927d82123),CNST_LIMB(0x190c23fa46b93983),CNST_LIMB(0x62b7609e25caf1b9),CNST_LIMB(0xc29cb72925ef2cff)
+#define ODD_CENTRAL_BINOMIAL_TABLE_LIMIT (35)
+
+/* This table contains the inverses of elements in the previous table. */
+#define ONE_LIMB_ODD_CENTRAL_BINOMIAL_INVERSE_TABLE CNST_LIMB(0x61e5bd199bb12643),CNST_LIMB(0x78321494dc8342cf),CNST_LIMB(0x4fd348704ebf7ad5),CNST_LIMB(0x7e722ba086ab568b),CNST_LIMB(0xa5fcc124265843db),CNST_LIMB(0x89c4a6b18633f431),CNST_LIMB(0x4daa2c15f8ce9227),CNST_LIMB(0x801c618ca9be9605),CNST_LIMB(0x32dc192f948a441),CNST_LIMB(0xd02b90c2bf3be1),CNST_LIMB(0xd897e8c1749aa173),CNST_LIMB(0x54a234fc01fef9f7),CNST_LIMB(0x83ff2ab4d1ff7a4f),CNST_LIMB(0xa427f1c9b304e2f1),CNST_LIMB(0x9c14595d1793651f),CNST_LIMB(0x883a71c607a7b46f),CNST_LIMB(0xd089863c54bc9f2b),CNST_LIMB(0x9022f6bce5d07f3f),CNST_LIMB(0xbec207e218768c35),CNST_LIMB(0x9d70cb4cbb4f168b),CNST_LIMB(0x3c3d3403828a9d2b),CNST_LIMB(0x7672df58c56bc489),CNST_LIMB(0x1e66ca55d727d2ff)
+
+/* This table contains the values t in the formula binomial(2k,k)/2^t */
+#define CENTRAL_BINOMIAL_2FAC_TABLE 3,3,4,1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,1,2,2,3
diff --git a/vere/ext/gmp/gen/x86_64-macos/fib_table.h b/vere/ext/gmp/gen/x86_64-macos/fib_table.h
new file mode 100644
index 0000000..66ac4d6
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/fib_table.h
@@ -0,0 +1,8 @@
+/* This file generated by gen-fib.c - DO NOT EDIT. */
+
+#if GMP_NUMB_BITS != 64
+Error, error, this data is for 64 bits
+#endif
+
+#define FIB_TABLE_LIMIT         93
+#define FIB_TABLE_LUCNUM_LIMIT  92
diff --git a/vere/ext/gmp/gen/x86_64-macos/mp_bases.h b/vere/ext/gmp/gen/x86_64-macos/mp_bases.h
new file mode 100644
index 0000000..08ede78
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mp_bases.h
@@ -0,0 +1,13 @@
+/* This file generated by gen-bases.c - DO NOT EDIT. */
+
+#if GMP_NUMB_BITS != 64
+Error, error, this data is for 64 bits
+#endif
+
+/* mp_bases[10] data, as literal values */
+#define MP_BASES_CHARS_PER_LIMB_10      19
+#define MP_BASES_BIG_BASE_CTZ_10        19
+#define MP_BASES_BIG_BASE_10            CNST_LIMB(0x8ac7230489e80000)
+#define MP_BASES_BIG_BASE_INVERTED_10   CNST_LIMB(0xd83c94fb6d2ac34a)
+#define MP_BASES_BIG_BASE_BINVERTED_10  CNST_LIMB(0x26b172506559ce15)
+#define MP_BASES_NORMALIZATION_STEPS_10 0
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/add_err1_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err1_n.s
new file mode 100644
index 0000000..4bb4f97
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err1_n.s
@@ -0,0 +1,237 @@
+
+
+
+
+
+
+
+
+
+
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+
+
+
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+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_add_err1_n
+	
+	
+___gmpn_add_err1_n:
+
+	mov	8(%rsp), %rax
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+
+	lea	(%rsi,%r9,8), %rsi
+	lea	(%rdx,%r9,8), %rdx
+	lea	(%rdi,%r9,8), %rdi
+
+	mov	%r9d, %r10d
+	and	$3, %r10d
+	jz	L0mod4
+	cmp	$2, %r10d
+	jc	L1mod4
+	jz	L2mod4
+L3mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	xor	%r10d, %r10d
+	xor	%r11d, %r11d
+	lea	-24(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	mov	8(%rsi,%r9,8), %r15
+	adc	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	16(%r8), %rbx
+	adc	8(%rdx,%r9,8), %r15
+	mov	%r15, 8(%rdi,%r9,8)
+	cmovc	8(%r8), %r10
+	mov	16(%rsi,%r9,8), %r14
+	adc	16(%rdx,%r9,8), %r14
+	mov	%r14, 16(%rdi,%r9,8)
+	cmovc	(%r8), %r11
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+	add	%r11, %rbx
+	adc	$0, %rbp
+
+	add	$3, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	4, 0x90
+L0mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	lea	(%r8,%r9,8), %r8
+	neg	%r9
+	jmp	Lloop
+
+	.align	4, 0x90
+L1mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	lea	-8(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	adc	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	(%r8), %rbx
+	setc	%al		   
+
+	add	$1, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	4, 0x90
+L2mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	xor	%r10d, %r10d
+	lea	-16(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	mov	8(%rsi,%r9,8), %r15
+	adc	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	8(%r8), %rbx
+	adc	8(%rdx,%r9,8), %r15
+	mov	%r15, 8(%rdi,%r9,8)
+	cmovc	(%r8), %r10
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+
+	add	$2, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	5, 0x90
+Lloop:
+	mov	(%rsi,%r9,8), %r14
+	shr	$1, %al		   
+	mov	-8(%r8), %r10
+	mov	$0, %r13d
+	adc	(%rdx,%r9,8), %r14
+	cmovnc	%r13, %r10
+	mov	%r14, (%rdi,%r9,8)
+	mov	8(%rsi,%r9,8), %r15
+	mov	16(%rsi,%r9,8), %r14
+	adc	8(%rdx,%r9,8), %r15
+	mov	-16(%r8), %r11
+	cmovnc	%r13, %r11
+	mov	-24(%r8), %r12
+	mov	%r15, 8(%rdi,%r9,8)
+	adc	16(%rdx,%r9,8), %r14
+	cmovnc	%r13, %r12
+	mov	24(%rsi,%r9,8), %r15
+	adc	24(%rdx,%r9,8), %r15
+	cmovc	-32(%r8), %r13
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+	add	%r11, %rbx
+	adc	$0, %rbp
+	add	%r12, %rbx
+	adc	$0, %rbp
+	lea	-32(%r8), %r8
+	mov	%r14, 16(%rdi,%r9,8)
+	add	%r13, %rbx
+	adc	$0, %rbp
+	add	$4, %r9
+	mov	%r15, -8(%rdi,%r9,8)
+	jnz	Lloop
+
+Lend:
+	mov	%rbx, (%rcx)
+	mov	%rbp, 8(%rcx)
+
+	pop	%r15
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/add_err2_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err2_n.s
new file mode 100644
index 0000000..ba4fb6d
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err2_n.s
@@ -0,0 +1,184 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_add_err2_n
+	
+	
+___gmpn_add_err2_n:
+
+	mov	16(%rsp), %rax
+	mov	8(%rsp), %r10
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+
+	xor	%ebp, %ebp
+	xor	%r11d, %r11d
+	xor	%r12d, %r12d
+	xor	%r13d, %r13d
+
+	sub	%r8, %r9
+
+	lea	(%rdi,%r10,8), %rdi
+	lea	(%rsi,%r10,8), %rsi
+	lea	(%rdx,%r10,8), %rdx
+
+	test	$1, %r10
+	jnz	Lodd
+
+	lea	-8(%r8,%r10,8), %r8
+	neg	%r10
+	jmp	Ltop
+
+	.align	4, 0x90
+Lodd:
+	lea	-16(%r8,%r10,8), %r8
+	neg	%r10
+	shr	$1, %rax
+	mov	(%rsi,%r10,8), %rbx
+	adc	(%rdx,%r10,8), %rbx
+	cmovc	8(%r8), %rbp
+	cmovc	8(%r8,%r9), %r12
+	mov	%rbx, (%rdi,%r10,8)
+	sbb	%rax, %rax
+	inc	%r10
+	jz	Lend
+
+	.align	4, 0x90
+Ltop:
+	mov	(%rsi,%r10,8), %rbx
+	shr	$1, %rax		
+	adc	(%rdx,%r10,8), %rbx
+	mov	%rbx, (%rdi,%r10,8)
+	sbb	%r14, %r14	
+
+	mov	8(%rsi,%r10,8), %rbx
+	adc	8(%rdx,%r10,8), %rbx
+	mov	%rbx, 8(%rdi,%r10,8)
+	sbb	%rax, %rax	
+
+	mov	(%r8), %rbx	
+	and	%r14, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	and	(%r8,%r9), %r14	
+	add	%r14, %r12
+	adc	$0, %r13
+
+	mov	-8(%r8), %rbx	
+	and	%rax, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	mov	-8(%r8,%r9), %rbx	
+	and	%rax, %rbx
+	add	%rbx, %r12
+	adc	$0, %r13
+
+	add	$2, %r10
+	lea	-16(%r8), %r8
+	jnz	Ltop
+Lend:
+
+	mov	%rbp, (%rcx)
+	mov	%r11, 8(%rcx)
+	mov	%r12, 16(%rcx)
+	mov	%r13, 24(%rcx)
+
+	and	$1, %eax	
+
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/add_err3_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err3_n.s
new file mode 100644
index 0000000..3e0e39d
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/add_err3_n.s
@@ -0,0 +1,168 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_add_err3_n
+	
+	
+___gmpn_add_err3_n:
+
+	mov	24(%rsp), %rax
+	mov	16(%rsp), %r10
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+
+	push	%rcx
+	mov	64(%rsp), %rcx       
+
+	xor	%ebp, %ebp
+	xor	%r11d, %r11d
+	xor	%r12d, %r12d
+	xor	%r13d, %r13d
+	xor	%r14d, %r14d
+	xor	%r15d, %r15d
+
+	sub	%r8, %r9
+	sub	%r8, %rcx
+
+	lea	-8(%r8,%r10,8), %r8
+	lea	(%rdi,%r10,8), %rdi
+	lea	(%rsi,%r10,8), %rsi
+	lea	(%rdx,%r10,8), %rdx
+	neg	%r10
+
+	.align	4, 0x90
+Ltop:
+	shr	$1, %rax		
+	mov	(%rsi,%r10,8), %rax
+	adc	(%rdx,%r10,8), %rax
+	mov	%rax, (%rdi,%r10,8)
+	sbb	%rax, %rax		
+
+	mov	(%r8), %rbx
+	and	%rax, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	mov	(%r8,%r9), %rbx
+	and	%rax, %rbx
+	add	%rbx, %r12
+	adc	$0, %r13
+
+	mov	(%r8,%rcx), %rbx
+	and	%rax, %rbx
+	add	%rbx, %r14
+	adc	$0, %r15
+
+	lea	-8(%r8), %r8
+	inc	%r10
+	jnz     Ltop
+
+Lend:
+	and	$1, %eax
+	pop	%rcx
+
+	mov	%rbp, (%rcx)
+	mov	%r11, 8(%rcx)
+	mov	%r12, 16(%rcx)
+	mov	%r13, 24(%rcx)
+	mov	%r14, 32(%rcx)
+	mov	%r15, 40(%rcx)
+
+	pop	%r15
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/add_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/add_n.s
new file mode 100644
index 0000000..84fc0f3
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/add_n.s
@@ -0,0 +1,289 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+	
+	
+	
+	
+
+
+	
+	
+	
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_add_nc
+	
+	
+___gmpn_add_nc:
+
+	
+
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	and	$7, %eax
+
+	lea	Ltab(%rip), %r9
+	neg	%r8			
+
+	movslq	(%r9,%rax,4), %rax
+	lea	(%r9,%rax), %rax	
+	jmp	*%rax
+
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_add_n
+	
+	
+___gmpn_add_n:
+
+	
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	and	$7, %eax		
+
+	lea	Ltab(%rip), %r9
+
+	movslq	(%r9,%rax,4), %rax
+	lea	(%r9,%rax), %rax	
+	jmp	*%rax
+
+
+L0:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	adc	(%rdx), %r8
+	jmp	Le0
+
+L4:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	adc	(%rdx), %r8
+	lea	-32(%rsi), %rsi
+	lea	-32(%rdx), %rdx
+	lea	-32(%rdi), %rdi
+	inc	%rcx
+	jmp	Le4
+
+L5:	mov	(%rsi), %r11
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	adc	(%rdx), %r11
+	lea	-24(%rsi), %rsi
+	lea	-24(%rdx), %rdx
+	lea	-24(%rdi), %rdi
+	inc	%rcx
+	jmp	Le5
+
+L6:	mov	(%rsi), %r10
+	adc	(%rdx), %r10
+	mov	8(%rsi), %r11
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	inc	%rcx
+	jmp	Le6
+
+L7:	mov	(%rsi), %r9
+	mov	8(%rsi), %r10
+	adc	(%rdx), %r9
+	adc	8(%rdx), %r10
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	inc	%rcx
+	jmp	Le7
+
+	.align	4, 0x90
+Ltop:
+Le3:	mov	%r9, 40(%rdi)
+Le2:	mov	%r10, 48(%rdi)
+Le1:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	adc	(%rdx), %r8
+	mov	%r11, 56(%rdi)
+	lea	64(%rdi), %rdi
+Le0:	mov	16(%rsi), %r10
+	adc	8(%rdx), %r9
+	adc	16(%rdx), %r10
+	mov	%r8, (%rdi)
+Le7:	mov	24(%rsi), %r11
+	mov	%r9, 8(%rdi)
+Le6:	mov	32(%rsi), %r8
+	mov	40(%rsi), %r9
+	adc	24(%rdx), %r11
+	mov	%r10, 16(%rdi)
+Le5:	adc	32(%rdx), %r8
+	mov	%r11, 24(%rdi)
+Le4:	mov	48(%rsi), %r10
+	mov	56(%rsi), %r11
+	mov	%r8, 32(%rdi)
+	lea	64(%rsi), %rsi
+	adc	40(%rdx), %r9
+	adc	48(%rdx), %r10
+	adc	56(%rdx), %r11
+	lea	64(%rdx), %rdx
+	dec	%rcx
+	jnz	Ltop
+
+Lend:	mov	%r9, 40(%rdi)
+	mov	%r10, 48(%rdi)
+	mov	%r11, 56(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L3:	mov	(%rsi), %r9
+	mov	8(%rsi), %r10
+	mov	16(%rsi), %r11
+	adc	(%rdx), %r9
+	adc	8(%rdx), %r10
+	adc	16(%rdx), %r11
+	jrcxz	Lx3
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	-40(%rdi), %rdi
+	jmp	Le3
+Lx3:	mov	%r9, (%rdi)
+	mov	%r10, 8(%rdi)
+	mov	%r11, 16(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L1:	mov	(%rsi), %r11
+	adc	(%rdx), %r11
+	jrcxz	Lx1
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	-56(%rdi), %rdi
+	jmp	Le1
+Lx1:	mov	%r11, (%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L2:	mov	(%rsi), %r10
+	mov	8(%rsi), %r11
+	adc	(%rdx), %r10
+	adc	8(%rdx), %r11
+	jrcxz	Lx2
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	-48(%rdi), %rdi
+	jmp	Le2
+Lx2:	mov	%r10, (%rdi)
+	mov	%r11, 8(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh1_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh1_n.s
new file mode 100644
index 0000000..90fca0b
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh1_n.s
@@ -0,0 +1,212 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+	
+	
+	
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_addlsh1_nc
+	
+	
+___gmpn_addlsh1_nc:
+
+	
+
+	push	%rbp
+	mov	%r8, %rax
+	neg	%rax			
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+	mov	%ecx, %r9d
+	and	$3, %r9d
+	je	Lb00
+	cmp	$2, %r9d
+	jc	Lb01
+	je	Lb10
+	jmp	Lb11
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_addlsh1_n
+	
+	
+___gmpn_addlsh1_n:
+
+	
+	push	%rbp
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$63, %r10, %r9
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	adc	16(%rsi), %r9
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, %rbp
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$3, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb01:	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	mov	%rbp, (%rdi)
+	mov	%r8, %rbp
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$1, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb10:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, %rbp
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$2, %rcx
+	ja	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+Lb00:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$63, %r10, %r9
+	mov	24(%rdx), %r11
+	shrd	$63, %r11, %r10
+	lea	32(%rdx), %rdx
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	adc	16(%rsi), %r9
+	adc	24(%rsi), %r10
+	lea	32(%rsi), %rsi
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, 24(%rdi)
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lend:	shr	$63, %rbp
+	add	%eax, %eax	
+	adc	$0, %rbp
+	mov	%rbp, %rax
+	pop	%rbp
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh2_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh2_n.s
new file mode 100644
index 0000000..5d61f82
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh2_n.s
@@ -0,0 +1,214 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+	
+	
+	
+	
+
+
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+
+
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+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_addlsh2_nc
+	
+	
+___gmpn_addlsh2_nc:
+
+	
+
+	push	%rbp
+	mov	%r8, %rax
+	neg	%rax			
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+	mov	%ecx, %r9d
+	and	$3, %r9d
+	je	Lb00
+	cmp	$2, %r9d
+	jc	Lb01
+	je	Lb10
+	jmp	Lb11
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_addlsh2_n
+	
+	
+___gmpn_addlsh2_n:
+
+	
+	push	%rbp
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$62, %r10, %r9
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	adc	16(%rsi), %r9
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, %rbp
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$3, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb01:	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	mov	%rbp, (%rdi)
+	mov	%r8, %rbp
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$1, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb10:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, %rbp
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$2, %rcx
+	ja	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+Lb00:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$62, %r10, %r9
+	mov	24(%rdx), %r11
+	shrd	$62, %r11, %r10
+	lea	32(%rdx), %rdx
+	add	%eax, %eax	
+	adc	(%rsi), %rbp
+	adc	8(%rsi), %r8
+	adc	16(%rsi), %r9
+	adc	24(%rsi), %r10
+	lea	32(%rsi), %rsi
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, 24(%rdi)
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lend:	shr	$62, %rbp
+	add	%eax, %eax	
+	adc	$0, %rbp
+	mov	%rbp, %rax
+	pop	%rbp
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh_n.s
new file mode 100644
index 0000000..f71088e
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/addlsh_n.s
@@ -0,0 +1,269 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
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+
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+
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+
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+
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+
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+
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+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_addlsh_n
+	
+	
+___gmpn_addlsh_n:
+
+	
+
+
+	mov	(%rdx), %r10
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	xor	%r9d, %r9d
+	sub	%r8, %r9
+	and	$7, %eax
+
+	lea	Ltab(%rip), %r11
+
+	movslq	(%r11,%rax,4), %rax
+	add	%r11, %rax
+	jmp	*%rax
+
+
+L0:	lea	32(%rsi), %rsi
+	lea	32(%rdx), %rdx
+	lea	32(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le0
+
+L7:	mov	%r10, %r11
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le7
+
+L6:	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le6
+
+L5:	mov	%r10, %r11
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le5
+
+Lend:	adc	24(%rsi), %rax
+	mov	%rax, -40(%rdi)
+	.byte	0xc4,194,179,0xf7,195
+	adc	%rcx, %rax
+	
+	ret
+
+	.align	5, 0x90
+Ltop:	jrcxz	Lend
+	mov	-32(%rdx), %r10
+	adc	24(%rsi), %rax
+	lea	64(%rsi), %rsi
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -40(%rdi)
+Le0:	dec	%rcx
+	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	-24(%rdx), %r11
+	adc	-32(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, -32(%rdi)
+Le7:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	-16(%rdx), %r10
+	adc	-24(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -24(%rdi)
+Le6:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	-8(%rdx), %r11
+	adc	-16(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, -16(%rdi)
+Le5:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	(%rdx), %r10
+	adc	-8(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -8(%rdi)
+Le4:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	8(%rdx), %r11
+	adc	(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, (%rdi)
+Le3:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	16(%rdx), %r10
+	adc	8(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, 8(%rdi)
+Le2:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	24(%rdx), %r11
+	adc	16(%rsi), %rax
+	lea	64(%rdx), %rdx
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, 16(%rdi)
+	lea	64(%rdi), %rdi
+Le1:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	jmp	Ltop
+
+L4:	xor	%r11d, %r11d
+	jmp	Le4
+
+L3:	mov	%r10, %r11
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le3
+
+L2:	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le2
+
+L1:	mov	%r10, %r11
+	lea	-24(%rsi), %rsi
+	lea	40(%rdx), %rdx
+	lea	40(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le1
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_1.s
new file mode 100644
index 0000000..a53c8bf
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_1.s
@@ -0,0 +1,211 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
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+
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+
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+
+
+
+
+
+
+
+
+
+   
+   
+   
+   
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_addmul_1
+	
+	
+___gmpn_addmul_1:
+
+	
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+
+	mov	%rdx, %rbp
+	mov	%rcx, %rdx
+
+	test	$1, %bpl
+	jnz	Lbx1
+
+Lbx0:	shr	$2, %rbp
+	jc	Lb10
+
+Lb00:	.byte	0xc4,98,147,0xf6,38
+	.byte	0xc4,226,227,0xf6,70,8
+	add	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rdi), %r12
+	mov	8(%rdi), %rcx
+	.byte	0xc4,98,179,0xf6,70,16
+	lea	-16(%rdi), %rdi
+	lea	16(%rsi), %rsi
+	add	%r13, %r12
+	jmp	Llo0
+
+Lbx1:	shr	$2, %rbp
+	jc	Lb11
+
+Lb01:	.byte	0xc4,98,163,0xf6,22
+	jnz	Lgt1
+Ln1:	add	%r11, (%rdi)
+	mov	$0, %eax
+	adc	%r10, %rax
+	jmp	Lret
+
+Lgt1:	.byte	0xc4,98,147,0xf6,102,8
+	.byte	0xc4,226,227,0xf6,70,16
+	lea	24(%rsi), %rsi
+	add	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rdi), %r10
+	mov	8(%rdi), %r12
+	mov	16(%rdi), %rcx
+	lea	-8(%rdi), %rdi
+	add	%r11, %r10
+	jmp	Llo1
+
+Lb11:	.byte	0xc4,226,227,0xf6,6
+	mov	(%rdi), %rcx
+	.byte	0xc4,98,179,0xf6,70,8
+	lea	8(%rsi), %rsi
+	lea	-24(%rdi), %rdi
+	inc	%rbp			
+	add	%rbx, %rcx
+	jmp	Llo3
+
+Lb10:	.byte	0xc4,98,179,0xf6,6
+	.byte	0xc4,98,163,0xf6,86,8
+	lea	-32(%rdi), %rdi
+	mov	$0, %eax
+	clc				
+	jz	Lend			
+
+	.align	4, 0x90
+Ltop:	adc	%rax, %r9
+	lea	32(%rdi), %rdi
+	adc	%r8, %r11
+	.byte	0xc4,98,147,0xf6,102,16
+	mov	(%rdi), %r8
+	.byte	0xc4,226,227,0xf6,70,24
+	lea	32(%rsi), %rsi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	8(%rdi), %r10
+	mov	16(%rdi), %r12
+	add	%r9, %r8
+	mov	24(%rdi), %rcx
+	mov	%r8, (%rdi)
+	adc	%r11, %r10
+Llo1:	.byte	0xc4,98,179,0xf6,6
+	mov	%r10, 8(%rdi)
+	adc	%r13, %r12
+Llo0:	mov	%r12, 16(%rdi)
+	adc	%rbx, %rcx
+Llo3:	.byte	0xc4,98,163,0xf6,86,8
+	mov	%rcx, 24(%rdi)
+	dec	%rbp
+	jnz	Ltop
+
+Lend:	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	32(%rdi), %r8
+	mov	%r10, %rax
+	adc	$0, %rax
+	mov	40(%rdi), %r10
+	add	%r9, %r8
+	mov	%r8, 32(%rdi)
+	adc	%r11, %r10
+	mov	%r10, 40(%rdi)
+	adc	$0, %rax
+
+Lret:	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_2.s b/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_2.s
new file mode 100644
index 0000000..d2b04a9
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/addmul_2.s
@@ -0,0 +1,255 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_addmul_2
+	
+	
+___gmpn_addmul_2:
+
+	
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+
+	mov	(%rcx), %r8
+	mov	8(%rcx), %r9
+
+	mov	%rdx, %r11
+	shr	$2, %r11
+
+	test	$1, %dl
+	jnz	Lbx1
+
+Lbx0:	mov	(%rdi), %r12
+	mov	8(%rdi), %r13
+	test	$2, %dl
+	jnz	Lb10
+
+Lb00:	mov	(%rsi), %rdx
+	lea	16(%rsi), %rsi
+	.byte	0xc4,194,251,0xf6,200
+	add	%rax, %r12
+	.byte	0xc4,194,251,0xf6,233
+	adc	$0, %rcx
+	mov	%r12, (%rdi)
+	add	%rax, %r13
+	adc	$0, %rbp
+	mov	-8(%rsi), %rdx
+	lea	16(%rdi), %rdi
+	jmp	Llo0
+
+Lb10:	mov	(%rsi), %rdx
+	inc	%r11
+	.byte	0xc4,194,251,0xf6,200
+	add	%rax, %r12
+	adc	$0, %rcx
+	.byte	0xc4,194,251,0xf6,233
+	mov	%r12, (%rdi)
+	mov	16(%rdi), %r12
+	add	%rax, %r13
+	adc	$0, %rbp
+	xor	%rbx, %rbx
+	jmp	Llo2
+
+Lbx1:	mov	(%rdi), %r13
+	mov	8(%rdi), %r12
+	test	$2, %dl
+	jnz	Lb11
+
+Lb01:	mov	(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r13
+	adc	$0, %r10
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r12
+	adc	$0, %rbx
+	mov	8(%rsi), %rdx
+	mov	%r13, (%rdi)
+	mov	16(%rdi), %r13
+	.byte	0xc4,194,251,0xf6,200
+	lea	24(%rdi), %rdi
+	lea	24(%rsi), %rsi
+	jmp	Llo1
+
+Lb11:	mov	(%rsi), %rdx
+	inc	%r11
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r13
+	adc	$0, %r10
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r12
+	adc	$0, %rbx
+	mov	%r13, (%rdi)
+	mov	8(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,200
+	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltop:	.byte	0xc4,66,251,0xf6,208
+	add	%rbx, %r13
+	adc	$0, %rbp
+	add	%rax, %r13
+	adc	$0, %r10
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r12
+	adc	$0, %rbx
+	lea	32(%rdi), %rdi
+	add	%rcx, %r13
+	mov	-16(%rsi), %rdx
+	mov	%r13, -24(%rdi)
+	adc	$0, %r10
+	add	%rbp, %r12
+	mov	-8(%rdi), %r13
+	.byte	0xc4,194,251,0xf6,200
+	adc	$0, %rbx
+Llo1:	add	%rax, %r12
+	.byte	0xc4,194,251,0xf6,233
+	adc	$0, %rcx
+	add	%r10, %r12
+	mov	%r12, -16(%rdi)
+	adc	$0, %rcx
+	add	%rax, %r13
+	adc	$0, %rbp
+	add	%rbx, %r13
+	mov	-8(%rsi), %rdx
+	adc	$0, %rbp
+Llo0:	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r13
+	adc	$0, %r10
+	mov	(%rdi), %r12
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r12
+	adc	$0, %rbx
+	add	%rcx, %r13
+	mov	%r13, -8(%rdi)
+	adc	$0, %r10
+	mov	(%rsi), %rdx
+	add	%rbp, %r12
+	.byte	0xc4,194,251,0xf6,200
+	adc	$0, %rbx
+Llo3:	add	%rax, %r12
+	adc	$0, %rcx
+	.byte	0xc4,194,251,0xf6,233
+	add	%r10, %r12
+	mov	8(%rdi), %r13
+	mov	%r12, (%rdi)
+	mov	16(%rdi), %r12
+	adc	$0, %rcx
+	add	%rax, %r13
+	adc	$0, %rbp
+Llo2:	mov	8(%rsi), %rdx
+	lea	32(%rsi), %rsi
+	dec	%r11
+	jnz	Ltop
+
+Lend:	.byte	0xc4,66,251,0xf6,208
+	add	%rbx, %r13
+	adc	$0, %rbp
+	add	%rax, %r13
+	adc	$0, %r10
+	.byte	0xc4,194,235,0xf6,193
+	add	%rcx, %r13
+	mov	%r13, 8(%rdi)
+	adc	$0, %r10
+	add	%rbp, %rdx
+	adc	$0, %rax
+	add	%r10, %rdx
+	mov	%rdx, 16(%rdi)
+	adc	$0, %rax
+
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/and_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/and_n.s
new file mode 100644
index 0000000..bb75a2c
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/and_n.s
@@ -0,0 +1,158 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_and_n
+	
+	
+___gmpn_and_n:
+
+	
+	mov	(%rdx), %r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	and	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	and	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+Lb00:	mov	8(%rdx), %r9
+	and	(%rsi), %r8
+	and	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+Le10:	mov	24(%rdx), %r9
+	lea	32(%rdx), %rdx
+	and	16(%rsi), %r8
+	and	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/andn_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/andn_n.s
new file mode 100644
index 0000000..704eaa3
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/andn_n.s
@@ -0,0 +1,163 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_andn_n
+	
+	
+___gmpn_andn_n:
+
+	
+	mov	(%rdx), %r8
+	not	%r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	and	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	and	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	not	%r8
+Lb00:	mov	8(%rdx), %r9
+	not	%r9
+	and	(%rsi), %r8
+	and	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+	not	%r8
+Le10:	mov	24(%rdx), %r9
+	not	%r9
+	lea	32(%rdx), %rdx
+	and	16(%rsi), %r8
+	and	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_dbm1c.s b/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_dbm1c.s
new file mode 100644
index 0000000..b4e7295
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_dbm1c.s
@@ -0,0 +1,121 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_bdiv_dbm1c
+	
+	
+___gmpn_bdiv_dbm1c:
+
+	
+
+	mov	(%rsi), %rax
+	mov	%rdx, %r9
+	mov	%edx, %r11d
+	mul	%rcx
+	lea	(%rsi,%r9,8), %rsi
+	lea	(%rdi,%r9,8), %rdi
+	neg	%r9
+	and	$3, %r11d
+	jz	Llo0
+	lea	-4(%r9,%r11), %r9
+	cmp	$2, %r11d
+	jc	Llo1
+	jz	Llo2
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltop:	mov	(%rsi,%r9,8), %rax
+	mul	%rcx
+Llo0:	sub	%rax, %r8
+	mov	%r8, (%rdi,%r9,8)
+	sbb	%rdx, %r8
+	mov	8(%rsi,%r9,8), %rax
+	mul	%rcx
+Llo3:	sub	%rax, %r8
+	mov	%r8, 8(%rdi,%r9,8)
+	sbb	%rdx, %r8
+	mov	16(%rsi,%r9,8), %rax
+	mul	%rcx
+Llo2:	sub	%rax, %r8
+	mov	%r8, 16(%rdi,%r9,8)
+	sbb	%rdx, %r8
+	mov	24(%rsi,%r9,8), %rax
+	mul	%rcx
+Llo1:	sub	%rax, %r8
+	mov	%r8, 24(%rdi,%r9,8)
+	sbb	%rdx, %r8
+	add	$4, %r9
+	jnz	Ltop
+
+	mov	%r8, %rax
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_q_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_q_1.s
new file mode 100644
index 0000000..c21f024
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/bdiv_q_1.s
@@ -0,0 +1,215 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+		
+		
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_bdiv_q_1
+	
+	
+___gmpn_bdiv_q_1:
+
+	
+	push	%rbx
+
+	mov	%rcx, %rax
+	xor	%ecx, %ecx	
+	mov	%rdx, %r10
+
+	bt	$0, %eax
+	jnc	Levn			
+
+Lodd:	mov	%rax, %rbx
+	shr	%eax
+	and	$127, %eax		
+
+	lea	___gmp_binvert_limb_table(%rip), %rdx
+
+
+
+	movzbl	(%rdx,%rax), %eax	
+
+	mov	%rbx, %r11		
+
+	lea	(%rax,%rax), %edx	
+	imul	%eax, %eax	
+	imul	%ebx, %eax	
+	sub	%eax, %edx	
+
+	lea	(%rdx,%rdx), %eax	
+	imul	%edx, %edx	
+	imul	%ebx, %edx	
+	sub	%edx, %eax	
+
+	lea	(%rax,%rax), %r8	
+	imul	%rax, %rax		
+	imul	%rbx, %rax		
+	sub	%rax, %r8		
+
+	jmp	Lpi1
+
+Levn:	bsf	%rax, %rcx
+	shr	%cl, %rax
+	jmp	Lodd
+	
+
+	.globl	___gmpn_pi1_bdiv_q_1
+	
+	
+___gmpn_pi1_bdiv_q_1:
+
+	
+
+
+	push	%rbx
+
+	mov	%rcx, %r11		
+	mov	%rdx, %r10		
+	mov	%r9, %rcx		
+
+Lpi1:	mov	(%rsi), %rax		
+
+	dec	%r10
+	jz	Lone
+
+	lea	8(%rsi,%r10,8), %rsi	
+	lea	(%rdi,%r10,8), %rdi		
+	neg	%r10			
+
+	test	%ecx, %ecx
+	jnz	Lunorm		
+	xor	%ebx, %ebx
+	jmp	Lnent
+
+	.align	3, 0x90
+Lntop:mul	%r11			
+	mov	-8(%rsi,%r10,8), %rax	
+	sub	%rbx, %rax		
+	setc	%bl		
+	sub	%rdx, %rax		
+	adc	$0, %ebx		
+Lnent:imul	%r8, %rax		
+	mov	%rax, (%rdi,%r10,8)	
+	inc	%r10			
+	jnz	Lntop
+
+	mov	-8(%rsi), %r9		
+	jmp	Lcom
+
+Lunorm:
+	mov	(%rsi,%r10,8), %r9	
+	shr	%cl, %rax		
+	neg	%ecx
+	shl	%cl, %r9		
+	neg	%ecx
+	or	%r9, %rax
+	xor	%ebx, %ebx
+	jmp	Luent
+
+	.align	3, 0x90
+Lutop:mul	%r11			
+	mov	(%rsi,%r10,8), %rax	
+	shl	%cl, %rax		
+	neg	%ecx
+	or	%r9, %rax
+	sub	%rbx, %rax		
+	setc	%bl		
+	sub	%rdx, %rax		
+	adc	$0, %ebx		
+Luent:imul	%r8, %rax		
+	mov	(%rsi,%r10,8), %r9	
+	shr	%cl, %r9		
+	neg	%ecx
+	mov	%rax, (%rdi,%r10,8)	
+	inc	%r10			
+	jnz	Lutop
+
+Lcom:	mul	%r11			
+	sub	%rbx, %r9		
+	sub	%rdx, %r9		
+	imul	%r8, %r9
+	mov	%r9, (%rdi)
+	pop	%rbx
+	
+	ret
+
+Lone:	shr	%cl, %rax
+	imul	%r8, %rax
+	mov	%rax, (%rdi)
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_add_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_add_n.s
new file mode 100644
index 0000000..274a59f
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_add_n.s
@@ -0,0 +1,184 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+					
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_cnd_add_n
+	
+	
+___gmpn_cnd_add_n:
+
+	
+
+	push	%rbx
+
+	neg	%rdi
+	sbb	%rbx, %rbx		
+
+	test	$1, %r8b
+	jz	Lx0
+Lx1:	test	$2, %r8b
+	jz	Lb1
+
+Lb3:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	mov	16(%rcx), %r10
+	and	%rbx, %rdi
+	and	%rbx, %r9
+	and	%rbx, %r10
+	add	(%rdx), %rdi
+	mov	%rdi, (%rsi)
+	adc	8(%rdx), %r9
+	mov	%r9, 8(%rsi)
+	adc	16(%rdx), %r10
+	mov	%r10, 16(%rsi)
+	sbb	%eax, %eax	
+	lea	24(%rdx), %rdx
+	lea	24(%rcx), %rcx
+	lea	24(%rsi), %rsi
+	sub	$3, %r8
+	jnz	Ltop
+	jmp	Lend
+
+Lx0:	xor	%eax, %eax
+	test	$2, %r8b
+	jz	Ltop
+
+Lb2:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	and	%rbx, %rdi
+	and	%rbx, %r9
+	add	(%rdx), %rdi
+	mov	%rdi, (%rsi)
+	adc	8(%rdx), %r9
+	mov	%r9, 8(%rsi)
+	sbb	%eax, %eax	
+	lea	16(%rdx), %rdx
+	lea	16(%rcx), %rcx
+	lea	16(%rsi), %rsi
+	sub	$2, %r8
+	jnz	Ltop
+	jmp	Lend
+
+Lb1:	mov	(%rcx), %rdi
+	and	%rbx, %rdi
+	add	(%rdx), %rdi
+	mov	%rdi, (%rsi)
+	sbb	%eax, %eax	
+	lea	8(%rdx), %rdx
+	lea	8(%rcx), %rcx
+	lea	8(%rsi), %rsi
+	dec	%r8
+	jz	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	mov	16(%rcx), %r10
+	mov	24(%rcx), %r11
+	lea	32(%rcx), %rcx
+	and	%rbx, %rdi
+	and	%rbx, %r9
+	and	%rbx, %r10
+	and	%rbx, %r11
+	add	%eax, %eax	
+	adc	(%rdx), %rdi
+	mov	%rdi, (%rsi)
+	adc	8(%rdx), %r9
+	mov	%r9, 8(%rsi)
+	adc	16(%rdx), %r10
+	mov	%r10, 16(%rsi)
+	adc	24(%rdx), %r11
+	lea	32(%rdx), %rdx
+	mov	%r11, 24(%rsi)
+	lea	32(%rsi), %rsi
+	sbb	%eax, %eax	
+	sub	$4, %r8
+	jnz	Ltop
+
+Lend:	neg	%eax
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_sub_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_sub_n.s
new file mode 100644
index 0000000..79ac5c3
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/cnd_sub_n.s
@@ -0,0 +1,207 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+					
+
+
+
+
+	
+	
+	
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_cnd_sub_n
+	
+	
+___gmpn_cnd_sub_n:
+
+	
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+
+	neg	%rdi
+	sbb	%rbx, %rbx		
+
+	test	$1, %r8b
+	jz	Lx0
+Lx1:	test	$2, %r8b
+	jz	Lb1
+
+Lb3:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	mov	16(%rcx), %r10
+	and	%rbx, %rdi
+	mov	(%rdx), %r12
+	and	%rbx, %r9
+	mov	8(%rdx), %r13
+	and	%rbx, %r10
+	mov	16(%rdx), %rbp
+	sub	%rdi, %r12
+	mov	%r12, (%rsi)
+	sbb	%r9, %r13
+	mov	%r13, 8(%rsi)
+	sbb	%r10, %rbp
+	mov	%rbp, 16(%rsi)
+	sbb	%eax, %eax	
+	lea	24(%rdx), %rdx
+	lea	24(%rcx), %rcx
+	lea	24(%rsi), %rsi
+	sub	$3, %r8
+	jnz	Ltop
+	jmp	Lend
+
+Lx0:	xor	%eax, %eax
+	test	$2, %r8b
+	jz	Ltop
+
+Lb2:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	mov	(%rdx), %r12
+	and	%rbx, %rdi
+	mov	8(%rdx), %r13
+	and	%rbx, %r9
+	sub	%rdi, %r12
+	mov	%r12, (%rsi)
+	sbb	%r9, %r13
+	mov	%r13, 8(%rsi)
+	sbb	%eax, %eax	
+	lea	16(%rdx), %rdx
+	lea	16(%rcx), %rcx
+	lea	16(%rsi), %rsi
+	sub	$2, %r8
+	jnz	Ltop
+	jmp	Lend
+
+Lb1:	mov	(%rcx), %rdi
+	mov	(%rdx), %r12
+	and	%rbx, %rdi
+	sub	%rdi, %r12
+	mov	%r12, (%rsi)
+	sbb	%eax, %eax	
+	lea	8(%rdx), %rdx
+	lea	8(%rcx), %rcx
+	lea	8(%rsi), %rsi
+	dec	%r8
+	jz	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rcx), %rdi
+	mov	8(%rcx), %r9
+	mov	16(%rcx), %r10
+	mov	24(%rcx), %r11
+	lea	32(%rcx), %rcx
+	and	%rbx, %rdi
+	mov	(%rdx), %r12
+	and	%rbx, %r9
+	mov	8(%rdx), %r13
+	and	%rbx, %r10
+	mov	16(%rdx), %rbp
+	and	%rbx, %r11
+	add	%eax, %eax	
+	mov	24(%rdx), %rax
+	lea	32(%rdx), %rdx
+	sbb	%rdi, %r12
+	mov	%r12, (%rsi)
+	sbb	%r9, %r13
+	mov	%r13, 8(%rsi)
+	sbb	%r10, %rbp
+	mov	%rbp, 16(%rsi)
+	sbb	%r11, %rax
+	mov	%rax, 24(%rsi)
+	lea	32(%rsi), %rsi
+	sbb	%eax, %eax	
+	sub	$4, %r8
+	jnz	Ltop
+
+Lend:	neg	%eax
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/com.s b/vere/ext/gmp/gen/x86_64-macos/mpn/com.s
new file mode 100644
index 0000000..bfac7e2
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/com.s
@@ -0,0 +1,335 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_com
+	
+	
+___gmpn_com:
+
+	
+
+	cmp	$7, %rdx
+	jbe	Lbc
+
+	pcmpeqb	%xmm5, %xmm5		
+
+	test	$8, %dil		
+	jz	Lrp_aligned		
+
+	mov	(%rsi), %r8
+	lea	8(%rsi), %rsi
+	not	%r8
+	mov	%r8, (%rdi)
+	lea	8(%rdi), %rdi
+	dec	%rdx
+
+Lrp_aligned:
+	test	$8, %sil
+	jnz	Luent
+
+	jmp	Lam
+
+	.align	4, 0x90
+Latop:movaps	0(%rsi), %xmm0
+	movaps	16(%rsi), %xmm1
+	movaps	32(%rsi), %xmm2
+	movaps	48(%rsi), %xmm3
+	lea	64(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	pxor	%xmm5, %xmm1
+	pxor	%xmm5, %xmm2
+	pxor	%xmm5, %xmm3
+	movaps	%xmm0, (%rdi)
+	movaps	%xmm1, 16(%rdi)
+	movaps	%xmm2, 32(%rdi)
+	movaps	%xmm3, 48(%rdi)
+	lea	64(%rdi), %rdi
+Lam:	sub	$8, %rdx
+	jnc	Latop
+
+	test	$4, %dl
+	jz	1f
+	movaps	(%rsi), %xmm0
+	movaps	16(%rsi), %xmm1
+	lea	32(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	pxor	%xmm5, %xmm1
+	movaps	%xmm0, (%rdi)
+	movaps	%xmm1, 16(%rdi)
+	lea	32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movaps	(%rsi), %xmm0
+	lea	16(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, (%rdi)
+	lea	16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+Luent:
+
+
+
+
+	lea	-40(%rsi), %rax		
+	sub	%rdi, %rax
+	cmp	$80, %rax		
+	jbe	Lbc			
+
+	sub	$16, %rdx
+	jc	Luend
+
+	movaps	120(%rsi), %xmm3
+
+	sub	$16, %rdx
+	jmp	Lum
+
+	.align	4, 0x90
+Lutop:movaps	120(%rsi), %xmm3
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, -128(%rdi)
+	sub	$16, %rdx
+Lum:	movaps	104(%rsi), %xmm2
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movaps	88(%rsi), %xmm1
+	pxor	%xmm5, %xmm3
+	movaps	%xmm3, 112(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movaps	72(%rsi), %xmm0
+	pxor	%xmm5, %xmm2
+	movaps	%xmm2, 96(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	56(%rsi), %xmm3
+	pxor	%xmm5, %xmm1
+	movaps	%xmm1, 80(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	movaps	40(%rsi), %xmm2
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, 64(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movaps	24(%rsi), %xmm1
+	pxor	%xmm5, %xmm3
+	movaps	%xmm3, 48(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movaps	8(%rsi), %xmm0
+	pxor	%xmm5, %xmm2
+	movaps	%xmm2, 32(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	-8(%rsi), %xmm3
+	pxor	%xmm5, %xmm1
+	movaps	%xmm1, 16(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	128(%rsi), %rsi
+	lea	128(%rdi), %rdi
+	jnc	Lutop
+
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, -128(%rdi)
+
+Luend:test	$8, %dl
+	jz	1f
+	movaps	56(%rsi), %xmm3
+	movaps	40(%rsi), %xmm2
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movaps	24(%rsi), %xmm1
+	pxor	%xmm5, %xmm3
+	movaps	%xmm3, 48(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movaps	8(%rsi), %xmm0
+	pxor	%xmm5, %xmm2
+	movaps	%xmm2, 32(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	-8(%rsi), %xmm3
+	pxor	%xmm5, %xmm1
+	movaps	%xmm1, 16(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	64(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, (%rdi)
+	lea	64(%rdi), %rdi
+
+1:	test	$4, %dl
+	jz	1f
+	movaps	24(%rsi), %xmm1
+	movaps	8(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	-8(%rsi), %xmm3
+	pxor	%xmm5, %xmm1
+	movaps	%xmm1, 16(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	32(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, (%rdi)
+	lea	32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movaps	8(%rsi), %xmm0
+	movaps	-8(%rsi), %xmm3
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	16(%rsi), %rsi
+	pxor	%xmm5, %xmm0
+	movaps	%xmm0, (%rdi)
+	lea	16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+
+
+
+Lbc:	lea	-8(%rdi), %rdi
+	sub	$4, %edx
+	jc	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	lea	32(%rdi), %rdi
+	mov	16(%rsi), %r10
+	mov	24(%rsi), %r11
+	lea	32(%rsi), %rsi
+	not	%r8
+	not	%r9
+	not	%r10
+	not	%r11
+	mov	%r8, -24(%rdi)
+	mov	%r9, -16(%rdi)
+	sub	$4, %edx
+	mov	%r10, -8(%rdi)
+	mov	%r11, (%rdi)
+	jnc	Ltop
+
+Lend:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	not	%r8
+	mov	%r8, 8(%rdi)
+	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+1:	test	$2, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	not	%r8
+	not	%r9
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+1:	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/copyd.s b/vere/ext/gmp/gen/x86_64-macos/mpn/copyd.s
new file mode 100644
index 0000000..eced825
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/copyd.s
@@ -0,0 +1,279 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_copyd
+	
+	
+___gmpn_copyd:
+
+	
+
+	lea	-8(%rsi,%rdx,8), %rsi
+	lea	-8(%rdi,%rdx,8), %rdi
+
+	cmp	$7, %rdx
+	jbe	Lbc
+
+	test	$8, %dil		
+	jnz	Lrp_aligned		
+
+	mov	(%rsi), %rax		
+	mov	%rax, (%rdi)
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdi), %rdi
+	dec	%rdx
+
+Lrp_aligned:
+	test	$8, %sil
+	jz	Luent
+
+	jmp	Lam
+
+	.align	4, 0x90
+Latop:movaps	-8(%rsi), %xmm0
+	movaps	-24(%rsi), %xmm1
+	movaps	-40(%rsi), %xmm2
+	movaps	-56(%rsi), %xmm3
+	lea	-64(%rsi), %rsi
+	movaps	%xmm0, -8(%rdi)
+	movaps	%xmm1, -24(%rdi)
+	movaps	%xmm2, -40(%rdi)
+	movaps	%xmm3, -56(%rdi)
+	lea	-64(%rdi), %rdi
+Lam:	sub	$8, %rdx
+	jnc	Latop
+
+	test	$4, %dl
+	jz	1f
+	movaps	-8(%rsi), %xmm0
+	movaps	-24(%rsi), %xmm1
+	lea	-32(%rsi), %rsi
+	movaps	%xmm0, -8(%rdi)
+	movaps	%xmm1, -24(%rdi)
+	lea	-32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movaps	-8(%rsi), %xmm0
+	lea	-16(%rsi), %rsi
+	movaps	%xmm0, -8(%rdi)
+	lea	-16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+Luent:sub	$16, %rdx
+	movaps	(%rsi), %xmm0
+	jc	Luend
+
+	.align	4, 0x90
+Lutop:sub	$16, %rdx
+	movaps	-16(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -8(%rdi)
+	movaps	-32(%rsi), %xmm2
+	.byte	0x66,0x0f,0x3a,0x0f,202,8
+	movaps	%xmm1, -24(%rdi)
+	movaps	-48(%rsi), %xmm3
+	.byte	0x66,0x0f,0x3a,0x0f,211,8
+	movaps	%xmm2, -40(%rdi)
+	movaps	-64(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,216,8
+	movaps	%xmm3, -56(%rdi)
+	movaps	-80(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -72(%rdi)
+	movaps	-96(%rsi), %xmm2
+	.byte	0x66,0x0f,0x3a,0x0f,202,8
+	movaps	%xmm1, -88(%rdi)
+	movaps	-112(%rsi), %xmm3
+	.byte	0x66,0x0f,0x3a,0x0f,211,8
+	movaps	%xmm2, -104(%rdi)
+	movaps	-128(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,216,8
+	movaps	%xmm3, -120(%rdi)
+	lea	-128(%rsi), %rsi
+	lea	-128(%rdi), %rdi
+	jnc	Lutop
+
+Luend:test	$8, %dl
+	jz	1f
+	movaps	-16(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -8(%rdi)
+	movaps	-32(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	%xmm1, -24(%rdi)
+	movaps	-48(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -40(%rdi)
+	movaps	-64(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	%xmm1, -56(%rdi)
+	lea	-64(%rsi), %rsi
+	lea	-64(%rdi), %rdi
+
+1:	test	$4, %dl
+	jz	1f
+	movaps	-16(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -8(%rdi)
+	movaps	-32(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	%xmm1, -24(%rdi)
+	lea	-32(%rsi), %rsi
+	lea	-32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movaps	-16(%rsi), %xmm1
+	.byte	0x66,0x0f,0x3a,0x0f,193,8
+	movaps	%xmm0, -8(%rdi)
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+
+
+
+Lbc:	sub	$4, %edx
+	jc	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rsi), %r8
+	mov	-8(%rsi), %r9
+	lea	-32(%rdi), %rdi
+	mov	-16(%rsi), %r10
+	mov	-24(%rsi), %r11
+	lea	-32(%rsi), %rsi
+	mov	%r8, 32(%rdi)
+	mov	%r9, 24(%rdi)
+
+	mov	%r10, 16(%rdi)
+	mov	%r11, 8(%rdi)
+
+
+Lend:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, (%rdi)
+	lea	-8(%rdi), %rdi
+	lea	-8(%rsi), %rsi
+1:	test	$2, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	-8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, -8(%rdi)
+1:	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/copyi.s b/vere/ext/gmp/gen/x86_64-macos/mpn/copyi.s
new file mode 100644
index 0000000..9f77e50
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/copyi.s
@@ -0,0 +1,324 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_copyi
+	
+	
+___gmpn_copyi:
+
+	
+
+	cmp	$7, %rdx
+	jbe	Lbc
+
+	test	$8, %dil		
+	jz	Lrp_aligned		
+
+	movsq				
+	dec	%rdx
+
+Lrp_aligned:
+	test	$8, %sil
+	jnz	Luent
+
+	jmp	Lam
+
+	.align	4, 0x90
+Latop:movdqa	0(%rsi), %xmm0
+	movdqa	16(%rsi), %xmm1
+	movdqa	32(%rsi), %xmm2
+	movdqa	48(%rsi), %xmm3
+	lea	64(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	movdqa	%xmm1, 16(%rdi)
+	movdqa	%xmm2, 32(%rdi)
+	movdqa	%xmm3, 48(%rdi)
+	lea	64(%rdi), %rdi
+Lam:	sub	$8, %rdx
+	jnc	Latop
+
+	test	$4, %dl
+	jz	1f
+	movdqa	(%rsi), %xmm0
+	movdqa	16(%rsi), %xmm1
+	lea	32(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	movdqa	%xmm1, 16(%rdi)
+	lea	32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movdqa	(%rsi), %xmm0
+	lea	16(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	lea	16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+Luent:
+
+
+	cmp	$16, %rdx
+	jc	Lued0
+
+
+
+
+
+
+	movaps	120(%rsi), %xmm7
+	movaps	104(%rsi), %xmm6
+	movaps	88(%rsi), %xmm5
+	movaps	72(%rsi), %xmm4
+	movaps	56(%rsi), %xmm3
+	movaps	40(%rsi), %xmm2
+	lea	128(%rsi), %rsi
+	sub	$32, %rdx
+	jc	Lued1
+
+	.align	4, 0x90
+Lutop:movaps	-104(%rsi), %xmm1
+	sub	$16, %rdx
+	movaps	-120(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,254,8
+	movaps	-136(%rsi), %xmm8
+	movdqa	%xmm7, 112(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,245,8
+	movaps	120(%rsi), %xmm7
+	movdqa	%xmm6, 96(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,236,8
+	movaps	104(%rsi), %xmm6
+	movdqa	%xmm5, 80(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,227,8
+	movaps	88(%rsi), %xmm5
+	movdqa	%xmm4, 64(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movaps	72(%rsi), %xmm4
+	movdqa	%xmm3, 48(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movaps	56(%rsi), %xmm3
+	movdqa	%xmm2, 32(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	40(%rsi), %xmm2
+	movdqa	%xmm1, 16(%rdi)
+	.byte	0x66,65,0x0f,0x3a,0x0f,192,8
+	lea	128(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	lea	128(%rdi), %rdi
+	jnc	Lutop
+
+Lued1:movaps	-104(%rsi), %xmm1
+	movaps	-120(%rsi), %xmm0
+	movaps	-136(%rsi), %xmm8
+	.byte	0x66,0x0f,0x3a,0x0f,254,8
+	movdqa	%xmm7, 112(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,245,8
+	movdqa	%xmm6, 96(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,236,8
+	movdqa	%xmm5, 80(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,227,8
+	movdqa	%xmm4, 64(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movdqa	%xmm3, 48(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movdqa	%xmm2, 32(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movdqa	%xmm1, 16(%rdi)
+	.byte	0x66,65,0x0f,0x3a,0x0f,192,8
+	movdqa	%xmm0, (%rdi)
+	lea	128(%rdi), %rdi
+
+
+
+
+
+
+Lued0:test	$8, %dl
+	jz	1f
+	movaps	56(%rsi), %xmm3
+	movaps	40(%rsi), %xmm2
+	movaps	24(%rsi), %xmm1
+	movaps	8(%rsi), %xmm0
+	movaps	-8(%rsi), %xmm4
+	.byte	0x66,0x0f,0x3a,0x0f,218,8
+	movdqa	%xmm3, 48(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,209,8
+	movdqa	%xmm2, 32(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movdqa	%xmm1, 16(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,196,8
+	lea	64(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	lea	64(%rdi), %rdi
+
+1:	test	$4, %dl
+	jz	1f
+	movaps	24(%rsi), %xmm1
+	movaps	8(%rsi), %xmm0
+	.byte	0x66,0x0f,0x3a,0x0f,200,8
+	movaps	-8(%rsi), %xmm3
+	movdqa	%xmm1, 16(%rdi)
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	32(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	lea	32(%rdi), %rdi
+
+1:	test	$2, %dl
+	jz	1f
+	movdqa	8(%rsi), %xmm0
+	movdqa	-8(%rsi), %xmm3
+	.byte	0x66,0x0f,0x3a,0x0f,195,8
+	lea	16(%rsi), %rsi
+	movdqa	%xmm0, (%rdi)
+	lea	16(%rdi), %rdi
+
+1:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, (%rdi)
+
+1:	
+	ret
+
+
+
+
+Lbc:	lea	-8(%rdi), %rdi
+	sub	$4, %edx
+	jc	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	lea	32(%rdi), %rdi
+	mov	16(%rsi), %r10
+	mov	24(%rsi), %r11
+	lea	32(%rsi), %rsi
+	mov	%r8, -24(%rdi)
+	mov	%r9, -16(%rdi)
+
+	mov	%r10, -8(%rdi)
+	mov	%r11, (%rdi)
+
+
+Lend:	test	$1, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	%r8, 8(%rdi)
+	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+1:	test	$2, %dl
+	jz	1f
+	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+1:	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_1n_pi1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_1n_pi1.s
new file mode 100644
index 0000000..5ca7107
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_1n_pi1.s
@@ -0,0 +1,259 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+
+
+
+
+
+
+
+
+	
+
+
+
+
+
+
+
+
+
+	
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_div_qr_1n_pi1
+	
+	
+___gmpn_div_qr_1n_pi1:
+
+	
+
+
+	dec	%rdx
+	jnz	Lfirst
+
+	
+	
+	lea	1(%rcx), %r10
+	mov	%rcx, %rax
+	mul	%r9
+	mov	(%rsi), %r11
+	add	%r11, %rax
+	adc	%r10, %rdx
+	mov	%rdx, %r10
+	imul	%r8, %rdx
+	sub	%rdx, %r11
+	cmp	%r11, %rax
+	lea	(%r11, %r8), %rax
+	cmovnc	%r11, %rax
+	sbb	$0, %r10
+	cmp	%r8, %rax
+	jc	Lsingle_div_done
+	sub	%r8, %rax
+	add	$1, %r10
+Lsingle_div_done:
+	mov	%r10, (%rdi)
+	
+	ret
+Lfirst:
+	
+	push	%r15
+	push	%r14
+	push	%r13
+	push	%r12
+	push	%rbx
+	push	%rbp
+
+	mov	%r8, %rbp
+	imul	%r9, %rbp
+	neg	%rbp
+	mov	%rbp, %rbx
+	sub	%r8, %rbx
+
+	
+	push	%r8
+	mov	%rdx, %r8	
+
+	mov	%r9, %rax
+	mul	%rcx
+	mov	%rax, %r13
+	add	%rcx, %rdx
+	mov	%rdx, %r10
+
+	mov	%rbp, %rax
+	mul	%rcx
+	mov	-8(%rsi, %r8, 8), %r11
+	mov	(%rsi, %r8, 8), %rcx
+	mov	%r10, (%rdi, %r8, 8)
+	add	%rax, %r11
+	adc	%rdx, %rcx
+	sbb	%r12, %r12
+	dec	%r8
+	mov	%rcx, %rax
+	jz	Lfinal
+
+	.align	4, 0x90
+
+	
+	
+Lloop:
+	
+	
+	mov	%r9, %r14
+	mov	%r12, %r15
+	and	%r12, %r14
+	neg	%r15
+	mul	%r9
+	add	%rdx, %r14
+	adc	$0, %r15
+	add	%r13, %r14
+	mov	%rax, %r13
+	mov	%rbp, %rax
+	lea	(%rbx, %r11), %r10
+	adc	$0, %r15
+
+	
+	mul	%rcx
+	and	%rbp, %r12
+	add	%r12, %r11
+	cmovnc	%r11, %r10
+
+	
+	adc	%rcx, %r14
+	mov	-8(%rsi, %r8, 8), %r11
+	adc	%r15, 8(%rdi, %r8, 8)
+	jc	Lq_incr
+Lq_incr_done:
+	add	%rax, %r11
+	mov	%r10, %rax
+	adc	%rdx, %rax
+	mov	%r14, (%rdi, %r8, 8)
+	sbb	%r12, %r12
+	dec	%r8
+	mov	%rax, %rcx
+	jnz	Lloop
+
+Lfinal:
+	pop	%r8
+
+	mov	%r12, %r14
+	and	%r8, %r12
+	sub	%r12, %rax
+	neg	%r14
+
+	mov	%rax, %rcx
+	sub	%r8, %rax
+	cmovc	%rcx, %rax
+	sbb	$-1, %r14
+
+	lea	1(%rax), %r10
+	mul	%r9
+	add	%r11, %rax
+	adc	%r10, %rdx
+	mov	%rdx, %r10
+	imul	%r8, %rdx
+	sub	%rdx, %r11
+	cmp	%r11, %rax
+	lea	(%r11, %r8), %rax
+	cmovnc	%r11, %rax
+	sbb	$0, %r10
+	cmp	%r8, %rax
+	jc	Ldiv_done
+	sub	%r8, %rax
+	add	$1, %r10
+Ldiv_done:
+	add	%r10, %r13
+	mov	%r13, (%rdi)
+	adc	%r14, 8(%rdi)
+	jnc	Ldone
+Lfinal_q_incr:
+	addq	$1, 16(%rdi)
+	lea	8(%rdi), %rdi
+	jc	Lfinal_q_incr
+
+Ldone:
+	pop	%rbp
+	pop	%rbx
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	pop	%r15
+	
+	ret
+
+Lq_incr:
+	
+	lea	16(%rdi, %r8, 8), %rcx
+Lq_incr_loop:
+	addq	$1, (%rcx)
+	jnc	Lq_incr_done
+	lea	8(%rcx), %rcx
+	jmp	Lq_incr_loop
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2n_pi1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2n_pi1.s
new file mode 100644
index 0000000..1334c1e
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2n_pi1.s
@@ -0,0 +1,171 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_div_qr_2n_pi1
+	
+	
+___gmpn_div_qr_2n_pi1:
+
+	
+
+
+
+	mov	8(%rsp), %r10
+	mov	%rdx, %r11
+	push	%r15
+	push	%r14
+	push	%r13
+	push	%r12
+	push	%rbx
+
+	mov	-16(%r11, %rcx, 8), %r12
+	mov	-8(%r11, %rcx, 8), %rbx
+
+	mov	%r12, %r14
+	mov	%rbx, %r13
+	sub	%r9, %r14
+	sbb	%r8, %r13
+	cmovnc  %r14, %r12
+	cmovnc	%r13, %rbx
+	
+	sbb	%rax, %rax
+	inc	%rax
+	push	%rax
+	lea	-2(%rcx), %rcx
+	mov	%r8, %r15
+	neg	%r15
+
+	jmp	Lnext
+
+	.align	4, 0x90
+Lloop:
+	
+	
+
+	mov	%r10, %rax
+	mul	%rbx
+	mov	%r12, %r14
+	add	%rax, %r14	
+	adc	%rbx, %rdx
+	mov	%rdx, %r13	
+	imul	%r15, %rdx
+	mov	%r9, %rax
+	lea	(%rdx, %r12), %rbx
+	mul	%r13
+	mov	(%r11, %rcx, 8), %r12
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	sub	%rax, %r12
+	sbb	%rdx, %rbx
+	xor	%eax, %eax
+	xor	%edx, %edx
+	cmp	%r14, %rbx
+	cmovnc	%r9, %rax
+	cmovnc	%r8, %rdx
+	adc	$0, %r13
+	nop
+	add	%rax, %r12
+	adc	%rdx, %rbx
+	cmp	%r8, %rbx
+	jae	Lfix
+Lbck:
+	mov	%r13, (%rdi, %rcx, 8)
+Lnext:
+	sub	$1, %rcx
+	jnc	Lloop
+Lend:
+	mov	%rbx, 8(%rsi)
+	mov	%r12, (%rsi)
+
+	
+	pop	%rax
+
+	pop	%rbx
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	pop	%r15
+	
+	ret
+
+Lfix:	
+	seta	%dl
+	cmp	%r9, %r12
+	setae	%al
+	orb	%dl, %al		
+	je	Lbck
+	inc	%r13
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	jmp	Lbck
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2u_pi1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2u_pi1.s
new file mode 100644
index 0000000..62fb8b7
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/div_qr_2u_pi1.s
@@ -0,0 +1,211 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+ 
+
+
+
+
+
+
+
+
+
+ 
+
+
+
+
+	.text
+	.align	4, 0x90
+
+	.globl	___gmpn_div_qr_2u_pi1
+	
+	
+___gmpn_div_qr_2u_pi1:
+
+	mov	0+16(%rsp), %r10
+	mov	%rdx, %r11
+	push	%r15
+	push	%r14
+	push	%r13
+	push	%r12
+	push	%rbx
+	push	%rbp
+	push	%rsi
+
+	lea	-2(%rcx), %rbp
+	mov	%r8, %r15
+	neg	%r15
+
+	
+	movl	56+8(%rsp), %ecx
+
+	
+
+	xor	%ebx, %ebx
+	mov	8(%r11, %rbp, 8), %r12
+	shld	%cl, %r12, %rbx
+	
+	
+	mov	%r10, %rax
+	mul	%rbx
+	mov	(%r11, %rbp, 8), %rsi
+	shld	%cl, %rsi, %r12
+	mov	%r12, %r14
+	add	%rax, %r14	
+	adc	%rbx, %rdx
+	mov	%rdx, %r13	
+	imul	%r15, %rdx
+	mov	%r9, %rax
+	lea	(%rdx, %r12), %rbx
+	mul	%r13
+	mov	%rsi, %r12
+	shl	%cl, %r12
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	sub	%rax, %r12
+	sbb	%rdx, %rbx
+	xor	%eax, %eax
+	xor	%edx, %edx
+	cmp	%r14, %rbx
+	cmovnc	%r9, %rax
+	cmovnc	%r8, %rdx
+	adc	$0, %r13
+	nop
+	add	%rax, %r12
+	adc	%rdx, %rbx
+	cmp	%r8, %rbx
+	jae	Lfix_qh
+Lbck_qh:
+	push	%r13	
+
+	jmp	Lnext
+
+	.align	4, 0x90
+Lloop:
+	
+	
+
+	mov	%r10, %rax
+	mul	%rbx
+	mov	(%r11, %rbp, 8), %rsi
+	xor	%r13d, %r13d
+	shld	%cl, %rsi, %r13
+	or	%r13, %r12
+	mov	%r12, %r14
+	add	%rax, %r14	
+	adc	%rbx, %rdx
+	mov	%rdx, %r13	
+	imul	%r15, %rdx
+	mov	%r9, %rax
+	lea	(%rdx, %r12), %rbx
+	mul	%r13
+	mov	%rsi, %r12
+	shl	%cl, %r12
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	sub	%rax, %r12
+	sbb	%rdx, %rbx
+	xor	%eax, %eax
+	xor	%edx, %edx
+	cmp	%r14, %rbx
+	cmovnc	%r9, %rax
+	cmovnc	%r8, %rdx
+	adc	$0, %r13
+	nop
+	add	%rax, %r12
+	adc	%rdx, %rbx
+	cmp	%r8, %rbx
+	jae	Lfix
+Lbck:
+	mov	%r13, (%rdi, %rbp, 8)
+Lnext:
+	sub	$1, %rbp
+	jnc	Lloop
+Lend:
+	
+	pop	%rax
+	pop	%rsi
+	shrd	%cl, %rbx, %r12
+	shr	%cl, %rbx
+	mov	%rbx, 8(%rsi)
+	mov	%r12, (%rsi)
+
+	pop	%rbp
+	pop	%rbx
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	pop	%r15
+	ret
+
+Lfix:	
+	seta	%dl
+	cmp	%r9, %r12
+	setae	%al
+	orb	%dl, %al		
+	je	Lbck
+	inc	%r13
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	jmp	Lbck
+
+
+Lfix_qh:	
+	seta	%dl
+	cmp	%r9, %r12
+	setae	%al
+	orb	%dl, %al		
+	je	Lbck_qh
+	inc	%r13
+	sub	%r9, %r12
+	sbb	%r8, %rbx
+	jmp	Lbck_qh
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/dive_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/dive_1.s
new file mode 100644
index 0000000..4d45de0
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/dive_1.s
@@ -0,0 +1,175 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_divexact_1
+	
+	
+___gmpn_divexact_1:
+
+	
+	push	%rbx
+
+	mov	%rcx, %rax
+	xor	%ecx, %ecx	
+	mov	%rdx, %r8
+
+	bt	$0, %eax
+	jnc	Levn			
+
+Lodd:	mov	%rax, %rbx
+	shr	%eax
+	and	$127, %eax		
+
+	lea	___gmp_binvert_limb_table(%rip), %rdx
+
+
+
+	movzbl	(%rdx,%rax), %eax	
+
+	mov	%rbx, %r11		
+
+	lea	(%rax,%rax), %edx	
+	imul	%eax, %eax	
+	imul	%ebx, %eax	
+	sub	%eax, %edx	
+
+	lea	(%rdx,%rdx), %eax	
+	imul	%edx, %edx	
+	imul	%ebx, %edx	
+	sub	%edx, %eax	
+
+	lea	(%rax,%rax), %r10	
+	imul	%rax, %rax		
+	imul	%rbx, %rax		
+	sub	%rax, %r10		
+
+	lea	(%rsi,%r8,8), %rsi	
+	lea	-8(%rdi,%r8,8), %rdi	
+	neg	%r8			
+
+	mov	(%rsi,%r8,8), %rax	
+
+	inc	%r8
+	jz	Lone
+
+	mov	(%rsi,%r8,8), %rdx	
+
+	shrd	%cl, %rdx, %rax
+
+	xor	%ebx, %ebx
+	jmp	Lent
+
+Levn:	bsf	%rax, %rcx
+	shr	%cl, %rax
+	jmp	Lodd
+
+	.align	3, 0x90
+Ltop:
+	
+	
+	
+	
+	
+	
+	
+	
+	
+
+	mul	%r11			
+	mov	-8(%rsi,%r8,8), %rax	
+	mov	(%rsi,%r8,8), %r9	
+	shrd	%cl, %r9, %rax	
+	nop				
+	sub	%rbx, %rax		
+	setc	%bl			
+	sub	%rdx, %rax		
+	adc	$0, %rbx		
+Lent:	imul	%r10, %rax		
+	mov	%rax, (%rdi,%r8,8)	
+	inc	%r8			
+	jnz	Ltop
+
+	mul	%r11			
+	mov	-8(%rsi), %rax		
+	shr	%cl, %rax
+	sub	%rbx, %rax		
+	sub	%rdx, %rax		
+	imul	%r10, %rax
+	mov	%rax, (%rdi)
+	pop	%rbx
+	
+	ret
+
+Lone:	shr	%cl, %rax
+	imul	%r10, %rax
+	mov	%rax, (%rdi)
+	pop	%rbx
+	
+	ret
+
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_1.s
new file mode 100644
index 0000000..c0d5b59
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_1.s
@@ -0,0 +1,348 @@
+
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+		
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+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_preinv_divrem_1
+	
+	
+___gmpn_preinv_divrem_1:
+
+	
+
+
+	xor	%eax, %eax
+	push	%r13
+	push	%r12
+	push	%rbp
+	push	%rbx
+
+	mov	%rsi, %r12
+	mov	%rcx, %rbx
+	add	%rsi, %rcx
+	mov	%rdx, %rsi
+
+	lea	-8(%rdi,%rcx,8), %rdi
+
+	test	%r8, %r8
+	js	Lnent
+
+	mov	40(%rsp), %cl
+	shl	%cl, %r8
+	jmp	Luent
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_divrem_1
+	
+	
+___gmpn_divrem_1:
+
+	
+
+	xor	%eax, %eax
+	push	%r13
+	push	%r12
+	push	%rbp
+	push	%rbx
+
+	mov	%rsi, %r12
+	mov	%rcx, %rbx
+	add	%rsi, %rcx
+	mov	%rdx, %rsi
+	je	Lret
+
+	lea	-8(%rdi,%rcx,8), %rdi
+	xor	%ebp, %ebp
+
+	test	%r8, %r8
+	jns	Lunnormalized
+
+Lnormalized:
+	test	%rbx, %rbx
+	je	L8			
+	mov	-8(%rsi,%rbx,8), %rbp
+	dec	%rbx
+	mov	%rbp, %rax
+	sub	%r8, %rbp
+	cmovc	%rax, %rbp
+	sbb	%eax, %eax
+	inc	%eax
+	mov	%rax, (%rdi)
+	lea	-8(%rdi), %rdi
+L8:
+	push	%rdi		
+	push	%rsi		
+	push	%r8
+	mov	%r8, %rdi		
+
+
+	
+	call	___gmpn_invert_limb
+
+	pop	%r8
+	pop	%rsi		
+	pop	%rdi		
+
+	mov	%rax, %r9
+	mov	%rbp, %rax
+	jmp	Lnent
+
+	.align	4, 0x90
+Lntop:mov	(%rsi,%rbx,8), %r10		
+	mul	%r9			
+	add	%r10, %rax		
+	adc	%rbp, %rdx		
+	mov	%rax, %rbp		
+	mov	%rdx, %r13		
+	imul	%r8, %rdx			
+	sub	%rdx, %r10		
+	mov	%r8, %rax			
+	add	%r10, %rax		
+	cmp	%rbp, %r10		
+	cmovc	%r10, %rax		
+	adc	$-1, %r13		
+	cmp	%r8, %rax			
+	jae	Lnfx			
+Lnok:	mov	%r13, (%rdi)		
+	sub	$8, %rdi			
+Lnent:lea	1(%rax), %rbp		
+	dec	%rbx			
+	jns	Lntop			
+
+	xor	%ecx, %ecx
+	jmp	Lfrac
+
+Lnfx:	sub	%r8, %rax
+	inc	%r13
+	jmp	Lnok
+
+Lunnormalized:
+	test	%rbx, %rbx
+	je	L44
+	mov	-8(%rsi,%rbx,8), %rax
+	cmp	%r8, %rax
+	jae	L44
+	mov	%rbp, (%rdi)
+	mov	%rax, %rbp
+	lea	-8(%rdi), %rdi
+	je	Lret
+	dec	%rbx
+L44:
+	bsr	%r8, %rcx
+	not	%ecx
+	shl	%cl, %r8
+	shl	%cl, %rbp
+
+	push	%rcx
+	push	%rdi		
+	push	%rsi		
+	push	%r8
+	sub	$8, %rsp	
+	mov	%r8, %rdi		
+
+
+	
+	call	___gmpn_invert_limb
+	add	$8, %rsp	
+
+	pop	%r8
+	pop	%rsi		
+	pop	%rdi		
+	pop	%rcx
+
+	mov	%rax, %r9
+	mov	%rbp, %rax
+	test	%rbx, %rbx
+	je	Lfrac
+
+Luent:dec	%rbx
+	mov	(%rsi,%rbx,8), %rbp
+	neg	%ecx
+	shr	%cl, %rbp
+	neg	%ecx
+	or	%rbp, %rax
+	jmp	Lent
+
+	.align	4, 0x90
+Lutop:mov	(%rsi,%rbx,8), %r10
+	shl	%cl, %rbp
+	neg	%ecx
+	shr	%cl, %r10
+	neg	%ecx
+	or	%r10, %rbp
+	mul	%r9
+	add	%rbp, %rax
+	adc	%r11, %rdx
+	mov	%rax, %r11
+	mov	%rdx, %r13
+	imul	%r8, %rdx
+	sub	%rdx, %rbp
+	mov	%r8, %rax
+	add	%rbp, %rax
+	cmp	%r11, %rbp
+	cmovc	%rbp, %rax
+	adc	$-1, %r13
+	cmp	%r8, %rax
+	jae	Lufx
+Luok:	mov	%r13, (%rdi)
+	sub	$8, %rdi
+Lent:	mov	(%rsi,%rbx,8), %rbp
+	dec	%rbx
+	lea	1(%rax), %r11
+	jns	Lutop
+
+Luend:shl	%cl, %rbp
+	mul	%r9
+	add	%rbp, %rax
+	adc	%r11, %rdx
+	mov	%rax, %r11
+	mov	%rdx, %r13
+	imul	%r8, %rdx
+	sub	%rdx, %rbp
+	mov	%r8, %rax
+	add	%rbp, %rax
+	cmp	%r11, %rbp
+	cmovc	%rbp, %rax
+	adc	$-1, %r13
+	cmp	%r8, %rax
+	jae	Lefx
+Leok:	mov	%r13, (%rdi)
+	sub	$8, %rdi
+	jmp	Lfrac
+
+Lufx:	sub	%r8, %rax
+	inc	%r13
+	jmp	Luok
+Lefx:	sub	%r8, %rax
+	inc	%r13
+	jmp	Leok
+
+Lfrac:mov	%r8, %rbp
+	neg	%rbp
+	jmp	Lfent
+
+	.align	4, 0x90			
+Lftop:mul	%r9			
+	add	%r11, %rdx		
+	mov	%rax, %r11		
+	mov	%rdx, %r13		
+	imul	%rbp, %rdx		
+	mov	%r8, %rax			
+	add	%rdx, %rax		
+	cmp	%r11, %rdx		
+	cmovc	%rdx, %rax		
+	adc	$-1, %r13		
+	mov	%r13, (%rdi)		
+	sub	$8, %rdi			
+Lfent:lea	1(%rax), %r11		
+	dec	%r12			
+	jns	Lftop			
+
+	shr	%cl, %rax
+Lret:	pop	%rbx
+	pop	%rbp
+	pop	%r12
+	pop	%r13
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_2.s b/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_2.s
new file mode 100644
index 0000000..a1c614e
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/divrem_2.s
@@ -0,0 +1,207 @@
+
+
+
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+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_divrem_2
+	
+	
+___gmpn_divrem_2:
+
+	
+
+	push	%r15
+	push	%r14
+	push	%r13
+	push	%r12
+	lea	-24(%rdx,%rcx,8), %r12	
+	mov	%rsi, %r13
+	push	%rbp
+	mov	%rdi, %rbp
+	push	%rbx
+	mov	8(%r8), %r11		
+	mov	16(%r12), %rbx
+	mov	(%r8), %r8		
+	mov	8(%r12), %r10
+
+	xor	%r15d, %r15d
+	cmp	%rbx, %r11
+	ja	L2
+	setb	%dl
+	cmp	%r10, %r8
+	setbe	%al
+	orb	%al, %dl		
+	je	L2
+	inc	%r15d
+	sub	%r8, %r10
+	sbb	%r11, %rbx
+L2:
+	lea	-3(%rcx,%r13), %r14	
+	test	%r14, %r14
+	js	Lend
+
+	push	%r8
+	push	%r10
+	push	%r11
+	mov	%r11, %rdi	
+
+
+	
+	call	___gmpn_invert_limb
+
+	pop	%r11
+	pop	%r10
+	pop	%r8
+
+	mov	%r11, %rdx
+	mov	%rax, %rdi
+	imul	%rax, %rdx
+	mov	%rdx, %r9
+	mul	%r8
+	xor	%ecx, %ecx
+	add	%r8, %r9
+	adc	$-1, %rcx
+	add	%rdx, %r9
+	adc	$0, %rcx
+	js	2f
+1:	dec	%rdi
+	sub	%r11, %r9
+	sbb	$0, %rcx
+	jns	1b
+2:
+
+	lea	(%rbp,%r14,8), %rbp
+	mov	%r11, %rsi
+	neg	%rsi			
+
+
+
+
+	.align	4, 0x90
+Ltop:	mov	%rdi, %rax		
+	mul	%rbx			
+	mov	%r10, %rcx		
+	add	%rax, %rcx		
+	adc	%rbx, %rdx		
+	mov	%rdx, %r9		
+	imul	%rsi, %rdx		
+	mov	%r8, %rax		
+	lea	(%rdx, %r10), %rbx	
+	xor	%r10d, %r10d	
+	mul	%r9			
+	cmp	%r14, %r13		
+	jg	L19			
+	mov	(%r12), %r10		
+	sub	$8, %r12		
+L19:	sub	%r8, %r10		
+	sbb	%r11, %rbx		
+	sub	%rax, %r10		
+	sbb	%rdx, %rbx		
+	xor	%eax, %eax	
+	xor	%edx, %edx	
+	cmp	%rcx, %rbx		
+	cmovnc	%r8, %rax		
+	cmovnc	%r11, %rdx		
+	adc	$0, %r9			
+	nop
+	add	%rax, %r10		
+	adc	%rdx, %rbx		
+	cmp	%r11, %rbx		
+	jae	Lfix			
+Lbck:	mov	%r9, (%rbp)		
+	sub	$8, %rbp		
+	dec	%r14
+	jns	Ltop
+
+Lend:	mov	%r10, 8(%r12)
+	mov	%rbx, 16(%r12)
+	pop	%rbx
+	pop	%rbp
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	mov	%r15, %rax
+	pop	%r15
+	
+	ret
+
+Lfix:	seta	%dl
+	cmp	%r8, %r10
+	setae	%al
+	orb	%dl, %al		
+	je	Lbck
+	inc	%r9
+	sub	%r8, %r10
+	sbb	%r11, %rbx
+	jmp	Lbck
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/fib_table.c b/vere/ext/gmp/gen/x86_64-macos/mpn/fib_table.c
new file mode 100644
index 0000000..a830475
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/fib_table.c
@@ -0,0 +1,107 @@
+/* This file generated by gen-fib.c - DO NOT EDIT. */
+
+#include "gmp.h"
+#include "gmp-impl.h"
+
+#if GMP_NUMB_BITS != 64
+Error, error, this data is for 64 bits
+#endif
+
+const mp_limb_t
+__gmp_fib_table[FIB_TABLE_LIMIT+2] = {
+  CNST_LIMB (0x1),  /* -1 */
+  CNST_LIMB (0x0),  /* 0 */
+  CNST_LIMB (0x1),  /* 1 */
+  CNST_LIMB (0x1),  /* 2 */
+  CNST_LIMB (0x2),  /* 3 */
+  CNST_LIMB (0x3),  /* 4 */
+  CNST_LIMB (0x5),  /* 5 */
+  CNST_LIMB (0x8),  /* 6 */
+  CNST_LIMB (0xd),  /* 7 */
+  CNST_LIMB (0x15),  /* 8 */
+  CNST_LIMB (0x22),  /* 9 */
+  CNST_LIMB (0x37),  /* 10 */
+  CNST_LIMB (0x59),  /* 11 */
+  CNST_LIMB (0x90),  /* 12 */
+  CNST_LIMB (0xe9),  /* 13 */
+  CNST_LIMB (0x179),  /* 14 */
+  CNST_LIMB (0x262),  /* 15 */
+  CNST_LIMB (0x3db),  /* 16 */
+  CNST_LIMB (0x63d),  /* 17 */
+  CNST_LIMB (0xa18),  /* 18 */
+  CNST_LIMB (0x1055),  /* 19 */
+  CNST_LIMB (0x1a6d),  /* 20 */
+  CNST_LIMB (0x2ac2),  /* 21 */
+  CNST_LIMB (0x452f),  /* 22 */
+  CNST_LIMB (0x6ff1),  /* 23 */
+  CNST_LIMB (0xb520),  /* 24 */
+  CNST_LIMB (0x12511),  /* 25 */
+  CNST_LIMB (0x1da31),  /* 26 */
+  CNST_LIMB (0x2ff42),  /* 27 */
+  CNST_LIMB (0x4d973),  /* 28 */
+  CNST_LIMB (0x7d8b5),  /* 29 */
+  CNST_LIMB (0xcb228),  /* 30 */
+  CNST_LIMB (0x148add),  /* 31 */
+  CNST_LIMB (0x213d05),  /* 32 */
+  CNST_LIMB (0x35c7e2),  /* 33 */
+  CNST_LIMB (0x5704e7),  /* 34 */
+  CNST_LIMB (0x8cccc9),  /* 35 */
+  CNST_LIMB (0xe3d1b0),  /* 36 */
+  CNST_LIMB (0x1709e79),  /* 37 */
+  CNST_LIMB (0x2547029),  /* 38 */
+  CNST_LIMB (0x3c50ea2),  /* 39 */
+  CNST_LIMB (0x6197ecb),  /* 40 */
+  CNST_LIMB (0x9de8d6d),  /* 41 */
+  CNST_LIMB (0xff80c38),  /* 42 */
+  CNST_LIMB (0x19d699a5),  /* 43 */
+  CNST_LIMB (0x29cea5dd),  /* 44 */
+  CNST_LIMB (0x43a53f82),  /* 45 */
+  CNST_LIMB (0x6d73e55f),  /* 46 */
+  CNST_LIMB (0xb11924e1),  /* 47 */
+  CNST_LIMB (0x11e8d0a40),  /* 48 */
+  CNST_LIMB (0x1cfa62f21),  /* 49 */
+  CNST_LIMB (0x2ee333961),  /* 50 */
+  CNST_LIMB (0x4bdd96882),  /* 51 */
+  CNST_LIMB (0x7ac0ca1e3),  /* 52 */
+  CNST_LIMB (0xc69e60a65),  /* 53 */
+  CNST_LIMB (0x1415f2ac48),  /* 54 */
+  CNST_LIMB (0x207fd8b6ad),  /* 55 */
+  CNST_LIMB (0x3495cb62f5),  /* 56 */
+  CNST_LIMB (0x5515a419a2),  /* 57 */
+  CNST_LIMB (0x89ab6f7c97),  /* 58 */
+  CNST_LIMB (0xdec1139639),  /* 59 */
+  CNST_LIMB (0x1686c8312d0),  /* 60 */
+  CNST_LIMB (0x2472d96a909),  /* 61 */
+  CNST_LIMB (0x3af9a19bbd9),  /* 62 */
+  CNST_LIMB (0x5f6c7b064e2),  /* 63 */
+  CNST_LIMB (0x9a661ca20bb),  /* 64 */
+  CNST_LIMB (0xf9d297a859d),  /* 65 */
+  CNST_LIMB (0x19438b44a658),  /* 66 */
+  CNST_LIMB (0x28e0b4bf2bf5),  /* 67 */
+  CNST_LIMB (0x42244003d24d),  /* 68 */
+  CNST_LIMB (0x6b04f4c2fe42),  /* 69 */
+  CNST_LIMB (0xad2934c6d08f),  /* 70 */
+  CNST_LIMB (0x1182e2989ced1),  /* 71 */
+  CNST_LIMB (0x1c5575e509f60),  /* 72 */
+  CNST_LIMB (0x2dd8587da6e31),  /* 73 */
+  CNST_LIMB (0x4a2dce62b0d91),  /* 74 */
+  CNST_LIMB (0x780626e057bc2),  /* 75 */
+  CNST_LIMB (0xc233f54308953),  /* 76 */
+  CNST_LIMB (0x13a3a1c2360515),  /* 77 */
+  CNST_LIMB (0x1fc6e116668e68),  /* 78 */
+  CNST_LIMB (0x336a82d89c937d),  /* 79 */
+  CNST_LIMB (0x533163ef0321e5),  /* 80 */
+  CNST_LIMB (0x869be6c79fb562),  /* 81 */
+  CNST_LIMB (0xd9cd4ab6a2d747),  /* 82 */
+  CNST_LIMB (0x16069317e428ca9),  /* 83 */
+  CNST_LIMB (0x23a367c34e563f0),  /* 84 */
+  CNST_LIMB (0x39a9fadb327f099),  /* 85 */
+  CNST_LIMB (0x5d4d629e80d5489),  /* 86 */
+  CNST_LIMB (0x96f75d79b354522),  /* 87 */
+  CNST_LIMB (0xf444c01834299ab),  /* 88 */
+  CNST_LIMB (0x18b3c1d91e77decd),  /* 89 */
+  CNST_LIMB (0x27f80ddaa1ba7878),  /* 90 */
+  CNST_LIMB (0x40abcfb3c0325745),  /* 91 */
+  CNST_LIMB (0x68a3dd8e61eccfbd),  /* 92 */
+  CNST_LIMB (0xa94fad42221f2702),  /* 93 */
+};
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_11.s b/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_11.s
new file mode 100644
index 0000000..700ac46
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_11.s
@@ -0,0 +1,120 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_gcd_11
+	
+	
+___gmpn_gcd_11:
+
+	
+	jmp	Lodd
+
+	.align	4, 0x90
+Ltop:	cmovc	%rdx, %rdi		
+	cmovc	%rax, %rsi		
+	shr	%cl, %rdi
+Lodd:	mov	%rsi, %rdx
+	sub	%rdi, %rdx		
+	bsf	%rdx, %rcx
+	mov	%rdi, %rax
+	sub	%rsi, %rdi			
+	jnz	Ltop
+
+Lend:	
+	
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_22.s b/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_22.s
new file mode 100644
index 0000000..02be83c
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/gcd_22.s
@@ -0,0 +1,152 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_gcd_22
+	
+	
+___gmpn_gcd_22:
+
+	
+
+	.align	4, 0x90
+Ltop:	mov	%rcx, %r10
+	sub	%rsi, %r10
+	jz	Llowz		
+	mov	%rdx, %r11
+	sbb	%rdi, %r11
+
+	rep;bsf	%r10, %rax		
+
+	mov	%rsi, %r8
+	sub	%rcx, %rsi
+	mov	%rdi, %r9
+	sbb	%rdx, %rdi
+
+Lbck:	cmovc	%r10, %rsi		
+	cmovc	%r11, %rdi		
+	cmovc	%r8, %rcx		
+	cmovc	%r9, %rdx		
+
+	xor	%r10d, %r10d
+	sub	%rax, %r10
+	.byte	0xc4,98,169,0xf7,207
+	.byte	0xc4,226,251,0xf7,246
+	.byte	0xc4,226,251,0xf7,255
+	or	%r9, %rsi
+
+	test	%rdx, %rdx
+	jnz	Ltop
+	test	%rdi, %rdi
+	jnz	Ltop
+
+Lgcd_11:
+	mov	%rcx, %rdi
+
+	jmp	___gmpn_gcd_11
+
+Llowz:
+	
+	
+	mov	%rdx, %r10
+	sub	%rdi, %r10
+	je	Lend
+
+	xor	%r11, %r11
+	mov	%rsi, %r8
+	mov	%rdi, %r9
+	rep;bsf	%r10, %rax		
+	mov	%rdi, %rsi
+	xor	%rdi, %rdi
+	sub	%rdx, %rsi
+	jmp	Lbck
+
+Lend:	mov	%rcx, %rax
+	
+Lret:	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/hamdist.s b/vere/ext/gmp/gen/x86_64-macos/mpn/hamdist.s
new file mode 100644
index 0000000..32c21c6
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/hamdist.s
@@ -0,0 +1,217 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_hamdist
+	
+	
+___gmpn_hamdist:
+
+	
+	push	%rbx
+	push	%rbp
+
+	mov	(%rdi), %r10
+	xor	(%rsi), %r10
+
+	mov	%edx, %r8d
+	and	$3, %r8d
+
+	xor	%ecx, %ecx
+	.byte	0xf3,0x49,0x0f,0xb8,0xc2	
+
+	lea	Ltab(%rip), %r9
+
+	movslq	(%r9,%r8,4), %r8
+	add	%r9, %r8
+	jmp	*%r8
+
+
+L3:	mov	8(%rdi), %r10
+	mov	16(%rdi), %r11
+	xor	8(%rsi), %r10
+	xor	16(%rsi), %r11
+	xor	%ebp, %ebp
+	sub	$4, %rdx
+	jle	Lx3
+	mov	24(%rdi), %r8
+	mov	32(%rdi), %r9
+	add	$24, %rdi
+	add	$24, %rsi
+	jmp	Le3
+
+L0:	mov	8(%rdi), %r9
+	xor	8(%rsi), %r9
+	mov	16(%rdi), %r10
+	mov	24(%rdi), %r11
+	xor	%ebx, %ebx
+	xor	16(%rsi), %r10
+	xor	24(%rsi), %r11
+	add	$32, %rdi
+	add	$32, %rsi
+	sub	$4, %rdx
+	jle	Lx4
+
+	.align	4, 0x90
+Ltop:
+Le0:	.byte	0xf3,0x49,0x0f,0xb8,0xe9	
+	mov	(%rdi), %r8
+	mov	8(%rdi), %r9
+	add	%rbx, %rax
+Le3:	.byte	0xf3,0x49,0x0f,0xb8,0xda	
+	xor	(%rsi), %r8
+	xor	8(%rsi), %r9
+	add	%rbp, %rcx
+Le2:	.byte	0xf3,0x49,0x0f,0xb8,0xeb	
+	mov	16(%rdi), %r10
+	mov	24(%rdi), %r11
+	add	$32, %rdi
+	add	%rbx, %rax
+Le1:	.byte	0xf3,0x49,0x0f,0xb8,0xd8	
+	xor	16(%rsi), %r10
+	xor	24(%rsi), %r11
+	add	$32, %rsi
+	add	%rbp, %rcx
+	sub	$4, %rdx
+	jg	Ltop
+
+Lx4:	.byte	0xf3,0x49,0x0f,0xb8,0xe9	
+	add	%rbx, %rax
+Lx3:	.byte	0xf3,0x49,0x0f,0xb8,0xda	
+	add	%rbp, %rcx
+	.byte	0xf3,0x49,0x0f,0xb8,0xeb	
+	add	%rbx, %rax
+	add	%rbp, %rcx
+Lx2:	add	%rcx, %rax
+Lx1:	pop	%rbp
+	pop	%rbx
+	
+	ret
+
+L2:	mov	8(%rdi), %r11
+	xor	8(%rsi), %r11
+	sub	$2, %rdx
+	jle	Ln2
+	mov	16(%rdi), %r8
+	mov	24(%rdi), %r9
+	xor	%ebx, %ebx
+	xor	16(%rsi), %r8
+	xor	24(%rsi), %r9
+	add	$16, %rdi
+	add	$16, %rsi
+	jmp	Le2
+Ln2:	.byte	0xf3,0x49,0x0f,0xb8,0xcb	
+	jmp	Lx2
+
+L1:	dec	%rdx
+	jle	Lx1
+	mov	8(%rdi), %r8
+	mov	16(%rdi), %r9
+	xor	8(%rsi), %r8
+	xor	16(%rsi), %r9
+	xor	%ebp, %ebp
+	mov	24(%rdi), %r10
+	mov	32(%rdi), %r11
+	add	$40, %rdi
+	add	$8, %rsi
+	jmp	Le1
+
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb.s b/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb.s
new file mode 100644
index 0000000..a5f251b
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb.s
@@ -0,0 +1,124 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+.private_extern __gmpn_invert_limb_table
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_invert_limb
+	
+	
+___gmpn_invert_limb:
+		
+	
+	mov	%rdi, %rax		
+	shr	$55, %rax		
+
+	lea	__gmpn_invert_limb_table(%rip), %r8
+	add	$-512, %r8
+
+	movzwl	(%r8,%rax,2), %ecx	
+
+	
+	mov	%rdi, %rsi		
+	mov	%ecx, %eax	
+	imul	%ecx, %ecx	
+	shr	$24, %rsi		
+	inc	%rsi			
+	imul	%rsi, %rcx		
+	shr	$40, %rcx		
+	sal	$11, %eax		
+	dec	%eax
+	sub	%ecx, %eax	
+
+	
+	mov	$0x1000000000000000, %rcx
+	imul	%rax, %rsi		
+	sub	%rsi, %rcx
+	imul	%rax, %rcx
+	sal	$13, %rax
+	shr	$47, %rcx
+	add	%rax, %rcx		
+
+	
+	mov	%rdi, %rsi		
+	shr	%rsi			
+	sbb	%rax, %rax		
+	sub	%rax, %rsi		
+	imul	%rcx, %rsi		
+	and	%rcx, %rax		
+	shr	%rax			
+	sub	%rsi, %rax		
+	mul	%rcx
+	sal	$31, %rcx
+	shr	%rdx
+	add	%rdx, %rcx		
+
+	mov	%rdi, %rax
+	mul	%rcx
+	add	%rdi, %rax
+	mov	%rcx, %rax
+	adc	%rdi, %rdx
+	sub	%rdx, %rax
+
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb_table.s b/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb_table.s
new file mode 100644
index 0000000..b937cd0
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/invert_limb_table.s
@@ -0,0 +1,313 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+.private_extern __gmpn_invert_limb_table
+
+
+
+
+		.section	__TEXT,__const
+	.align	1, 0x90
+	.globl __gmpn_invert_limb_table
+__gmpn_invert_limb_table:
+	.value	2045
+	.value	2037
+	.value	2029
+	.value	2021
+	.value	2013
+	.value	2005
+	.value	1998
+	.value	1990
+	.value	1983
+	.value	1975
+	.value	1968
+	.value	1960
+	.value	1953
+	.value	1946
+	.value	1938
+	.value	1931
+	.value	1924
+	.value	1917
+	.value	1910
+	.value	1903
+	.value	1896
+	.value	1889
+	.value	1883
+	.value	1876
+	.value	1869
+	.value	1863
+	.value	1856
+	.value	1849
+	.value	1843
+	.value	1836
+	.value	1830
+	.value	1824
+	.value	1817
+	.value	1811
+	.value	1805
+	.value	1799
+	.value	1792
+	.value	1786
+	.value	1780
+	.value	1774
+	.value	1768
+	.value	1762
+	.value	1756
+	.value	1750
+	.value	1745
+	.value	1739
+	.value	1733
+	.value	1727
+	.value	1722
+	.value	1716
+	.value	1710
+	.value	1705
+	.value	1699
+	.value	1694
+	.value	1688
+	.value	1683
+	.value	1677
+	.value	1672
+	.value	1667
+	.value	1661
+	.value	1656
+	.value	1651
+	.value	1646
+	.value	1641
+	.value	1636
+	.value	1630
+	.value	1625
+	.value	1620
+	.value	1615
+	.value	1610
+	.value	1605
+	.value	1600
+	.value	1596
+	.value	1591
+	.value	1586
+	.value	1581
+	.value	1576
+	.value	1572
+	.value	1567
+	.value	1562
+	.value	1558
+	.value	1553
+	.value	1548
+	.value	1544
+	.value	1539
+	.value	1535
+	.value	1530
+	.value	1526
+	.value	1521
+	.value	1517
+	.value	1513
+	.value	1508
+	.value	1504
+	.value	1500
+	.value	1495
+	.value	1491
+	.value	1487
+	.value	1483
+	.value	1478
+	.value	1474
+	.value	1470
+	.value	1466
+	.value	1462
+	.value	1458
+	.value	1454
+	.value	1450
+	.value	1446
+	.value	1442
+	.value	1438
+	.value	1434
+	.value	1430
+	.value	1426
+	.value	1422
+	.value	1418
+	.value	1414
+	.value	1411
+	.value	1407
+	.value	1403
+	.value	1399
+	.value	1396
+	.value	1392
+	.value	1388
+	.value	1384
+	.value	1381
+	.value	1377
+	.value	1374
+	.value	1370
+	.value	1366
+	.value	1363
+	.value	1359
+	.value	1356
+	.value	1352
+	.value	1349
+	.value	1345
+	.value	1342
+	.value	1338
+	.value	1335
+	.value	1332
+	.value	1328
+	.value	1325
+	.value	1322
+	.value	1318
+	.value	1315
+	.value	1312
+	.value	1308
+	.value	1305
+	.value	1302
+	.value	1299
+	.value	1295
+	.value	1292
+	.value	1289
+	.value	1286
+	.value	1283
+	.value	1280
+	.value	1276
+	.value	1273
+	.value	1270
+	.value	1267
+	.value	1264
+	.value	1261
+	.value	1258
+	.value	1255
+	.value	1252
+	.value	1249
+	.value	1246
+	.value	1243
+	.value	1240
+	.value	1237
+	.value	1234
+	.value	1231
+	.value	1228
+	.value	1226
+	.value	1223
+	.value	1220
+	.value	1217
+	.value	1214
+	.value	1211
+	.value	1209
+	.value	1206
+	.value	1203
+	.value	1200
+	.value	1197
+	.value	1195
+	.value	1192
+	.value	1189
+	.value	1187
+	.value	1184
+	.value	1181
+	.value	1179
+	.value	1176
+	.value	1173
+	.value	1171
+	.value	1168
+	.value	1165
+	.value	1163
+	.value	1160
+	.value	1158
+	.value	1155
+	.value	1153
+	.value	1150
+	.value	1148
+	.value	1145
+	.value	1143
+	.value	1140
+	.value	1138
+	.value	1135
+	.value	1133
+	.value	1130
+	.value	1128
+	.value	1125
+	.value	1123
+	.value	1121
+	.value	1118
+	.value	1116
+	.value	1113
+	.value	1111
+	.value	1109
+	.value	1106
+	.value	1104
+	.value	1102
+	.value	1099
+	.value	1097
+	.value	1095
+	.value	1092
+	.value	1090
+	.value	1088
+	.value	1086
+	.value	1083
+	.value	1081
+	.value	1079
+	.value	1077
+	.value	1074
+	.value	1072
+	.value	1070
+	.value	1068
+	.value	1066
+	.value	1064
+	.value	1061
+	.value	1059
+	.value	1057
+	.value	1055
+	.value	1053
+	.value	1051
+	.value	1049
+	.value	1047
+	.value	1044
+	.value	1042
+	.value	1040
+	.value	1038
+	.value	1036
+	.value	1034
+	.value	1032
+	.value	1030
+	.value	1028
+	.value	1026
+	.value	1024
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/ior_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/ior_n.s
new file mode 100644
index 0000000..7a15d18
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/ior_n.s
@@ -0,0 +1,158 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_ior_n
+	
+	
+___gmpn_ior_n:
+
+	
+	mov	(%rdx), %r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	or	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	or	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+Lb00:	mov	8(%rdx), %r9
+	or	(%rsi), %r8
+	or	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+Le10:	mov	24(%rdx), %r9
+	lea	32(%rdx), %rdx
+	or	16(%rsi), %r8
+	or	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/iorn_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/iorn_n.s
new file mode 100644
index 0000000..b14be40
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/iorn_n.s
@@ -0,0 +1,163 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+
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+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_iorn_n
+	
+	
+___gmpn_iorn_n:
+
+	
+	mov	(%rdx), %r8
+	not	%r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	or	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	or	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	not	%r8
+Lb00:	mov	8(%rdx), %r9
+	not	%r9
+	or	(%rsi), %r8
+	or	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+	not	%r8
+Le10:	mov	24(%rdx), %r9
+	not	%r9
+	lea	32(%rdx), %rdx
+	or	16(%rsi), %r8
+	or	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/jacobitab.h b/vere/ext/gmp/gen/x86_64-macos/mpn/jacobitab.h
new file mode 100644
index 0000000..4bdbfcc
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/jacobitab.h
@@ -0,0 +1,13 @@
+ 0, 0, 0, 0, 0,12, 8, 4, 1, 1, 1, 1, 1,13, 9, 5,
+ 2, 2, 2, 2, 2, 6,10,14, 3, 3, 3, 3, 3, 7,11,15,
+ 4,16, 6,18, 4, 0,12, 8, 5,17, 7,19, 5, 1,13, 9,
+ 6,18, 4,16, 6,10,14, 2, 7,19, 5,17, 7,11,15, 3,
+ 8,10, 9,11, 8, 4, 0,12, 9,11, 8,10, 9, 5, 1,13,
+10, 9,11, 8,10,14, 2, 6,11, 8,10, 9,11,15, 3, 7,
+12,22,24,20,12, 8, 4, 0,13,23,25,21,13, 9, 5, 1,
+25,21,13,23,14, 2, 6,10,24,20,12,22,15, 3, 7,11,
+16, 6,18, 4,16,16,16,16,17, 7,19, 5,17,17,17,17,
+18, 4,16, 6,18,22,19,23,19, 5,17, 7,19,23,18,22,
+20,12,22,24,20,20,20,20,21,13,23,25,21,21,21,21,
+22,24,20,12,22,19,23,18,23,25,21,13,23,18,22,19,
+24,20,12,22,15, 3, 7,11,25,21,13,23,14, 2, 6,10,
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/lshift.s b/vere/ext/gmp/gen/x86_64-macos/mpn/lshift.s
new file mode 100644
index 0000000..6463cbe
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/lshift.s
@@ -0,0 +1,211 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_lshift
+	
+	
+___gmpn_lshift:
+
+	
+	movd	%ecx, %xmm4
+	mov	$64, %eax
+	sub	%ecx, %eax
+	movd	%eax, %xmm5
+
+	neg	%ecx
+	mov	-8(%rsi,%rdx,8), %rax
+	shr	%cl, %rax
+
+	cmp	$3, %rdx
+	jle	Lbc
+
+	lea	(%rdi,%rdx,8), %ecx
+	test	$8, %cl
+	jz	Lrp_aligned
+
+
+	movq	-8(%rsi,%rdx,8), %xmm0
+	movq	-16(%rsi,%rdx,8), %xmm1
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movq	%xmm0, -8(%rdi,%rdx,8)
+	dec	%rdx
+
+Lrp_aligned:
+	lea	1(%rdx), %r8d
+
+	and	$6, %r8d
+	jz	Lba0
+	cmp	$4, %r8d
+	jz	Lba4
+	jc	Lba2
+Lba6:	add	$-4, %rdx
+	jmp	Li56
+Lba0:	add	$-6, %rdx
+	jmp	Li70
+Lba4:	add	$-2, %rdx
+	jmp	Li34
+Lba2:	add	$-8, %rdx
+	jle	Lend
+
+	.align	4, 0x90
+Ltop:	movdqu	40(%rsi,%rdx,8), %xmm1
+	movdqu	48(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, 48(%rdi,%rdx,8)
+Li70:
+	movdqu	24(%rsi,%rdx,8), %xmm1
+	movdqu	32(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, 32(%rdi,%rdx,8)
+Li56:
+	movdqu	8(%rsi,%rdx,8), %xmm1
+	movdqu	16(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, 16(%rdi,%rdx,8)
+Li34:
+	movdqu	-8(%rsi,%rdx,8), %xmm1
+	movdqu	(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, (%rdi,%rdx,8)
+	sub	$8, %rdx
+	jg	Ltop
+
+Lend:	test	$1, %dl
+	jnz	Lend8
+
+	movdqu	(%rsi), %xmm1
+	pxor	%xmm0, %xmm0
+	punpcklqdq  %xmm1, %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, (%rdi)
+	
+	ret
+
+
+	.align	4, 0x90
+Lbc:	dec	%edx
+	jz	Lend8
+
+	movq	(%rsi,%rdx,8), %xmm1
+	movq	-8(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movq	%xmm0, (%rdi,%rdx,8)
+	sub	$2, %edx
+	jl	Lend8
+	movq	8(%rsi), %xmm1
+	movq	(%rsi), %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movq	%xmm0, 8(%rdi)
+
+Lend8:movq	(%rsi), %xmm0
+	psllq	%xmm4, %xmm0
+	movq	%xmm0, (%rdi)
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/lshiftc.s b/vere/ext/gmp/gen/x86_64-macos/mpn/lshiftc.s
new file mode 100644
index 0000000..ffd7e35
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/lshiftc.s
@@ -0,0 +1,222 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_lshiftc
+	
+	
+___gmpn_lshiftc:
+
+	
+	movd	%ecx, %xmm4
+	mov	$64, %eax
+	sub	%ecx, %eax
+	movd	%eax, %xmm5
+
+	neg	%ecx
+	mov	-8(%rsi,%rdx,8), %rax
+	shr	%cl, %rax
+
+	pcmpeqb	%xmm3, %xmm3		
+
+	cmp	$3, %rdx
+	jle	Lbc
+
+	lea	(%rdi,%rdx,8), %ecx
+	test	$8, %cl
+	jz	Lrp_aligned
+
+
+	movq	-8(%rsi,%rdx,8), %xmm0
+	movq	-16(%rsi,%rdx,8), %xmm1
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movq	%xmm0, -8(%rdi,%rdx,8)
+	dec	%rdx
+
+Lrp_aligned:
+	lea	1(%rdx), %r8d
+
+	and	$6, %r8d
+	jz	Lba0
+	cmp	$4, %r8d
+	jz	Lba4
+	jc	Lba2
+Lba6:	add	$-4, %rdx
+	jmp	Li56
+Lba0:	add	$-6, %rdx
+	jmp	Li70
+Lba4:	add	$-2, %rdx
+	jmp	Li34
+Lba2:	add	$-8, %rdx
+	jle	Lend
+
+	.align	4, 0x90
+Ltop:	movdqu	40(%rsi,%rdx,8), %xmm1
+	movdqu	48(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movdqa	%xmm0, 48(%rdi,%rdx,8)
+Li70:
+	movdqu	24(%rsi,%rdx,8), %xmm1
+	movdqu	32(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movdqa	%xmm0, 32(%rdi,%rdx,8)
+Li56:
+	movdqu	8(%rsi,%rdx,8), %xmm1
+	movdqu	16(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movdqa	%xmm0, 16(%rdi,%rdx,8)
+Li34:
+	movdqu	-8(%rsi,%rdx,8), %xmm1
+	movdqu	(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm0
+	psrlq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movdqa	%xmm0, (%rdi,%rdx,8)
+	sub	$8, %rdx
+	jg	Ltop
+
+Lend:	test	$1, %dl
+	jnz	Lend8
+
+	movdqu	(%rsi), %xmm1
+	pxor	%xmm0, %xmm0
+	punpcklqdq  %xmm1, %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movdqa	%xmm0, (%rdi)
+	
+	ret
+
+
+	.align	4, 0x90
+Lbc:	dec	%edx
+	jz	Lend8
+
+	movq	(%rsi,%rdx,8), %xmm1
+	movq	-8(%rsi,%rdx,8), %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movq	%xmm0, (%rdi,%rdx,8)
+	sub	$2, %edx
+	jl	Lend8
+	movq	8(%rsi), %xmm1
+	movq	(%rsi), %xmm0
+	psllq	%xmm4, %xmm1
+	psrlq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	pxor	%xmm3, %xmm0
+	movq	%xmm0, 8(%rdi)
+
+Lend8:movq	(%rsi), %xmm0
+	psllq	%xmm4, %xmm0
+	pxor	%xmm3, %xmm0
+	movq	%xmm0, (%rdi)
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_1.s
new file mode 100644
index 0000000..a9b4801
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_1.s
@@ -0,0 +1,240 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_mod_1_1p
+	
+	
+___gmpn_mod_1_1p:
+
+	
+	push	%rbp
+	push	%rbx
+	mov	%rdx, %rbx
+	mov	%rcx, %r8
+
+	mov	-8(%rdi, %rsi, 8), %rax
+	cmp	$3, %rsi
+	jnc	Lfirst
+	mov	-16(%rdi, %rsi, 8), %rbp
+	jmp	Lreduce_two
+
+Lfirst:
+	
+	mov	24(%r8), %r11
+	mul	%r11
+	mov	-24(%rdi, %rsi, 8), %rbp
+	add	%rax, %rbp
+	mov	-16(%rdi, %rsi, 8), %rax
+	adc	%rdx, %rax
+	sbb	%rcx, %rcx
+	sub	$4, %rsi
+	jc	Lreduce_three
+
+	mov	%r11, %r10
+	sub	%rbx, %r10
+
+	.align	4, 0x90
+Ltop:	and	%r11, %rcx
+	lea	(%r10, %rbp), %r9
+	mul	%r11
+	add	%rbp, %rcx
+	mov	(%rdi, %rsi, 8), %rbp
+	cmovc	%r9, %rcx
+	add	%rax, %rbp
+	mov	%rcx, %rax
+	adc	%rdx, %rax
+	sbb	%rcx, %rcx
+	sub	$1, %rsi
+	jnc	Ltop
+
+Lreduce_three:
+	
+	and	%rbx, %rcx
+	sub	%rcx, %rax
+
+Lreduce_two:
+	mov	8(%r8), %ecx
+	test	%ecx, %ecx
+	jz	Lnormalized
+
+	
+	mulq	16(%r8)
+	xor	%r9, %r9
+	add	%rax, %rbp
+	adc	%rdx, %r9
+	mov	%r9, %rax
+
+	
+
+	shld	%cl, %rbp, %rax
+
+	shl	%cl, %rbp
+	jmp	Ludiv
+
+Lnormalized:
+	mov	%rax, %r9
+	sub	%rbx, %r9
+	cmovnc	%r9, %rax
+
+Ludiv:
+	lea	1(%rax), %r9
+	mulq	(%r8)
+	add	%rbp, %rax
+	adc	%r9, %rdx
+	imul	%rbx, %rdx
+	sub	%rdx, %rbp
+	cmp	%rbp, %rax
+	lea	(%rbx, %rbp), %rax
+	cmovnc	%rbp, %rax
+	cmp	%rbx, %rax
+	jnc	Lfix
+Lok:	shr	%cl, %rax
+
+	pop	%rbx
+	pop	%rbp
+	
+	ret
+Lfix:	sub	%rbx, %rax
+	jmp	Lok
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_mod_1_1p_cps
+	
+	
+___gmpn_mod_1_1p_cps:
+
+	
+	push	%rbp
+	bsr	%rsi, %rcx
+	push	%rbx
+	mov	%rdi, %rbx
+	push	%r12
+	xor	$63, %ecx
+	mov	%rsi, %r12
+	mov	%ecx, %ebp
+	sal	%cl, %r12
+	mov	%r12, %rdi		
+	
+
+	
+	call	___gmpn_invert_limb
+
+	neg	%r12
+	mov	%r12, %r8
+	mov	%rax, (%rbx)		
+	mov	%rbp, 8(%rbx)		
+	imul	%rax, %r12
+	mov	%r12, 24(%rbx)		
+	mov	%ebp, %ecx
+	test	%ecx, %ecx
+	jz	Lz
+
+	mov	$1, %edx
+
+	shld	%cl, %rax, %rdx
+
+	imul	%rdx, %r8
+	shr	%cl, %r8
+	mov	%r8, 16(%rbx)		
+Lz:
+	pop	%r12
+	pop	%rbx
+	pop	%rbp
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_2.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_2.s
new file mode 100644
index 0000000..9feb233
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_2.s
@@ -0,0 +1,251 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_mod_1s_2p
+	
+	
+___gmpn_mod_1s_2p:
+
+	
+	push	%r14
+	test	$1, %sil
+	mov	%rdx, %r14
+	push	%r13
+	mov	%rcx, %r13
+	push	%r12
+	push	%rbp
+	push	%rbx
+	mov	16(%rcx), %r10
+	mov	24(%rcx), %rbx
+	mov	32(%rcx), %rbp
+	je	Lb0
+	dec	%rsi
+	je	Lone
+	mov	-8(%rdi,%rsi,8), %rax
+	mul	%r10
+	mov	%rax, %r9
+	mov	%rdx, %r8
+	mov	(%rdi,%rsi,8), %rax
+	add	-16(%rdi,%rsi,8), %r9
+	adc	$0, %r8
+	mul	%rbx
+	add	%rax, %r9
+	adc	%rdx, %r8
+	jmp	L11
+
+Lb0:	mov	-8(%rdi,%rsi,8), %r8
+	mov	-16(%rdi,%rsi,8), %r9
+
+L11:	sub	$4, %rsi
+	jb	Led2
+	lea	40(%rdi,%rsi,8), %rdi
+	mov	-40(%rdi), %r11
+	mov	-32(%rdi), %rax
+	jmp	Lm0
+
+	.align	4, 0x90
+Ltop:	mov	-24(%rdi), %r9
+	add	%rax, %r11
+	mov	-16(%rdi), %rax
+	adc	%rdx, %r12
+	mul	%r10
+	add	%rax, %r9
+	mov	%r11, %rax
+	mov	%rdx, %r8
+	adc	$0, %r8
+	mul	%rbx
+	add	%rax, %r9
+	mov	%r12, %rax
+	adc	%rdx, %r8
+	mul	%rbp
+	sub	$2, %rsi
+	jb	Led1
+	mov	-40(%rdi), %r11
+	add	%rax, %r9
+	mov	-32(%rdi), %rax
+	adc	%rdx, %r8
+Lm0:	mul	%r10
+	add	%rax, %r11
+	mov	%r9, %rax
+	mov	%rdx, %r12
+	adc	$0, %r12
+	mul	%rbx
+	add	%rax, %r11
+	lea	-32(%rdi), %rdi		
+	mov	%r8, %rax
+	adc	%rdx, %r12
+	mul	%rbp
+	sub	$2, %rsi
+	jae	Ltop
+
+Led0:	mov	%r11, %r9
+	mov	%r12, %r8
+Led1:	add	%rax, %r9
+	adc	%rdx, %r8
+Led2:	mov	8(%r13), %edi		
+	mov	%r8, %rax
+	mov	%r9, %r8
+	mul	%r10
+	add	%rax, %r8
+	adc	$0, %rdx
+L1:	xor	%ecx, %ecx
+	mov	%r8, %r9
+	sub	%edi, %ecx
+	shr	%cl, %r9
+	mov	%edi, %ecx
+	sal	%cl, %rdx
+	or	%rdx, %r9
+	sal	%cl, %r8
+	mov	%r9, %rax
+	mulq	(%r13)
+	mov	%rax, %rsi
+	inc	%r9
+	add	%r8, %rsi
+	adc	%r9, %rdx
+	imul	%r14, %rdx
+	sub	%rdx, %r8
+	lea	(%r8,%r14), %rax
+	cmp	%r8, %rsi
+	cmovc	%rax, %r8
+	mov	%r8, %rax
+	sub	%r14, %rax
+	cmovc	%r8, %rax
+	mov	%edi, %ecx
+	shr	%cl, %rax
+	pop	%rbx
+	pop	%rbp
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	
+	ret
+Lone:
+	mov	(%rdi), %r8
+	mov	8(%rcx), %edi
+	xor	%rdx, %rdx
+	jmp	L1
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_mod_1s_2p_cps
+	
+	
+___gmpn_mod_1s_2p_cps:
+
+	
+	push	%rbp
+	bsr	%rsi, %rcx
+	push	%rbx
+	mov	%rdi, %rbx
+	push	%r12
+	xor	$63, %ecx
+	mov	%rsi, %r12
+	mov	%ecx, %ebp	
+	sal	%cl, %r12		
+	mov	%r12, %rdi		
+	
+
+	
+	call	___gmpn_invert_limb
+
+	mov	%r12, %r8
+	mov	%rax, %r11
+	mov	%rax, (%rbx)		
+	mov	%rbp, 8(%rbx)		
+	neg	%r8
+	mov	%ebp, %ecx
+	mov	$1, %esi
+
+	shld	%cl, %rax, %rsi	
+
+	imul	%r8, %rsi
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 16(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	lea	(%rdx,%r12), %rsi
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %rsi
+	mov	%r11, %rax
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 24(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	add	%rdx, %r12
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %r12
+
+	shr	%cl, %r12
+	mov	%r12, 32(%rbx)		
+
+	pop	%r12
+	pop	%rbx
+	pop	%rbp
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_4.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_4.s
new file mode 100644
index 0000000..675a4eb
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_1_4.s
@@ -0,0 +1,282 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_mod_1s_4p
+	
+	
+___gmpn_mod_1s_4p:
+
+	
+	push	%r15
+	push	%r14
+	push	%r13
+	push	%r12
+	push	%rbp
+	push	%rbx
+
+	mov	%rdx, %r15
+	mov	%rcx, %r14
+	mov	16(%rcx), %r11		
+	mov	24(%rcx), %rbx		
+	mov	32(%rcx), %rbp		
+	mov	40(%rcx), %r13		
+	mov	48(%rcx), %r12		
+	xor	%r8d, %r8d
+	mov	%esi, %edx
+	and	$3, %edx
+	je	Lb0
+	cmp	$2, %edx
+	jc	Lb1
+	je	Lb2
+
+Lb3:	lea	-24(%rdi,%rsi,8), %rdi
+	mov	8(%rdi), %rax
+	mul	%r11
+	mov	(%rdi), %r9
+	add	%rax, %r9
+	adc	%rdx, %r8
+	mov	16(%rdi), %rax
+	mul	%rbx
+	jmp	Lm0
+
+	.align	3, 0x90
+Lb0:	lea	-32(%rdi,%rsi,8), %rdi
+	mov	8(%rdi), %rax
+	mul	%r11
+	mov	(%rdi), %r9
+	add	%rax, %r9
+	adc	%rdx, %r8
+	mov	16(%rdi), %rax
+	mul	%rbx
+	add	%rax, %r9
+	adc	%rdx, %r8
+	mov	24(%rdi), %rax
+	mul	%rbp
+	jmp	Lm0
+
+	.align	3, 0x90
+Lb1:	lea	-8(%rdi,%rsi,8), %rdi
+	mov	(%rdi), %r9
+	jmp	Lm1
+
+	.align	3, 0x90
+Lb2:	lea	-16(%rdi,%rsi,8), %rdi
+	mov	8(%rdi), %r8
+	mov	(%rdi), %r9
+	jmp	Lm1
+
+	.align	4, 0x90
+Ltop:	mov	-24(%rdi), %rax
+	mov	-32(%rdi), %r10
+	mul	%r11			
+	add	%rax, %r10
+	mov	-16(%rdi), %rax
+	mov	$0, %ecx
+	adc	%rdx, %rcx
+	mul	%rbx			
+	add	%rax, %r10
+	mov	-8(%rdi), %rax
+	adc	%rdx, %rcx
+	sub	$32, %rdi
+	mul	%rbp			
+	add	%rax, %r10
+	mov	%r13, %rax
+	adc	%rdx, %rcx
+	mul	%r9			
+	add	%rax, %r10
+	mov	%r12, %rax
+	adc	%rdx, %rcx
+	mul	%r8			
+	mov	%r10, %r9
+	mov	%rcx, %r8
+Lm0:	add	%rax, %r9
+	adc	%rdx, %r8
+Lm1:	sub	$4, %rsi
+	ja	Ltop
+
+Lend:	mov	8(%r14), %esi
+	mov	%r8, %rax
+	mul	%r11
+	mov	%rax, %r8
+	add	%r9, %r8
+	adc	$0, %rdx
+	xor	%ecx, %ecx
+	sub	%esi, %ecx
+	mov	%r8, %rdi
+	shr	%cl, %rdi
+	mov	%esi, %ecx
+	sal	%cl, %rdx
+	or	%rdx, %rdi
+	mov	%rdi, %rax
+	mulq	(%r14)
+	mov	%r15, %rbx
+	mov	%rax, %r9
+	sal	%cl, %r8
+	inc	%rdi
+	add	%r8, %r9
+	adc	%rdi, %rdx
+	imul	%rbx, %rdx
+	sub	%rdx, %r8
+	lea	(%r8,%rbx), %rax
+	cmp	%r8, %r9
+	cmovc	%rax, %r8
+	mov	%r8, %rax
+	sub	%rbx, %rax
+	cmovc	%r8, %rax
+	shr	%cl, %rax
+	pop	%rbx
+	pop	%rbp
+	pop	%r12
+	pop	%r13
+	pop	%r14
+	pop	%r15
+	
+	ret
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_mod_1s_4p_cps
+	
+	
+___gmpn_mod_1s_4p_cps:
+
+	
+	push	%rbp
+	bsr	%rsi, %rcx
+	push	%rbx
+	mov	%rdi, %rbx
+	push	%r12
+	xor	$63, %ecx
+	mov	%rsi, %r12
+	mov	%ecx, %ebp	
+	sal	%cl, %r12		
+	mov	%r12, %rdi		
+	
+
+	
+	call	___gmpn_invert_limb
+
+	mov	%r12, %r8
+	mov	%rax, %r11
+	mov	%rax, (%rbx)		
+	mov	%rbp, 8(%rbx)		
+	neg	%r8
+	mov	%ebp, %ecx
+	mov	$1, %esi
+
+	shld	%cl, %rax, %rsi	
+
+	imul	%r8, %rsi
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 16(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	lea	(%rdx,%r12), %rsi
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %rsi
+	mov	%r11, %rax
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 24(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	lea	(%rdx,%r12), %rsi
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %rsi
+	mov	%r11, %rax
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 32(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	lea	(%rdx,%r12), %rsi
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %rsi
+	mov	%r11, %rax
+	mul	%rsi
+
+	add	%rsi, %rdx
+	shr	%cl, %rsi
+	mov	%rsi, 40(%rbx)		
+
+	not	%rdx
+	imul	%r12, %rdx
+	add	%rdx, %r12
+	cmp	%rdx, %rax
+	cmovnc	%rdx, %r12
+
+	shr	%cl, %r12
+	mov	%r12, 48(%rbx)		
+
+	pop	%r12
+	pop	%rbx
+	pop	%rbp
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mod_34lsub1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_34lsub1.s
new file mode 100644
index 0000000..141c810
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mod_34lsub1.s
@@ -0,0 +1,246 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_mod_34lsub1
+	
+	
+___gmpn_mod_34lsub1:
+
+	
+
+	mov	$0x0000FFFFFFFFFFFF, %r11
+
+	mov	(%rdi), %rax
+
+	cmp	$2, %rsi
+	ja	Lgt2
+
+	jb	Lone
+
+	mov	8(%rdi), %rsi
+	mov	%rax, %rdx
+	shr	$48, %rax		
+
+	and	%r11, %rdx		
+	add	%rdx, %rax
+	mov	%esi, %edx
+
+	shr	$32, %rsi		
+	add	%rsi, %rax
+
+	shl	$16, %rdx		
+	add	%rdx, %rax
+Lone:	
+	ret
+
+
+
+
+
+Lgt2:	mov	8(%rdi), %rcx
+	mov	16(%rdi), %rdx
+	xor	%r9, %r9
+	add	$24, %rdi
+	sub	$12, %rsi
+	jc	Lend
+	.align	4, 0x90
+Ltop:
+	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	24(%rdi), %rax
+	adc	32(%rdi), %rcx
+	adc	40(%rdi), %rdx
+	adc	$0, %r9
+	add	48(%rdi), %rax
+	adc	56(%rdi), %rcx
+	adc	64(%rdi), %rdx
+	adc	$0, %r9
+	add	$72, %rdi
+	sub	$9, %rsi
+	jnc	Ltop
+
+Lend:
+	lea	Ltab(%rip), %r8
+	movslq	36(%r8,%rsi,4), %r10
+	add	%r10, %r8
+	jmp	*%r8
+
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
+	.set	L8_tmp, L8-Ltab
+	.long	L8_tmp
+
+	.text
+
+L6:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	$24, %rdi
+L3:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	jmp	Lcj1
+
+L7:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	$24, %rdi
+L4:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	$24, %rdi
+L1:	add	(%rdi), %rax
+	adc	$0, %rcx
+	jmp	Lcj2
+
+L8:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	$24, %rdi
+L5:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+	adc	16(%rdi), %rdx
+	adc	$0, %r9
+	add	$24, %rdi
+L2:	add	(%rdi), %rax
+	adc	8(%rdi), %rcx
+
+Lcj2:	adc	$0, %rdx
+Lcj1:	adc	$0, %r9
+L0:	add	%r9, %rax
+	adc	$0, %rcx
+	adc	$0, %rdx
+	adc	$0, %rax
+
+	mov	%rax, %rdi		
+	shr	$48, %rax		
+
+	and	%r11, %rdi		
+	mov	%ecx, %r10d	
+
+	shr	$32, %rcx		
+
+	add	%rdi, %rax		
+	movzwl	%dx, %edi		
+	shl	$16, %r10		
+
+	add	%rcx, %rax		
+	shr	$16, %rdx		
+
+	add	%r10, %rax		
+	shl	$32, %rdi		
+
+	add	%rdx, %rax		
+	add	%rdi, %rax		
+
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mode1o.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mode1o.s
new file mode 100644
index 0000000..c715f7c
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mode1o.s
@@ -0,0 +1,189 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_modexact_1_odd
+	
+	
+___gmpn_modexact_1_odd:
+
+	
+	mov	$0, %ecx
+
+
+	.globl	___gmpn_modexact_1c_odd
+	
+	
+___gmpn_modexact_1c_odd:
+
+	
+Lent:
+	
+	
+	
+	
+
+	mov	%rdx, %r8		
+	shr	%edx		
+
+	lea	___gmp_binvert_limb_table(%rip), %r9
+
+
+
+	and	$127, %edx
+	mov	%rcx, %r10		
+
+	movzbl	(%r9,%rdx), %edx	
+
+	mov	(%rdi), %rax		
+	lea	(%rdi,%rsi,8), %r11	
+	mov	%r8, %rdi		
+
+	lea	(%rdx,%rdx), %ecx	
+	imul	%edx, %edx	
+
+	neg	%rsi			
+
+	imul	%edi, %edx	
+
+	sub	%edx, %ecx	
+
+	lea	(%rcx,%rcx), %edx	
+	imul	%ecx, %ecx	
+
+	imul	%edi, %ecx	
+
+	sub	%ecx, %edx	
+	xor	%ecx, %ecx	
+
+	lea	(%rdx,%rdx), %r9	
+	imul	%rdx, %rdx		
+
+	imul	%r8, %rdx		
+
+	sub	%rdx, %r9		
+	mov	%r10, %rdx		
+
+	
+
+	inc	%rsi
+	jz	Lone
+
+
+	.align	4, 0x90
+Ltop:
+	
+	
+	
+	
+	
+	
+	
+	
+
+	sub	%rdx, %rax		
+
+	adc	$0, %rcx		
+	imul	%r9, %rax		
+
+	mul	%r8			
+
+	mov	(%r11,%rsi,8), %rax	
+	sub	%rcx, %rax		
+	setc	%cl		
+
+	inc	%rsi
+	jnz	Ltop
+
+
+Lone:
+	sub	%rdx, %rax		
+
+	adc	$0, %rcx		
+	imul	%r9, %rax		
+
+	mul	%r8			
+
+	lea	(%rcx,%rdx), %rax	
+	
+	ret
+
+	
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mp_bases.c b/vere/ext/gmp/gen/x86_64-macos/mpn/mp_bases.c
new file mode 100644
index 0000000..c72c531
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mp_bases.c
@@ -0,0 +1,268 @@
+/* This file generated by gen-bases.c - DO NOT EDIT. */
+
+#include "gmp-impl.h"
+
+#if GMP_NUMB_BITS != 64
+Error, error, this data is for 64 bits
+#endif
+
+const struct bases mp_bases[257] =
+{
+  /*   0 */ { 0, 0, 0, 0, 0 },
+  /*   1 */ { 0, 0, 0, 0, 0 },
+  /*   2 */ { 64, CNST_LIMB(0xffffffffffffffff), CNST_LIMB(0x1fffffffffffffff), CNST_LIMB(0x1), CNST_LIMB(0x0) },
+  /*   3 */ { 40, CNST_LIMB(0xa1849cc1a9a9e94e), CNST_LIMB(0x32b803473f7ad0f3), CNST_LIMB(0xa8b8b452291fe821), CNST_LIMB(0x846d550e37b5063d) },
+  /*   4 */ { 32, CNST_LIMB(0x7fffffffffffffff), CNST_LIMB(0x3fffffffffffffff), CNST_LIMB(0x2), CNST_LIMB(0x0) },
+  /*   5 */ { 27, CNST_LIMB(0x6e40d1a4143dcb94), CNST_LIMB(0x4a4d3c25e68dc57f), CNST_LIMB(0x6765c793fa10079d), CNST_LIMB(0x3ce9a36f23c0fc90) },
+  /*   6 */ { 24, CNST_LIMB(0x6308c91b702a7cf4), CNST_LIMB(0x52b803473f7ad0f3), CNST_LIMB(0x41c21cb8e1000000), CNST_LIMB(0xf24f62335024a295) },
+  /*   7 */ { 22, CNST_LIMB(0x5b3064eb3aa6d388), CNST_LIMB(0x59d5d9fd5010b366), CNST_LIMB(0x3642798750226111), CNST_LIMB(0x2df495ccaa57147b) },
+  /*   8 */ { 21, CNST_LIMB(0x5555555555555555), CNST_LIMB(0x5fffffffffffffff), CNST_LIMB(0x3), CNST_LIMB(0x0) },
+  /*   9 */ { 20, CNST_LIMB(0x50c24e60d4d4f4a7), CNST_LIMB(0x6570068e7ef5a1e7), CNST_LIMB(0xa8b8b452291fe821), CNST_LIMB(0x846d550e37b5063d) },
+  /*  10 */ { 19, CNST_LIMB(0x4d104d427de7fbcc), CNST_LIMB(0x6a4d3c25e68dc57f), CNST_LIMB(0x8ac7230489e80000), CNST_LIMB(0xd83c94fb6d2ac34a) },
+  /*  11 */ { 18, CNST_LIMB(0x4a00270775914e88), CNST_LIMB(0x6eb3a9f01975077f), CNST_LIMB(0x4d28cb56c33fa539), CNST_LIMB(0xa8adf7ae45e7577b) },
+  /*  12 */ { 17, CNST_LIMB(0x4768ce0d05818e12), CNST_LIMB(0x72b803473f7ad0f3), CNST_LIMB(0x1eca170c00000000), CNST_LIMB(0xa10c2bec5da8f8f) },
+  /*  13 */ { 17, CNST_LIMB(0x452e53e365907bda), CNST_LIMB(0x766a008e4788cbcd), CNST_LIMB(0x780c7372621bd74d), CNST_LIMB(0x10f4becafe412ec3) },
+  /*  14 */ { 16, CNST_LIMB(0x433cfffb4b5aae55), CNST_LIMB(0x79d5d9fd5010b366), CNST_LIMB(0x1e39a5057d810000), CNST_LIMB(0xf08480f672b4e86) },
+  /*  15 */ { 16, CNST_LIMB(0x41867711b4f85355), CNST_LIMB(0x7d053f6d26089673), CNST_LIMB(0x5b27ac993df97701), CNST_LIMB(0x6779c7f90dc42f48) },
+  /*  16 */ { 16, CNST_LIMB(0x3fffffffffffffff), CNST_LIMB(0x7fffffffffffffff), CNST_LIMB(0x4), CNST_LIMB(0x0) },
+  /*  17 */ { 15, CNST_LIMB(0x3ea16afd58b10966), CNST_LIMB(0x82cc7edf592262cf), CNST_LIMB(0x27b95e997e21d9f1), CNST_LIMB(0x9c71e11bab279323) },
+  /*  18 */ { 15, CNST_LIMB(0x3d64598d154dc4de), CNST_LIMB(0x8570068e7ef5a1e7), CNST_LIMB(0x5da0e1e53c5c8000), CNST_LIMB(0x5dfaa697ec6f6a1c) },
+  /*  19 */ { 15, CNST_LIMB(0x3c43c23018bb5563), CNST_LIMB(0x87ef05ae409a0288), CNST_LIMB(0xd2ae3299c1c4aedb), CNST_LIMB(0x3711783f6be7e9ec) },
+  /*  20 */ { 14, CNST_LIMB(0x3b3b9a42873069c7), CNST_LIMB(0x8a4d3c25e68dc57f), CNST_LIMB(0x16bcc41e90000000), CNST_LIMB(0x6849b86a12b9b01e) },
+  /*  21 */ { 14, CNST_LIMB(0x3a4898f06cf41ac9), CNST_LIMB(0x8c8ddd448f8b845a), CNST_LIMB(0x2d04b7fdd9c0ef49), CNST_LIMB(0x6bf097ba5ca5e239) },
+  /*  22 */ { 14, CNST_LIMB(0x39680b13582e7c18), CNST_LIMB(0x8eb3a9f01975077f), CNST_LIMB(0x5658597bcaa24000), CNST_LIMB(0x7b8015c8d7af8f08) },
+  /*  23 */ { 14, CNST_LIMB(0x3897b2b751ae561a), CNST_LIMB(0x90c10500d63aa658), CNST_LIMB(0xa0e2073737609371), CNST_LIMB(0x975a24b3a3151b38) },
+  /*  24 */ { 13, CNST_LIMB(0x37d5aed131f19c98), CNST_LIMB(0x92b803473f7ad0f3), CNST_LIMB(0xc29e98000000000), CNST_LIMB(0x50bd367972689db1) },
+  /*  25 */ { 13, CNST_LIMB(0x372068d20a1ee5ca), CNST_LIMB(0x949a784bcd1b8afe), CNST_LIMB(0x14adf4b7320334b9), CNST_LIMB(0x8c240c4aecb13bb5) },
+  /*  26 */ { 13, CNST_LIMB(0x3676867e5d60de29), CNST_LIMB(0x966a008e4788cbcd), CNST_LIMB(0x226ed36478bfa000), CNST_LIMB(0xdbd2e56854e118c9) },
+  /*  27 */ { 13, CNST_LIMB(0x35d6deeb388df86f), CNST_LIMB(0x982809d5be7072db), CNST_LIMB(0x383d9170b85ff80b), CNST_LIMB(0x2351ffcaa9c7c4ae) },
+  /*  28 */ { 13, CNST_LIMB(0x354071d61c77fa2e), CNST_LIMB(0x99d5d9fd5010b366), CNST_LIMB(0x5a3c23e39c000000), CNST_LIMB(0x6b24188ca33b0636) },
+  /*  29 */ { 13, CNST_LIMB(0x34b260c5671b18ac), CNST_LIMB(0x9b74948f5532da4b), CNST_LIMB(0x8e65137388122bcd), CNST_LIMB(0xcc3dceaf2b8ba99d) },
+  /*  30 */ { 13, CNST_LIMB(0x342be986572b45cc), CNST_LIMB(0x9d053f6d26089673), CNST_LIMB(0xdd41bb36d259e000), CNST_LIMB(0x2832e835c6c7d6b6) },
+  /*  31 */ { 12, CNST_LIMB(0x33ac61b998fbbdf2), CNST_LIMB(0x9e88c6b3626a72aa), CNST_LIMB(0xaee5720ee830681), CNST_LIMB(0x76b6aa272e1873c5) },
+  /*  32 */ { 12, CNST_LIMB(0x3333333333333333), CNST_LIMB(0x9fffffffffffffff), CNST_LIMB(0x5), CNST_LIMB(0x0) },
+  /*  33 */ { 12, CNST_LIMB(0x32bfd90114c12861), CNST_LIMB(0xa16bad3758efd873), CNST_LIMB(0x172588ad4f5f0981), CNST_LIMB(0x61eaf5d402c7bf4f) },
+  /*  34 */ { 12, CNST_LIMB(0x3251dcf6169e45f2), CNST_LIMB(0xa2cc7edf592262cf), CNST_LIMB(0x211e44f7d02c1000), CNST_LIMB(0xeeb658123ffb27ec) },
+  /*  35 */ { 12, CNST_LIMB(0x31e8d59f180dc630), CNST_LIMB(0xa4231623369e78e5), CNST_LIMB(0x2ee56725f06e5c71), CNST_LIMB(0x5d5e3762e6fdf509) },
+  /*  36 */ { 12, CNST_LIMB(0x3184648db8153e7a), CNST_LIMB(0xa570068e7ef5a1e7), CNST_LIMB(0x41c21cb8e1000000), CNST_LIMB(0xf24f62335024a295) },
+  /*  37 */ { 12, CNST_LIMB(0x312434e89c35dacd), CNST_LIMB(0xa6b3d78b6d3b24fb), CNST_LIMB(0x5b5b57f8a98a5dd1), CNST_LIMB(0x66ae7831762efb6f) },
+  /*  38 */ { 12, CNST_LIMB(0x30c7fa349460a541), CNST_LIMB(0xa7ef05ae409a0288), CNST_LIMB(0x7dcff8986ea31000), CNST_LIMB(0x47388865a00f544) },
+  /*  39 */ { 12, CNST_LIMB(0x306f6f4c8432bc6d), CNST_LIMB(0xa92203d587039cc1), CNST_LIMB(0xabd4211662a6b2a1), CNST_LIMB(0x7d673c33a123b54c) },
+  /*  40 */ { 12, CNST_LIMB(0x301a557ffbfdd252), CNST_LIMB(0xaa4d3c25e68dc57f), CNST_LIMB(0xe8d4a51000000000), CNST_LIMB(0x19799812dea11197) },
+  /*  41 */ { 11, CNST_LIMB(0x2fc873d1fda55f3b), CNST_LIMB(0xab7110e6ce866f2b), CNST_LIMB(0x7a32956ad081b79), CNST_LIMB(0xc27e62e0686feae) },
+  /*  42 */ { 11, CNST_LIMB(0x2f799652a4e6dc49), CNST_LIMB(0xac8ddd448f8b845a), CNST_LIMB(0x9f49aaff0e86800), CNST_LIMB(0x9b6e7507064ce7c7) },
+  /*  43 */ { 11, CNST_LIMB(0x2f2d8d8f64460aad), CNST_LIMB(0xada3f5fb9c415052), CNST_LIMB(0xce583bb812d37b3), CNST_LIMB(0x3d9ac2bf66cfed94) },
+  /*  44 */ { 11, CNST_LIMB(0x2ee42e164e8f53a4), CNST_LIMB(0xaeb3a9f01975077f), CNST_LIMB(0x109b79a654c00000), CNST_LIMB(0xed46bc50ce59712a) },
+  /*  45 */ { 11, CNST_LIMB(0x2e9d500984041dbd), CNST_LIMB(0xafbd42b465836767), CNST_LIMB(0x1543beff214c8b95), CNST_LIMB(0x813d97e2c89b8d46) },
+  /*  46 */ { 11, CNST_LIMB(0x2e58cec05a6a8144), CNST_LIMB(0xb0c10500d63aa658), CNST_LIMB(0x1b149a79459a3800), CNST_LIMB(0x2e81751956af8083) },
+  /*  47 */ { 11, CNST_LIMB(0x2e1688743ef9104c), CNST_LIMB(0xb1bf311e95d00de3), CNST_LIMB(0x224edfb5434a830f), CNST_LIMB(0xdd8e0a95e30c0988) },
+  /*  48 */ { 11, CNST_LIMB(0x2dd65df7a583598f), CNST_LIMB(0xb2b803473f7ad0f3), CNST_LIMB(0x2b3fb00000000000), CNST_LIMB(0x7ad4dd48a0b5b167) },
+  /*  49 */ { 11, CNST_LIMB(0x2d9832759d5369c4), CNST_LIMB(0xb3abb3faa02166cc), CNST_LIMB(0x3642798750226111), CNST_LIMB(0x2df495ccaa57147b) },
+  /*  50 */ { 11, CNST_LIMB(0x2d5beb38dcd1394c), CNST_LIMB(0xb49a784bcd1b8afe), CNST_LIMB(0x43c33c1937564800), CNST_LIMB(0xe392010175ee5962) },
+  /*  51 */ { 11, CNST_LIMB(0x2d216f7943e2ba6a), CNST_LIMB(0xb5848226989d33c3), CNST_LIMB(0x54411b2441c3cd8b), CNST_LIMB(0x84eaf11b2fe7738e) },
+  /*  52 */ { 11, CNST_LIMB(0x2ce8a82efbb3ff2c), CNST_LIMB(0xb66a008e4788cbcd), CNST_LIMB(0x6851455acd400000), CNST_LIMB(0x3a1e3971e008995d) },
+  /*  53 */ { 11, CNST_LIMB(0x2cb17fea7ad7e332), CNST_LIMB(0xb74b1fd64e0753c6), CNST_LIMB(0x80a23b117c8feb6d), CNST_LIMB(0xfd7a462344ffce25) },
+  /*  54 */ { 11, CNST_LIMB(0x2c7be2b0cfa1ba50), CNST_LIMB(0xb82809d5be7072db), CNST_LIMB(0x9dff7d32d5dc1800), CNST_LIMB(0x9eca40b40ebcef8a) },
+  /*  55 */ { 11, CNST_LIMB(0x2c47bddba92d7463), CNST_LIMB(0xb900e6160002ccfe), CNST_LIMB(0xc155af6faeffe6a7), CNST_LIMB(0x52fa161a4a48e43d) },
+  /*  56 */ { 11, CNST_LIMB(0x2c14fffcaa8b131e), CNST_LIMB(0xb9d5d9fd5010b366), CNST_LIMB(0xebb7392e00000000), CNST_LIMB(0x1607a2cbacf930c1) },
+  /*  57 */ { 10, CNST_LIMB(0x2be398c3a38be053), CNST_LIMB(0xbaa708f58014d37c), CNST_LIMB(0x50633659656d971), CNST_LIMB(0x97a014f8e3be55f1) },
+  /*  58 */ { 10, CNST_LIMB(0x2bb378e758451068), CNST_LIMB(0xbb74948f5532da4b), CNST_LIMB(0x5fa8624c7fba400), CNST_LIMB(0x568df8b76cbf212c) },
+  /*  59 */ { 10, CNST_LIMB(0x2b8492108be5e5f7), CNST_LIMB(0xbc3e9ca2e1a05533), CNST_LIMB(0x717d9faa73c5679), CNST_LIMB(0x20ba7c4b4e6ef492) },
+  /*  60 */ { 10, CNST_LIMB(0x2b56d6c70d55481b), CNST_LIMB(0xbd053f6d26089673), CNST_LIMB(0x86430aac6100000), CNST_LIMB(0xe81ee46b9ef492f5) },
+  /*  61 */ { 10, CNST_LIMB(0x2b2a3a608c72ddd5), CNST_LIMB(0xbdc899ab3ff56c5e), CNST_LIMB(0x9e64d9944b57f29), CNST_LIMB(0x9dc0d10d51940416) },
+  /*  62 */ { 10, CNST_LIMB(0x2afeb0f1060c7e41), CNST_LIMB(0xbe88c6b3626a72aa), CNST_LIMB(0xba5ca5392cb0400), CNST_LIMB(0x5fa8ed2f450272a5) },
+  /*  63 */ { 10, CNST_LIMB(0x2ad42f3c9aca595c), CNST_LIMB(0xbf45e08bcf06554e), CNST_LIMB(0xdab2ce1d022cd81), CNST_LIMB(0x2ba9eb8c5e04e641) },
+  /*  64 */ { 10, CNST_LIMB(0x2aaaaaaaaaaaaaaa), CNST_LIMB(0xbfffffffffffffff), CNST_LIMB(0x6), CNST_LIMB(0x0) },
+  /*  65 */ { 10, CNST_LIMB(0x2a82193a13425883), CNST_LIMB(0xc0b73cb42e16914c), CNST_LIMB(0x12aeed5fd3e2d281), CNST_LIMB(0xb67759cc00287bf1) },
+  /*  66 */ { 10, CNST_LIMB(0x2a5a717672f66450), CNST_LIMB(0xc16bad3758efd873), CNST_LIMB(0x15c3da1572d50400), CNST_LIMB(0x78621feeb7f4ed33) },
+  /*  67 */ { 10, CNST_LIMB(0x2a33aa6e56d9c71c), CNST_LIMB(0xc21d6713f453f356), CNST_LIMB(0x194c05534f75ee29), CNST_LIMB(0x43d55b5f72943bc0) },
+  /*  68 */ { 10, CNST_LIMB(0x2a0dbbaa3bdfcea4), CNST_LIMB(0xc2cc7edf592262cf), CNST_LIMB(0x1d56299ada100000), CNST_LIMB(0x173decb64d1d4409) },
+  /*  69 */ { 10, CNST_LIMB(0x29e89d244eb4bfaf), CNST_LIMB(0xc379084815b5774c), CNST_LIMB(0x21f2a089a4ff4f79), CNST_LIMB(0xe29fb54fd6b6074f) },
+  /*  70 */ { 10, CNST_LIMB(0x29c44740d7db51e6), CNST_LIMB(0xc4231623369e78e5), CNST_LIMB(0x2733896c68d9a400), CNST_LIMB(0xa1f1f5c210d54e62) },
+  /*  71 */ { 10, CNST_LIMB(0x29a0b2c743b14d74), CNST_LIMB(0xc4caba789e2b8687), CNST_LIMB(0x2d2cf2c33b533c71), CNST_LIMB(0x6aac7f9bfafd57b2) },
+  /*  72 */ { 10, CNST_LIMB(0x297dd8dbb7c22a2d), CNST_LIMB(0xc570068e7ef5a1e7), CNST_LIMB(0x33f506e440000000), CNST_LIMB(0x3b563c2478b72ee2) },
+  /*  73 */ { 10, CNST_LIMB(0x295bb2f9285c8c1b), CNST_LIMB(0xc6130af40bc0ecbf), CNST_LIMB(0x3ba43bec1d062211), CNST_LIMB(0x12b536b574e92d1b) },
+  /*  74 */ { 10, CNST_LIMB(0x293a3aebe2be1c92), CNST_LIMB(0xc6b3d78b6d3b24fb), CNST_LIMB(0x4455872d8fd4e400), CNST_LIMB(0xdf86c03020404fa5) },
+  /*  75 */ { 10, CNST_LIMB(0x29196acc815ebd9f), CNST_LIMB(0xc7527b930c965bf2), CNST_LIMB(0x4e2694539f2f6c59), CNST_LIMB(0xa34adf02234eea8e) },
+  /*  76 */ { 10, CNST_LIMB(0x28f93cfb40f5c22a), CNST_LIMB(0xc7ef05ae409a0288), CNST_LIMB(0x5938006c18900000), CNST_LIMB(0x6f46eb8574eb59dd) },
+  /*  77 */ { 10, CNST_LIMB(0x28d9ac1badc64117), CNST_LIMB(0xc88983ed6985bae5), CNST_LIMB(0x65ad9912474aa649), CNST_LIMB(0x42459b481df47cec) },
+  /*  78 */ { 10, CNST_LIMB(0x28bab310a196b478), CNST_LIMB(0xc92203d587039cc1), CNST_LIMB(0x73ae9ff4241ec400), CNST_LIMB(0x1b424b95d80ca505) },
+  /*  79 */ { 10, CNST_LIMB(0x289c4cf88b774469), CNST_LIMB(0xc9b892675266f66c), CNST_LIMB(0x836612ee9c4ce1e1), CNST_LIMB(0xf2c1b982203a0dac) },
+  /*  80 */ { 10, CNST_LIMB(0x287e7529fb244e91), CNST_LIMB(0xca4d3c25e68dc57f), CNST_LIMB(0x9502f90000000000), CNST_LIMB(0xb7cdfd9d7bdbab7d) },
+  /*  81 */ { 10, CNST_LIMB(0x286127306a6a7a53), CNST_LIMB(0xcae00d1cfdeb43cf), CNST_LIMB(0xa8b8b452291fe821), CNST_LIMB(0x846d550e37b5063d) },
+  /*  82 */ { 10, CNST_LIMB(0x28445ec93f792b1e), CNST_LIMB(0xcb7110e6ce866f2b), CNST_LIMB(0xbebf59a07dab4400), CNST_LIMB(0x57931eeaf85cf64f) },
+  /*  83 */ { 10, CNST_LIMB(0x282817e1038950fa), CNST_LIMB(0xcc0052b18b0e2a19), CNST_LIMB(0xd7540d4093bc3109), CNST_LIMB(0x305a944507c82f47) },
+  /*  84 */ { 10, CNST_LIMB(0x280c4e90c9ab1f45), CNST_LIMB(0xcc8ddd448f8b845a), CNST_LIMB(0xf2b96616f1900000), CNST_LIMB(0xe007ccc9c22781a) },
+  /*  85 */ { 9, CNST_LIMB(0x27f0ff1bc1ee87cd), CNST_LIMB(0xcd19bb053fb0284e), CNST_LIMB(0x336de62af2bca35), CNST_LIMB(0x3e92c42e000eeed4) },
+  /*  86 */ { 9, CNST_LIMB(0x27d625ecf571c340), CNST_LIMB(0xcda3f5fb9c415052), CNST_LIMB(0x39235ec33d49600), CNST_LIMB(0x1ebe59130db2795e) },
+  /*  87 */ { 9, CNST_LIMB(0x27bbbf95282fcd45), CNST_LIMB(0xce2c97d694adab3f), CNST_LIMB(0x3f674e539585a17), CNST_LIMB(0x268859e90f51b89) },
+  /*  88 */ { 9, CNST_LIMB(0x27a1c8c8ddaf84da), CNST_LIMB(0xceb3a9f01975077f), CNST_LIMB(0x4645b6958000000), CNST_LIMB(0xd24cde0463108cfa) },
+  /*  89 */ { 9, CNST_LIMB(0x27883e5e7df3f518), CNST_LIMB(0xcf393550f3aa6906), CNST_LIMB(0x4dcb74afbc49c19), CNST_LIMB(0xa536009f37adc383) },
+  /*  90 */ { 9, CNST_LIMB(0x276f1d4c9847e90e), CNST_LIMB(0xcfbd42b465836767), CNST_LIMB(0x56064e1d18d9a00), CNST_LIMB(0x7cea06ce1c9ace10) },
+  /*  91 */ { 9, CNST_LIMB(0x275662a841b30191), CNST_LIMB(0xd03fda8b97997f33), CNST_LIMB(0x5f04fe2cd8a39fb), CNST_LIMB(0x58db032e72e8ba43) },
+  /*  92 */ { 9, CNST_LIMB(0x273e0ba38d15a47b), CNST_LIMB(0xd0c10500d63aa658), CNST_LIMB(0x68d74421f5c0000), CNST_LIMB(0x388cc17cae105447) },
+  /*  93 */ { 9, CNST_LIMB(0x2726158c1b13cf03), CNST_LIMB(0xd140c9faa1e5439e), CNST_LIMB(0x738df1f6ab4827d), CNST_LIMB(0x1b92672857620ce0) },
+  /*  94 */ { 9, CNST_LIMB(0x270e7dc9c01d8e9b), CNST_LIMB(0xd1bf311e95d00de3), CNST_LIMB(0x7f3afbc9cfb5e00), CNST_LIMB(0x18c6a9575c2ade4) },
+  /*  95 */ { 9, CNST_LIMB(0x26f741dd3f070d61), CNST_LIMB(0xd23c41d42727c808), CNST_LIMB(0x8bf187fba88f35f), CNST_LIMB(0xd44da7da8e44b24f) },
+  /*  96 */ { 9, CNST_LIMB(0x26e05f5f16c2159e), CNST_LIMB(0xd2b803473f7ad0f3), CNST_LIMB(0x99c600000000000), CNST_LIMB(0xaa2f78f1b4cc6794) },
+  /*  97 */ { 9, CNST_LIMB(0x26c9d3fe61e80598), CNST_LIMB(0xd3327c6ab49ca6c8), CNST_LIMB(0xa8ce21eb6531361), CNST_LIMB(0x843c067d091ee4cc) },
+  /*  98 */ { 9, CNST_LIMB(0x26b39d7fc6ddab08), CNST_LIMB(0xd3abb3faa02166cc), CNST_LIMB(0xb92112c1a0b6200), CNST_LIMB(0x62005e1e913356e3) },
+  /*  99 */ { 9, CNST_LIMB(0x269db9bc7772a5cc), CNST_LIMB(0xd423b07e986aa967), CNST_LIMB(0xcad7718b8747c43), CNST_LIMB(0x4316eed01dedd518) },
+  /* 100 */ { 9, CNST_LIMB(0x268826a13ef3fde6), CNST_LIMB(0xd49a784bcd1b8afe), CNST_LIMB(0xde0b6b3a7640000), CNST_LIMB(0x2725dd1d243aba0e) },
+  /* 101 */ { 9, CNST_LIMB(0x2672e22d9dbdbd9f), CNST_LIMB(0xd510118708a8f8dd), CNST_LIMB(0xf2d8cf5fe6d74c5), CNST_LIMB(0xddd9057c24cb54f) },
+  /* 102 */ { 9, CNST_LIMB(0x265dea72f169cc99), CNST_LIMB(0xd5848226989d33c3), CNST_LIMB(0x1095d25bfa712600), CNST_LIMB(0xedeee175a736d2a1) },
+  /* 103 */ { 9, CNST_LIMB(0x26493d93a8cb2514), CNST_LIMB(0xd5f7cff41e09aeb8), CNST_LIMB(0x121b7c4c3698faa7), CNST_LIMB(0xc4699f3df8b6b328) },
+  /* 104 */ { 9, CNST_LIMB(0x2634d9c282f3ef82), CNST_LIMB(0xd66a008e4788cbcd), CNST_LIMB(0x13c09e8d68000000), CNST_LIMB(0x9ebbe7d859cb5a7c) },
+  /* 105 */ { 9, CNST_LIMB(0x2620bd41d8933adc), CNST_LIMB(0xd6db196a761949d9), CNST_LIMB(0x15876ccb0b709ca9), CNST_LIMB(0x7c828b9887eb2179) },
+  /* 106 */ { 9, CNST_LIMB(0x260ce662ef04088a), CNST_LIMB(0xd74b1fd64e0753c6), CNST_LIMB(0x17723c2976da2a00), CNST_LIMB(0x5d652ab99001adcf) },
+  /* 107 */ { 9, CNST_LIMB(0x25f95385547353fd), CNST_LIMB(0xd7ba18f93502e409), CNST_LIMB(0x198384e9c259048b), CNST_LIMB(0x4114f1754e5d7b32) },
+  /* 108 */ { 9, CNST_LIMB(0x25e60316448db8e1), CNST_LIMB(0xd82809d5be7072db), CNST_LIMB(0x1bbde41dfeec0000), CNST_LIMB(0x274b7c902f7e0188) },
+  /* 109 */ { 9, CNST_LIMB(0x25d2f390152f74f5), CNST_LIMB(0xd894f74b06ef8b40), CNST_LIMB(0x1e241d6e3337910d), CNST_LIMB(0xfc9e0fbb32e210c) },
+  /* 110 */ { 9, CNST_LIMB(0x25c02379aa9ad043), CNST_LIMB(0xd900e6160002ccfe), CNST_LIMB(0x20b91cee9901ee00), CNST_LIMB(0xf4afa3e594f8ea1f) },
+  /* 111 */ { 9, CNST_LIMB(0x25ad9165f2c18907), CNST_LIMB(0xd96bdad2acb5f5ef), CNST_LIMB(0x237ff9079863dfef), CNST_LIMB(0xcd85c32e9e4437b0) },
+  /* 112 */ { 9, CNST_LIMB(0x259b3bf36735c90c), CNST_LIMB(0xd9d5d9fd5010b366), CNST_LIMB(0x267bf47000000000), CNST_LIMB(0xa9bbb147e0dd92a8) },
+  /* 113 */ { 9, CNST_LIMB(0x258921cb955e7693), CNST_LIMB(0xda3ee7f38e181ed0), CNST_LIMB(0x29b08039fbeda7f1), CNST_LIMB(0x8900447b70e8eb82) },
+  /* 114 */ { 9, CNST_LIMB(0x257741a2ac9170af), CNST_LIMB(0xdaa708f58014d37c), CNST_LIMB(0x2d213df34f65f200), CNST_LIMB(0x6b0a92adaad5848a) },
+  /* 115 */ { 9, CNST_LIMB(0x25659a3711bc827d), CNST_LIMB(0xdb0e4126bcc86bd7), CNST_LIMB(0x30d201d957a7c2d3), CNST_LIMB(0x4f990ad8740f0ee5) },
+  /* 116 */ { 9, CNST_LIMB(0x25542a50f84b9c39), CNST_LIMB(0xdb74948f5532da4b), CNST_LIMB(0x34c6d52160f40000), CNST_LIMB(0x3670a9663a8d3610) },
+  /* 117 */ { 9, CNST_LIMB(0x2542f0c20000377d), CNST_LIMB(0xdbda071cc67e6db5), CNST_LIMB(0x3903f855d8f4c755), CNST_LIMB(0x1f5c44188057be3c) },
+  /* 118 */ { 9, CNST_LIMB(0x2531ec64d772bd64), CNST_LIMB(0xdc3e9ca2e1a05533), CNST_LIMB(0x3d8de5c8ec59b600), CNST_LIMB(0xa2bea956c4e4977) },
+  /* 119 */ { 9, CNST_LIMB(0x25211c1ce2fb5a6e), CNST_LIMB(0xdca258dca9331635), CNST_LIMB(0x4269541d1ff01337), CNST_LIMB(0xed68b23033c3637e) },
+  /* 120 */ { 9, CNST_LIMB(0x25107ed5e7c3ec3b), CNST_LIMB(0xdd053f6d26089673), CNST_LIMB(0x479b38e478000000), CNST_LIMB(0xc99cf624e50549c5) },
+  /* 121 */ { 9, CNST_LIMB(0x25001383bac8a744), CNST_LIMB(0xdd6753e032ea0efe), CNST_LIMB(0x4d28cb56c33fa539), CNST_LIMB(0xa8adf7ae45e7577b) },
+  /* 122 */ { 9, CNST_LIMB(0x24efd921f390bce3), CNST_LIMB(0xddc899ab3ff56c5e), CNST_LIMB(0x5317871fa13aba00), CNST_LIMB(0x8a5bc740b1c113e5) },
+  /* 123 */ { 9, CNST_LIMB(0x24dfceb3a26bb203), CNST_LIMB(0xde29142e0e01401f), CNST_LIMB(0x596d2f44de9fa71b), CNST_LIMB(0x6e6c7efb81cfbb9b) },
+  /* 124 */ { 9, CNST_LIMB(0x24cff3430a0341a7), CNST_LIMB(0xde88c6b3626a72aa), CNST_LIMB(0x602fd125c47c0000), CNST_LIMB(0x54aba5c5cada5f10) },
+  /* 125 */ { 9, CNST_LIMB(0x24c045e15c149931), CNST_LIMB(0xdee7b471b3a9507d), CNST_LIMB(0x6765c793fa10079d), CNST_LIMB(0x3ce9a36f23c0fc90) },
+  /* 126 */ { 9, CNST_LIMB(0x24b0c5a679267ae2), CNST_LIMB(0xdf45e08bcf06554e), CNST_LIMB(0x6f15be069b847e00), CNST_LIMB(0x26fb43de2c8cd2a8) },
+  /* 127 */ { 9, CNST_LIMB(0x24a171b0b31461c8), CNST_LIMB(0xdfa34e1177c23362), CNST_LIMB(0x7746b3e82a77047f), CNST_LIMB(0x12b94793db8486a1) },
+  /* 128 */ { 9, CNST_LIMB(0x2492492492492492), CNST_LIMB(0xdfffffffffffffff), CNST_LIMB(0x7), CNST_LIMB(0x0) },
+  /* 129 */ { 9, CNST_LIMB(0x24834b2c9d85cdfe), CNST_LIMB(0xe05bf942dbbc2145), CNST_LIMB(0x894953f7ea890481), CNST_LIMB(0xdd5deca404c0156d) },
+  /* 130 */ { 9, CNST_LIMB(0x247476f924137501), CNST_LIMB(0xe0b73cb42e16914c), CNST_LIMB(0x932abffea4848200), CNST_LIMB(0xbd51373330291de0) },
+  /* 131 */ { 9, CNST_LIMB(0x2465cbc00a40cec0), CNST_LIMB(0xe111cd1d5133412e), CNST_LIMB(0x9dacb687d3d6a163), CNST_LIMB(0x9fa4025d66f23085) },
+  /* 132 */ { 9, CNST_LIMB(0x245748bc980e0427), CNST_LIMB(0xe16bad3758efd873), CNST_LIMB(0xa8d8102a44840000), CNST_LIMB(0x842530ee2db4949d) },
+  /* 133 */ { 9, CNST_LIMB(0x2448ed2f49eb0633), CNST_LIMB(0xe1c4dfab90aab5ef), CNST_LIMB(0xb4b60f9d140541e5), CNST_LIMB(0x6aa7f2766b03dc25) },
+  /* 134 */ { 9, CNST_LIMB(0x243ab85da36e3167), CNST_LIMB(0xe21d6713f453f356), CNST_LIMB(0xc15065d4856e4600), CNST_LIMB(0x53035ba7ebf32e8d) },
+  /* 135 */ { 9, CNST_LIMB(0x242ca99203ea8c18), CNST_LIMB(0xe27545fba4fe385a), CNST_LIMB(0xceb1363f396d23c7), CNST_LIMB(0x3d12091fc9fb4914) },
+  /* 136 */ { 9, CNST_LIMB(0x241ec01b7cce4ea0), CNST_LIMB(0xe2cc7edf592262cf), CNST_LIMB(0xdce31b2488000000), CNST_LIMB(0x28b1cb81b1ef1849) },
+  /* 137 */ { 9, CNST_LIMB(0x2410fb4da9b3b0fc), CNST_LIMB(0xe323142dc8c66b55), CNST_LIMB(0xebf12a24bca135c9), CNST_LIMB(0x15c35be67ae3e2c9) },
+  /* 138 */ { 9, CNST_LIMB(0x24035a808a0f315e), CNST_LIMB(0xe379084815b5774c), CNST_LIMB(0xfbe6f8dbf88f4a00), CNST_LIMB(0x42a17bd09be1ff0) },
+  /* 139 */ { 8, CNST_LIMB(0x23f5dd105c67ab9d), CNST_LIMB(0xe3ce5d822ff4b643), CNST_LIMB(0x1ef156c084ce761), CNST_LIMB(0x8bf461f03cf0bbf) },
+  /* 140 */ { 8, CNST_LIMB(0x23e8825d7b05abb1), CNST_LIMB(0xe4231623369e78e5), CNST_LIMB(0x20c4e3b94a10000), CNST_LIMB(0xf3fbb43f68a32d05) },
+  /* 141 */ { 8, CNST_LIMB(0x23db49cc3a0866fe), CNST_LIMB(0xe4773465d54aded7), CNST_LIMB(0x22b0695a08ba421), CNST_LIMB(0xd84f44c48564dc19) },
+  /* 142 */ { 8, CNST_LIMB(0x23ce32c4c6cfb9f5), CNST_LIMB(0xe4caba789e2b8687), CNST_LIMB(0x24b4f35d7a4c100), CNST_LIMB(0xbe58ebcce7956abe) },
+  /* 143 */ { 8, CNST_LIMB(0x23c13cb308ab6ab7), CNST_LIMB(0xe51daa7e60fdd34c), CNST_LIMB(0x26d397284975781), CNST_LIMB(0xa5fac463c7c134b7) },
+  /* 144 */ { 8, CNST_LIMB(0x23b4670682c0c709), CNST_LIMB(0xe570068e7ef5a1e7), CNST_LIMB(0x290d74100000000), CNST_LIMB(0x8f19241e28c7d757) },
+  /* 145 */ { 8, CNST_LIMB(0x23a7b13237187c8b), CNST_LIMB(0xe5c1d0b53bc09fca), CNST_LIMB(0x2b63b3a37866081), CNST_LIMB(0x799a6d046c0ae1ae) },
+  /* 146 */ { 8, CNST_LIMB(0x239b1aac8ac74728), CNST_LIMB(0xe6130af40bc0ecbf), CNST_LIMB(0x2dd789f4d894100), CNST_LIMB(0x6566e37d746a9e40) },
+  /* 147 */ { 8, CNST_LIMB(0x238ea2ef2b24c379), CNST_LIMB(0xe663b741df9c37c0), CNST_LIMB(0x306a35e51b58721), CNST_LIMB(0x526887dbfb5f788f) },
+  /* 148 */ { 8, CNST_LIMB(0x23824976f4045a26), CNST_LIMB(0xe6b3d78b6d3b24fb), CNST_LIMB(0x331d01712e10000), CNST_LIMB(0x408af3382b8efd3d) },
+  /* 149 */ { 8, CNST_LIMB(0x23760dc3d6e4d729), CNST_LIMB(0xe7036db376537b90), CNST_LIMB(0x35f14200a827c61), CNST_LIMB(0x2fbb374806ec05f1) },
+  /* 150 */ { 8, CNST_LIMB(0x2369ef58c30bd43e), CNST_LIMB(0xe7527b930c965bf2), CNST_LIMB(0x38e858b62216100), CNST_LIMB(0x1fe7c0f0afce87fe) },
+  /* 151 */ { 8, CNST_LIMB(0x235dedbb8e82aa1c), CNST_LIMB(0xe7a102f9d39a9331), CNST_LIMB(0x3c03b2c13176a41), CNST_LIMB(0x11003d517540d32e) },
+  /* 152 */ { 8, CNST_LIMB(0x23520874dfeb1ffd), CNST_LIMB(0xe7ef05ae409a0288), CNST_LIMB(0x3f44c9b21000000), CNST_LIMB(0x2f5810f98eff0dc) },
+  /* 153 */ { 8, CNST_LIMB(0x23463f1019228dd7), CNST_LIMB(0xe83c856dd81804b7), CNST_LIMB(0x42ad23cef3113c1), CNST_LIMB(0xeb72e35e7840d910) },
+  /* 154 */ { 8, CNST_LIMB(0x233a911b42aa9b3c), CNST_LIMB(0xe88983ed6985bae5), CNST_LIMB(0x463e546b19a2100), CNST_LIMB(0xd27de19593dc3614) },
+  /* 155 */ { 8, CNST_LIMB(0x232efe26f7cf33f9), CNST_LIMB(0xe8d602d948f83829), CNST_LIMB(0x49f9fc3f96684e1), CNST_LIMB(0xbaf391fd3e5e6fc2) },
+  /* 156 */ { 8, CNST_LIMB(0x232385c65381b485), CNST_LIMB(0xe92203d587039cc1), CNST_LIMB(0x4de1c9c5dc10000), CNST_LIMB(0xa4bd38c55228c81d) },
+  /* 157 */ { 8, CNST_LIMB(0x2318278edde1b39b), CNST_LIMB(0xe96d887e26cd57b7), CNST_LIMB(0x51f77994116d2a1), CNST_LIMB(0x8fc5a8de8e1de782) },
+  /* 158 */ { 8, CNST_LIMB(0x230ce3187a6c2be9), CNST_LIMB(0xe9b892675266f66c), CNST_LIMB(0x563cd6bb3398100), CNST_LIMB(0x7bf9265bea9d3a3b) },
+  /* 159 */ { 8, CNST_LIMB(0x2301b7fd56ca21bb), CNST_LIMB(0xea03231d8d8224ba), CNST_LIMB(0x5ab3bb270beeb01), CNST_LIMB(0x69454b325983dccd) },
+  /* 160 */ { 8, CNST_LIMB(0x22f6a5d9da38341c), CNST_LIMB(0xea4d3c25e68dc57f), CNST_LIMB(0x5f5e10000000000), CNST_LIMB(0x5798ee2308c39df9) },
+  /* 161 */ { 8, CNST_LIMB(0x22ebac4c9580d89f), CNST_LIMB(0xea96defe264b59be), CNST_LIMB(0x643dce0ec16f501), CNST_LIMB(0x46e40ba0fa66a753) },
+  /* 162 */ { 8, CNST_LIMB(0x22e0caf633834beb), CNST_LIMB(0xeae00d1cfdeb43cf), CNST_LIMB(0x6954fe21e3e8100), CNST_LIMB(0x3717b0870b0db3a7) },
+  /* 163 */ { 8, CNST_LIMB(0x22d601796a418886), CNST_LIMB(0xeb28c7f233bdd372), CNST_LIMB(0x6ea5b9755f440a1), CNST_LIMB(0x2825e6775d11cdeb) },
+  /* 164 */ { 8, CNST_LIMB(0x22cb4f7aec6fd8b4), CNST_LIMB(0xeb7110e6ce866f2b), CNST_LIMB(0x74322a1c0410000), CNST_LIMB(0x1a01a1c09d1b4dac) },
+  /* 165 */ { 8, CNST_LIMB(0x22c0b4a15b80d83e), CNST_LIMB(0xebb8e95d3f7d9df2), CNST_LIMB(0x79fc8b6ae8a46e1), CNST_LIMB(0xc9eb0a8bebc8f3e) },
+  /* 166 */ { 8, CNST_LIMB(0x22b630953a28f77a), CNST_LIMB(0xec0052b18b0e2a19), CNST_LIMB(0x80072a66d512100), CNST_LIMB(0xffe357ff59e6a004) },
+  /* 167 */ { 8, CNST_LIMB(0x22abc300df54ca7c), CNST_LIMB(0xec474e39705912d2), CNST_LIMB(0x86546633b42b9c1), CNST_LIMB(0xe7dfd1be05fa61a8) },
+  /* 168 */ { 8, CNST_LIMB(0x22a16b90698da5d2), CNST_LIMB(0xec8ddd448f8b845a), CNST_LIMB(0x8ce6b0861000000), CNST_LIMB(0xd11ed6fc78f760e5) },
+  /* 169 */ { 8, CNST_LIMB(0x229729f1b2c83ded), CNST_LIMB(0xecd4011c8f11979a), CNST_LIMB(0x93c08e16a022441), CNST_LIMB(0xbb8db609dd29ebfe) },
+  /* 170 */ { 8, CNST_LIMB(0x228cfdd444992f78), CNST_LIMB(0xed19bb053fb0284e), CNST_LIMB(0x9ae49717f026100), CNST_LIMB(0xa71aec8d1813d532) },
+  /* 171 */ { 8, CNST_LIMB(0x2282e6e94ccb8588), CNST_LIMB(0xed5f0c3cbf8fa470), CNST_LIMB(0xa25577ae24c1a61), CNST_LIMB(0x93b612a9f20fbc02) },
+  /* 172 */ { 8, CNST_LIMB(0x2278e4e392557ecf), CNST_LIMB(0xeda3f5fb9c415052), CNST_LIMB(0xaa15f068e610000), CNST_LIMB(0x814fc7b19a67d317) },
+  /* 173 */ { 8, CNST_LIMB(0x226ef7776aa7fd29), CNST_LIMB(0xede87974f3c81855), CNST_LIMB(0xb228d6bf7577921), CNST_LIMB(0x6fd9a03f2e0a4b7c) },
+  /* 174 */ { 8, CNST_LIMB(0x22651e5aaf5532d0), CNST_LIMB(0xee2c97d694adab3f), CNST_LIMB(0xba91158ef5c4100), CNST_LIMB(0x5f4615a38d0d316e) },
+  /* 175 */ { 8, CNST_LIMB(0x225b5944b40b4694), CNST_LIMB(0xee7052491d2c3e64), CNST_LIMB(0xc351ad9aec0b681), CNST_LIMB(0x4f8876863479a286) },
+  /* 176 */ { 8, CNST_LIMB(0x2251a7ee3cdfcca5), CNST_LIMB(0xeeb3a9f01975077f), CNST_LIMB(0xcc6db6100000000), CNST_LIMB(0x4094d8a3041b60eb) },
+  /* 177 */ { 8, CNST_LIMB(0x22480a1174e913d9), CNST_LIMB(0xeef69fea211b2627), CNST_LIMB(0xd5e85d09025c181), CNST_LIMB(0x32600b8ed883a09b) },
+  /* 178 */ { 8, CNST_LIMB(0x223e7f69e522683c), CNST_LIMB(0xef393550f3aa6906), CNST_LIMB(0xdfc4e816401c100), CNST_LIMB(0x24df8c6eb4b6d1f1) },
+  /* 179 */ { 8, CNST_LIMB(0x223507b46b988abe), CNST_LIMB(0xef7b6b399471103e), CNST_LIMB(0xea06b4c72947221), CNST_LIMB(0x18097a8ee151acef) },
+  /* 180 */ { 8, CNST_LIMB(0x222ba2af32dbbb9e), CNST_LIMB(0xefbd42b465836767), CNST_LIMB(0xf4b139365210000), CNST_LIMB(0xbd48cc8ec1cd8e3) },
+  /* 181 */ { 8, CNST_LIMB(0x22225019a9b4d16c), CNST_LIMB(0xeffebccd41ffcd5c), CNST_LIMB(0xffc80497d520961), CNST_LIMB(0x3807a8d67485fb) },
+  /* 182 */ { 8, CNST_LIMB(0x22190fb47b1af172), CNST_LIMB(0xf03fda8b97997f33), CNST_LIMB(0x10b4ebfca1dee100), CNST_LIMB(0xea5768860b62e8d8) },
+  /* 183 */ { 8, CNST_LIMB(0x220fe14186679801), CNST_LIMB(0xf0809cf27f703d52), CNST_LIMB(0x117492de921fc141), CNST_LIMB(0xd54faf5b635c5005) },
+  /* 184 */ { 8, CNST_LIMB(0x2206c483d7c6b786), CNST_LIMB(0xf0c10500d63aa658), CNST_LIMB(0x123bb2ce41000000), CNST_LIMB(0xc14a56233a377926) },
+  /* 185 */ { 8, CNST_LIMB(0x21fdb93fa0e0ccc5), CNST_LIMB(0xf10113b153c8ea7b), CNST_LIMB(0x130a8b6157bdecc1), CNST_LIMB(0xae39a88db7cd329f) },
+  /* 186 */ { 8, CNST_LIMB(0x21f4bf3a31bcdcaa), CNST_LIMB(0xf140c9faa1e5439e), CNST_LIMB(0x13e15dede0e8a100), CNST_LIMB(0x9c10bde69efa7ab6) },
+  /* 187 */ { 8, CNST_LIMB(0x21ebd639f1d86584), CNST_LIMB(0xf18028cf72976a4e), CNST_LIMB(0x14c06d941c0ca7e1), CNST_LIMB(0x8ac36c42a2836497) },
+  /* 188 */ { 8, CNST_LIMB(0x21e2fe06597361a6), CNST_LIMB(0xf1bf311e95d00de3), CNST_LIMB(0x15a7ff487a810000), CNST_LIMB(0x7a463c8b84f5ef67) },
+  /* 189 */ { 8, CNST_LIMB(0x21da3667eb0e8ccb), CNST_LIMB(0xf1fde3d30e812642), CNST_LIMB(0x169859ddc5c697a1), CNST_LIMB(0x6a8e5f5ad090fd4b) },
+  /* 190 */ { 8, CNST_LIMB(0x21d17f282d1a300e), CNST_LIMB(0xf23c41d42727c808), CNST_LIMB(0x1791c60f6fed0100), CNST_LIMB(0x5b91a2943596fc56) },
+  /* 191 */ { 8, CNST_LIMB(0x21c8d811a3d3c9e1), CNST_LIMB(0xf27a4c0585cbf805), CNST_LIMB(0x18948e8c0e6fba01), CNST_LIMB(0x4d4667b1c468e8f0) },
+  /* 192 */ { 8, CNST_LIMB(0x21c040efcb50f858), CNST_LIMB(0xf2b803473f7ad0f3), CNST_LIMB(0x19a1000000000000), CNST_LIMB(0x3fa39ab547994daf) },
+  /* 193 */ { 8, CNST_LIMB(0x21b7b98f11b61c1a), CNST_LIMB(0xf2f56875eb3f2614), CNST_LIMB(0x1ab769203dafc601), CNST_LIMB(0x32a0a9b2faee1e2a) },
+  /* 194 */ { 8, CNST_LIMB(0x21af41bcd19739ba), CNST_LIMB(0xf3327c6ab49ca6c8), CNST_LIMB(0x1bd81ab557f30100), CNST_LIMB(0x26357ceac0e96962) },
+  /* 195 */ { 8, CNST_LIMB(0x21a6d9474c81adf0), CNST_LIMB(0xf36f3ffb6d916240), CNST_LIMB(0x1d0367a69fed1ba1), CNST_LIMB(0x1a5a6f65caa5859e) },
+  /* 196 */ { 8, CNST_LIMB(0x219e7ffda5ad572a), CNST_LIMB(0xf3abb3faa02166cc), CNST_LIMB(0x1e39a5057d810000), CNST_LIMB(0xf08480f672b4e86) },
+  /* 197 */ { 8, CNST_LIMB(0x219635afdcd3e46d), CNST_LIMB(0xf3e7d9379f70166a), CNST_LIMB(0x1f7b2a18f29ac3e1), CNST_LIMB(0x4383340615612ca) },
+  /* 198 */ { 8, CNST_LIMB(0x218dfa2ec92d0643), CNST_LIMB(0xf423b07e986aa967), CNST_LIMB(0x20c850694c2aa100), CNST_LIMB(0xf3c77969ee4be5a2) },
+  /* 199 */ { 8, CNST_LIMB(0x2185cd4c148e4ae2), CNST_LIMB(0xf45f3a98a20738a4), CNST_LIMB(0x222173cc014980c1), CNST_LIMB(0xe00993cc187c5ec9) },
+  /* 200 */ { 8, CNST_LIMB(0x217daeda36ad7a5c), CNST_LIMB(0xf49a784bcd1b8afe), CNST_LIMB(0x2386f26fc1000000), CNST_LIMB(0xcd2b297d889bc2b6) },
+  /* 201 */ { 8, CNST_LIMB(0x21759eac708452fe), CNST_LIMB(0xf4d56a5b33cec44a), CNST_LIMB(0x24f92ce8af296d41), CNST_LIMB(0xbb214d5064862b22) },
+  /* 202 */ { 8, CNST_LIMB(0x216d9c96c7d490d4), CNST_LIMB(0xf510118708a8f8dd), CNST_LIMB(0x2678863cd0ece100), CNST_LIMB(0xa9e1a7ca7ea10e20) },
+  /* 203 */ { 8, CNST_LIMB(0x2165a86e02cb358c), CNST_LIMB(0xf54a6e8ca5438db1), CNST_LIMB(0x280563f0a9472d61), CNST_LIMB(0x99626e72b39ea0cf) },
+  /* 204 */ { 8, CNST_LIMB(0x215dc207a3c20fdf), CNST_LIMB(0xf5848226989d33c3), CNST_LIMB(0x29a02e1406210000), CNST_LIMB(0x899a5ba9c13fafd9) },
+  /* 205 */ { 8, CNST_LIMB(0x2155e939e51e8b37), CNST_LIMB(0xf5be4d0cb51434aa), CNST_LIMB(0x2b494f4efe6d2e21), CNST_LIMB(0x7a80a705391e96ff) },
+  /* 206 */ { 8, CNST_LIMB(0x214e1ddbb54cd933), CNST_LIMB(0xf5f7cff41e09aeb8), CNST_LIMB(0x2d0134ef21cbc100), CNST_LIMB(0x6c0cfe23de23042a) },
+  /* 207 */ { 8, CNST_LIMB(0x21465fc4b2d68f98), CNST_LIMB(0xf6310b8f55304840), CNST_LIMB(0x2ec84ef4da2ef581), CNST_LIMB(0x5e377df359c944dd) },
+  /* 208 */ { 8, CNST_LIMB(0x213eaecd2893dd60), CNST_LIMB(0xf66a008e4788cbcd), CNST_LIMB(0x309f102100000000), CNST_LIMB(0x50f8ac5fc8f53985) },
+  /* 209 */ { 8, CNST_LIMB(0x21370ace09f681c6), CNST_LIMB(0xf6a2af9e5a0f0a08), CNST_LIMB(0x3285ee02a1420281), CNST_LIMB(0x44497266278e35b7) },
+  /* 210 */ { 8, CNST_LIMB(0x212f73a0ef6db7cb), CNST_LIMB(0xf6db196a761949d9), CNST_LIMB(0x347d6104fc324100), CNST_LIMB(0x382316831f7ee175) },
+  /* 211 */ { 8, CNST_LIMB(0x2127e92012e25004), CNST_LIMB(0xf7133e9b156c7be5), CNST_LIMB(0x3685e47dade53d21), CNST_LIMB(0x2c7f377833b8946e) },
+  /* 212 */ { 8, CNST_LIMB(0x21206b264c4a39a7), CNST_LIMB(0xf74b1fd64e0753c6), CNST_LIMB(0x389ff6bb15610000), CNST_LIMB(0x2157c761ab4163ef) },
+  /* 213 */ { 8, CNST_LIMB(0x2118f98f0e52c28f), CNST_LIMB(0xf782bdbfdda6577b), CNST_LIMB(0x3acc1912ebb57661), CNST_LIMB(0x16a7071803cc49a9) },
+  /* 214 */ { 8, CNST_LIMB(0x211194366320dc66), CNST_LIMB(0xf7ba18f93502e409), CNST_LIMB(0x3d0acff111946100), CNST_LIMB(0xc6781d80f8224fc) },
+  /* 215 */ { 8, CNST_LIMB(0x210a3af8e926bb78), CNST_LIMB(0xf7f1322182cf15d1), CNST_LIMB(0x3f5ca2e692eaf841), CNST_LIMB(0x294092d370a900b) },
+  /* 216 */ { 8, CNST_LIMB(0x2102edb3d00e29a6), CNST_LIMB(0xf82809d5be7072db), CNST_LIMB(0x41c21cb8e1000000), CNST_LIMB(0xf24f62335024a295) },
+  /* 217 */ { 8, CNST_LIMB(0x20fbac44d5b6edc2), CNST_LIMB(0xf85ea0b0b27b2610), CNST_LIMB(0x443bcb714399a5c1), CNST_LIMB(0xe03b98f103fad6d2) },
+  /* 218 */ { 8, CNST_LIMB(0x20f4768a4348ad08), CNST_LIMB(0xf894f74b06ef8b40), CNST_LIMB(0x46ca406c81af2100), CNST_LIMB(0xcee3d32cad2a9049) },
+  /* 219 */ { 8, CNST_LIMB(0x20ed4c62ea57b1f0), CNST_LIMB(0xf8cb0e3b4b3bbdb3), CNST_LIMB(0x496e106ac22aaae1), CNST_LIMB(0xbe3f9df9277fdada) },
+  /* 220 */ { 8, CNST_LIMB(0x20e62dae221c087a), CNST_LIMB(0xf900e6160002ccfe), CNST_LIMB(0x4c27d39fa5410000), CNST_LIMB(0xae46f0d94c05e933) },
+  /* 221 */ { 8, CNST_LIMB(0x20df1a4bc4ba6525), CNST_LIMB(0xf9367f6da0ab2e9c), CNST_LIMB(0x4ef825c296e43ca1), CNST_LIMB(0x9ef2280fb437a33d) },
+  /* 222 */ { 8, CNST_LIMB(0x20d8121c2c9e506e), CNST_LIMB(0xf96bdad2acb5f5ef), CNST_LIMB(0x51dfa61f5ad88100), CNST_LIMB(0x9039ff426d3f284b) },
+  /* 223 */ { 8, CNST_LIMB(0x20d1150031e51549), CNST_LIMB(0xf9a0f8d3b0e04fde), CNST_LIMB(0x54def7a6d2f16901), CNST_LIMB(0x82178c6d6b51f8f4) },
+  /* 224 */ { 8, CNST_LIMB(0x20ca22d927d8f54d), CNST_LIMB(0xf9d5d9fd5010b366), CNST_LIMB(0x57f6c10000000000), CNST_LIMB(0x74843b1ee4c1e053) },
+  /* 225 */ { 8, CNST_LIMB(0x20c33b88da7c29aa), CNST_LIMB(0xfa0a7eda4c112ce6), CNST_LIMB(0x5b27ac993df97701), CNST_LIMB(0x6779c7f90dc42f48) },
+  /* 226 */ { 8, CNST_LIMB(0x20bc5ef18c233bdf), CNST_LIMB(0xfa3ee7f38e181ed0), CNST_LIMB(0x5e7268b9bbdf8100), CNST_LIMB(0x5af23c74f9ad9fe9) },
+  /* 227 */ { 8, CNST_LIMB(0x20b58cf5f31e4526), CNST_LIMB(0xfa7315d02f20c7bd), CNST_LIMB(0x61d7a7932ff3d6a1), CNST_LIMB(0x4ee7eae2acdc617e) },
+  /* 228 */ { 8, CNST_LIMB(0x20aec5793770a74d), CNST_LIMB(0xfaa708f58014d37c), CNST_LIMB(0x65581f53c8c10000), CNST_LIMB(0x43556aa2ac262a0b) },
+  /* 229 */ { 8, CNST_LIMB(0x20a8085ef096d530), CNST_LIMB(0xfadac1e711c832d1), CNST_LIMB(0x68f48a385b8320e1), CNST_LIMB(0x3835949593b8ddd1) },
+  /* 230 */ { 8, CNST_LIMB(0x20a1558b2359c4b1), CNST_LIMB(0xfb0e4126bcc86bd7), CNST_LIMB(0x6cada69ed07c2100), CNST_LIMB(0x2d837fbe78458762) },
+  /* 231 */ { 8, CNST_LIMB(0x209aace23fafa72e), CNST_LIMB(0xfb418734a9008bd9), CNST_LIMB(0x70843718cdbf27c1), CNST_LIMB(0x233a7e150a54a555) },
+  /* 232 */ { 8, CNST_LIMB(0x20940e491ea988d7), CNST_LIMB(0xfb74948f5532da4b), CNST_LIMB(0x7479027ea1000000), CNST_LIMB(0x19561984a50ff8fe) },
+  /* 233 */ { 8, CNST_LIMB(0x208d79a5006d7a47), CNST_LIMB(0xfba769b39e49640e), CNST_LIMB(0x788cd40268f39641), CNST_LIMB(0xfd211159fe3490f) },
+  /* 234 */ { 8, CNST_LIMB(0x2086eedb8a3cead3), CNST_LIMB(0xfbda071cc67e6db5), CNST_LIMB(0x7cc07b437ecf6100), CNST_LIMB(0x6aa563e655033e3) },
+  /* 235 */ { 8, CNST_LIMB(0x20806dd2c486dcc6), CNST_LIMB(0xfc0c6d447c5dd362), CNST_LIMB(0x8114cc6220762061), CNST_LIMB(0xfbb614b3f2d3b14c) },
+  /* 236 */ { 8, CNST_LIMB(0x2079f67119059fae), CNST_LIMB(0xfc3e9ca2e1a05533), CNST_LIMB(0x858aa0135be10000), CNST_LIMB(0xeac0f8837fb05773) },
+  /* 237 */ { 8, CNST_LIMB(0x2073889d50e7bf63), CNST_LIMB(0xfc7095ae91e1c760), CNST_LIMB(0x8a22d3b53c54c321), CNST_LIMB(0xda6e4c10e8615ca5) },
+  /* 238 */ { 8, CNST_LIMB(0x206d243e9303d929), CNST_LIMB(0xfca258dca9331635), CNST_LIMB(0x8ede496339f34100), CNST_LIMB(0xcab755a8d01fa67f) },
+  /* 239 */ { 8, CNST_LIMB(0x2066c93c62170aa8), CNST_LIMB(0xfcd3e6a0ca8906c2), CNST_LIMB(0x93bde80aec3a1481), CNST_LIMB(0xbb95a9ae71aa3e0c) },
+  /* 240 */ { 8, CNST_LIMB(0x2060777e9b0db0f6), CNST_LIMB(0xfd053f6d26089673), CNST_LIMB(0x98c29b8100000000), CNST_LIMB(0xad0326c296b4f529) },
+  /* 241 */ { 8, CNST_LIMB(0x205a2eed73563032), CNST_LIMB(0xfd3663b27f31d529), CNST_LIMB(0x9ded549671832381), CNST_LIMB(0x9ef9f21eed31b7c1) },
+  /* 242 */ { 8, CNST_LIMB(0x2053ef71773d7e6a), CNST_LIMB(0xfd6753e032ea0efe), CNST_LIMB(0xa33f092e0b1ac100), CNST_LIMB(0x91747422be14b0b2) },
+  /* 243 */ { 8, CNST_LIMB(0x204db8f388552ea9), CNST_LIMB(0xfd9810643d6614c3), CNST_LIMB(0xa8b8b452291fe821), CNST_LIMB(0x846d550e37b5063d) },
+  /* 244 */ { 8, CNST_LIMB(0x20478b5cdbe2bb2f), CNST_LIMB(0xfdc899ab3ff56c5e), CNST_LIMB(0xae5b564ac3a10000), CNST_LIMB(0x77df79e9a96c06f6) },
+  /* 245 */ { 8, CNST_LIMB(0x20416696f957cfbf), CNST_LIMB(0xfdf8f02086af2c4b), CNST_LIMB(0xb427f4b3be74c361), CNST_LIMB(0x6bc6019636c7d0c2) },
+  /* 246 */ { 8, CNST_LIMB(0x203b4a8bb8d356e7), CNST_LIMB(0xfe29142e0e01401f), CNST_LIMB(0xba1f9a938041e100), CNST_LIMB(0x601c4205aebd9e47) },
+  /* 247 */ { 8, CNST_LIMB(0x2035372541ab0f0d), CNST_LIMB(0xfe59063c8822ce56), CNST_LIMB(0xc0435871d1110f41), CNST_LIMB(0x54ddc59756f05016) },
+  /* 248 */ { 8, CNST_LIMB(0x202f2c4e08fd6dcc), CNST_LIMB(0xfe88c6b3626a72aa), CNST_LIMB(0xc694446f01000000), CNST_LIMB(0x4a0648979c838c18) },
+  /* 249 */ { 8, CNST_LIMB(0x202929f0d04b99e9), CNST_LIMB(0xfeb855f8ca88fb0d), CNST_LIMB(0xcd137a5b57ac3ec1), CNST_LIMB(0x3f91b6e0bb3a053d) },
+  /* 250 */ { 8, CNST_LIMB(0x20232ff8a41b45eb), CNST_LIMB(0xfee7b471b3a9507d), CNST_LIMB(0xd3c21bcecceda100), CNST_LIMB(0x357c299a88ea76a5) },
+  /* 251 */ { 8, CNST_LIMB(0x201d3e50daa036db), CNST_LIMB(0xff16e281db76303b), CNST_LIMB(0xdaa150410b788de1), CNST_LIMB(0x2bc1e517aecc56e3) },
+  /* 252 */ { 8, CNST_LIMB(0x201754e5126d446d), CNST_LIMB(0xff45e08bcf06554e), CNST_LIMB(0xe1b24521be010000), CNST_LIMB(0x225f56ceb3da9f5d) },
+  /* 253 */ { 8, CNST_LIMB(0x201173a1312ca135), CNST_LIMB(0xff74aef0efafadd7), CNST_LIMB(0xe8f62df12777c1a1), CNST_LIMB(0x1951136d53ad63ac) },
+  /* 254 */ { 8, CNST_LIMB(0x200b9a71625f3b13), CNST_LIMB(0xffa34e1177c23362), CNST_LIMB(0xf06e445906fc0100), CNST_LIMB(0x1093d504b3cd7d93) },
+  /* 255 */ { 8, CNST_LIMB(0x2005c94216230568), CNST_LIMB(0xffd1be4c7f2af942), CNST_LIMB(0xf81bc845c81bf801), CNST_LIMB(0x824794d1ec1814f) },
+  /* 256 */ { 8, CNST_LIMB(0x1fffffffffffffff), CNST_LIMB(0xffffffffffffffff), CNST_LIMB(0x8), CNST_LIMB(0x0) },
+};
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mul_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_1.s
new file mode 100644
index 0000000..cfa791d
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_1.s
@@ -0,0 +1,173 @@
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
+   
+   
+   
+   
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_mul_1
+	
+	
+___gmpn_mul_1:
+
+	
+	push	%rbx
+	push	%rbp
+	push	%r12
+
+	mov	%rdx, %rbp
+	shr	$2, %rbp
+
+	test	$1, %dl
+	jnz	Lbx1
+
+Lbx0:	test	$2, %dl
+	mov	%rcx, %rdx
+	jnz	Lb10
+
+Lb00:	.byte	0xc4,98,179,0xf6,6
+	.byte	0xc4,98,163,0xf6,86,8
+	.byte	0xc4,98,243,0xf6,102,16
+	lea	-32(%rdi), %rdi
+	jmp	Llo0
+
+Lb10:	.byte	0xc4,98,243,0xf6,38
+	.byte	0xc4,226,227,0xf6,70,8
+	lea	-16(%rdi), %rdi
+	test	%rbp, %rbp
+	jz	Lcj2
+	.byte	0xc4,98,179,0xf6,70,16
+	lea	16(%rsi), %rsi
+	jmp	Llo2
+
+Lbx1:	test	$2, %dl
+	mov	%rcx, %rdx
+	jnz	Lb11
+
+Lb01:	.byte	0xc4,226,227,0xf6,6
+	lea	-24(%rdi), %rdi
+	test	%rbp, %rbp
+	jz	Lcj1
+	.byte	0xc4,98,179,0xf6,70,8
+	lea	8(%rsi), %rsi
+	jmp	Llo1
+
+Lb11:	.byte	0xc4,98,163,0xf6,22
+	.byte	0xc4,98,243,0xf6,102,8
+	.byte	0xc4,226,227,0xf6,70,16
+	lea	-8(%rdi), %rdi
+	test	%rbp, %rbp
+	jz	Lcj3
+	lea	24(%rsi), %rsi
+	jmp	Llo3
+
+	.align	5, 0x90
+Ltop:	lea	32(%rdi), %rdi
+	mov	%r9, (%rdi)
+	adc	%r8, %r11
+Llo3:	.byte	0xc4,98,179,0xf6,6
+	mov	%r11, 8(%rdi)
+	adc	%r10, %rcx
+Llo2:	mov	%rcx, 16(%rdi)
+	adc	%r12, %rbx
+Llo1:	.byte	0xc4,98,163,0xf6,86,8
+	adc	%rax, %r9
+	.byte	0xc4,98,243,0xf6,102,16
+	mov	%rbx, 24(%rdi)
+Llo0:	.byte	0xc4,226,227,0xf6,70,24
+	lea	32(%rsi), %rsi
+	dec	%rbp
+	jnz	Ltop
+
+Lend:	lea	32(%rdi), %rdi
+	mov	%r9, (%rdi)
+	adc	%r8, %r11
+Lcj3:	mov	%r11, 8(%rdi)
+	adc	%r10, %rcx
+Lcj2:	mov	%rcx, 16(%rdi)
+	adc	%r12, %rbx
+Lcj1:	mov	%rbx, 24(%rdi)
+	adc	$0, %rax
+
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mul_2.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_2.s
new file mode 100644
index 0000000..132a72b
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_2.s
@@ -0,0 +1,190 @@
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_mul_2
+	
+	
+___gmpn_mul_2:
+
+	
+	push	%rbx
+	push	%rbp
+
+	mov	(%rcx), %r8
+	mov	8(%rcx), %r9
+
+	lea	3(%rdx), %r11
+	shr	$2, %r11
+
+	test	$1, %dl
+	jnz	Lbx1
+
+Lbx0:	xor	%rbx, %rbx
+	test	$2, %dl
+	mov	(%rsi), %rdx
+	.byte	0xc4,194,211,0xf6,200
+	jz	Llo0
+
+Lb10:	lea	-16(%rdi), %rdi
+	lea	-16(%rsi), %rsi
+	jmp	Llo2
+
+Lbx1:	xor	%rbp, %rbp
+	test	$2, %dl
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,227,0xf6,208
+	jnz	Lb11
+
+Lb01:	lea	-24(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Llo1
+
+Lb11:	lea	-8(%rdi), %rdi
+	lea	-8(%rsi), %rsi
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltop:	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %rbp		
+	mov	(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,200
+	adc	$0, %rbx			
+	add	%rax, %rbp		
+	adc	$0, %rcx			
+	add	%r10, %rbp			
+Llo0:	mov	%rbp, (%rdi)		
+	adc	$0, %rcx			
+	.byte	0xc4,194,251,0xf6,233
+	add	%rax, %rbx		
+	mov	8(%rsi), %rdx
+	adc	$0, %rbp			
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %rbx		
+	adc	$0, %r10			
+	add	%rcx, %rbx			
+Llo3:	mov	%rbx, 8(%rdi)		
+	adc	$0, %r10			
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %rbp		
+	mov	16(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,200
+	adc	$0, %rbx			
+	add	%rax, %rbp		
+	adc	$0, %rcx			
+	add	%r10, %rbp			
+Llo2:	mov	%rbp, 16(%rdi)		
+	adc	$0, %rcx			
+	.byte	0xc4,194,251,0xf6,233
+	add	%rax, %rbx		
+	mov	24(%rsi), %rdx
+	adc	$0, %rbp			
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %rbx		
+	adc	$0, %r10			
+	add	%rcx, %rbx			
+	lea	32(%rsi), %rsi
+Llo1:	mov	%rbx, 24(%rdi)		
+	adc	$0, %r10			
+	dec	%r11
+	lea	32(%rdi), %rdi
+	jnz	Ltop
+
+Lend:	.byte	0xc4,194,235,0xf6,193
+	add	%rdx, %rbp
+	adc	$0, %rax
+	add	%r10, %rbp
+	mov	%rbp, (%rdi)
+	adc	$0, %rax
+
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mul_basecase.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_basecase.s
new file mode 100644
index 0000000..b5439c0
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mul_basecase.s
@@ -0,0 +1,455 @@
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+	.text
+	.align	4, 0x90
+	.globl	___gmpn_mul_basecase
+	
+	
+___gmpn_mul_basecase:
+
+	
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	mov	%rdx, %rbx		
+	neg	%rbx
+
+	mov	%rdx, %rbp		
+	sar	$2, %rbp			
+
+	test	$1, %r8b
+	jz	Ldo_mul_2
+
+
+
+
+	mov	(%rcx), %rdx
+
+Ldo_mul_1:
+	test	$1, %bl
+	jnz	Lm1x1
+
+Lm1x0:test	$2, %bl
+	jnz	Lm110
+
+Lm100:
+	.byte	0xc4,98,139,0xf6,38
+	.byte	0xc4,98,163,0xf6,110,8
+	lea	-24(%rdi), %rdi
+	jmp	Lm1l0
+
+Lm110:
+	.byte	0xc4,98,147,0xf6,14
+	.byte	0xc4,98,163,0xf6,118,8
+	lea	-8(%rdi), %rdi
+	test	%rbp, %rbp
+	jz	Lcj2
+	.byte	0xc4,98,171,0xf6,102,16
+	lea	16(%rsi), %rsi
+	jmp	Lm1l2
+
+Lm1x1:test	$2, %bl
+	jz	Lm111
+
+Lm101:
+	.byte	0xc4,98,179,0xf6,54
+	lea	-16(%rdi), %rdi
+	test	%rbp, %rbp
+	jz	Lcj1
+	.byte	0xc4,98,171,0xf6,102,8
+	lea	8(%rsi), %rsi
+	jmp	Lm1l1
+
+Lm111:
+	.byte	0xc4,98,155,0xf6,46
+	.byte	0xc4,98,171,0xf6,78,8
+	.byte	0xc4,98,163,0xf6,118,16
+	lea	24(%rsi), %rsi
+	test	%rbp, %rbp
+	jnz	Lgt3
+	add	%r10, %r13
+	jmp	Lcj3
+Lgt3:	add	%r10, %r13
+	jmp	Lm1l3
+
+	.align	5, 0x90
+Lm1tp:lea	32(%rdi), %rdi
+Lm1l3:mov	%r12, (%rdi)
+	.byte	0xc4,98,171,0xf6,38
+Lm1l2:mov	%r13, 8(%rdi)
+	adc	%r11, %r9
+Lm1l1:adc	%r10, %r14
+	mov	%r9, 16(%rdi)
+	.byte	0xc4,98,163,0xf6,110,8
+Lm1l0:mov	%r14, 24(%rdi)
+	.byte	0xc4,98,171,0xf6,78,16
+	adc	%r11, %r12
+	.byte	0xc4,98,163,0xf6,118,24
+	adc	%r10, %r13
+	lea	32(%rsi), %rsi
+	dec	%rbp
+	jnz	Lm1tp
+
+Lm1ed:lea	32(%rdi), %rdi
+Lcj3:	mov	%r12, (%rdi)
+Lcj2:	mov	%r13, 8(%rdi)
+	adc	%r11, %r9
+Lcj1:	mov	%r9, 16(%rdi)
+	adc	$0, %r14
+	mov	%r14, 24(%rdi)
+
+	dec	%r8d
+	jz	Lret5
+
+	lea	8(%rcx), %rcx
+	lea	32(%rdi), %rdi
+
+
+
+	jmp	Ldo_addmul
+
+Ldo_mul_2:
+
+
+
+
+
+	mov	(%rcx), %r9
+	mov	8(%rcx), %r14
+
+	lea	(%rbx), %rbp
+	sar	$2, %rbp
+
+	test	$1, %bl
+	jnz	Lm2x1
+
+Lm2x0:xor	%r10, %r10
+	test	$2, %bl
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,155,0xf6,217
+	jz	Lm2l0
+
+Lm210:lea	-16(%rdi), %rdi
+	lea	-16(%rsi), %rsi
+	jmp	Lm2l2
+
+Lm2x1:xor	%r12, %r12
+	test	$2, %bl
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,171,0xf6,233
+	jz	Lm211
+
+Lm201:lea	-24(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Lm2l1
+
+Lm211:lea	-8(%rdi), %rdi
+	lea	-8(%rsi), %rsi
+	jmp	Lm2l3
+
+	.align	4, 0x90
+Lm2tp:.byte	0xc4,66,251,0xf6,214
+	add	%rax, %r12
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+	add	%rax, %r12
+	adc	$0, %r11
+	add	%r13, %r12
+Lm2l0:mov	%r12, (%rdi)
+	adc	$0, %r11
+	.byte	0xc4,66,251,0xf6,230
+	add	%rax, %r10
+	mov	8(%rsi), %rdx
+	adc	$0, %r12
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r10
+	adc	$0, %r13
+	add	%r11, %r10
+Lm2l3:mov	%r10, 8(%rdi)
+	adc	$0, %r13
+	.byte	0xc4,66,251,0xf6,214
+	add	%rax, %r12
+	mov	16(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+	add	%rax, %r12
+	adc	$0, %r11
+	add	%r13, %r12
+Lm2l2:mov	%r12, 16(%rdi)
+	adc	$0, %r11
+	.byte	0xc4,66,251,0xf6,230
+	add	%rax, %r10
+	mov	24(%rsi), %rdx
+	adc	$0, %r12
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r10
+	adc	$0, %r13
+	add	%r11, %r10
+	lea	32(%rsi), %rsi
+Lm2l1:mov	%r10, 24(%rdi)
+	adc	$0, %r13
+	inc	%rbp
+	lea	32(%rdi), %rdi
+	jnz	Lm2tp
+
+Lm2ed:.byte	0xc4,194,235,0xf6,198
+	add	%rdx, %r12
+	adc	$0, %rax
+	add	%r13, %r12
+	mov	%r12, (%rdi)
+	adc	$0, %rax
+	mov	%rax, 8(%rdi)
+
+	add	$-2, %r8d
+	jz	Lret5
+	lea	16(%rcx), %rcx
+	lea	16(%rdi), %rdi
+
+
+Ldo_addmul:
+	push	%r15
+	push	%r8			
+
+
+
+
+
+	lea	(%rdi,%rbx,8), %rdi
+	lea	(%rsi,%rbx,8), %rsi
+
+Louter:
+	mov	(%rcx), %r9
+	mov	8(%rcx), %r8
+
+	lea	2(%rbx), %rbp
+	sar	$2, %rbp
+
+	mov	(%rsi), %rdx
+	test	$1, %bl
+	jnz	Lbx1
+
+Lbx0:	mov	(%rdi), %r14
+	mov	8(%rdi), %r15
+	.byte	0xc4,66,251,0xf6,217
+	add	%rax, %r14
+	.byte	0xc4,66,251,0xf6,224
+	adc	$0, %r11
+	mov	%r14, (%rdi)
+	add	%rax, %r15
+	adc	$0, %r12
+	mov	8(%rsi), %rdx
+	test	$2, %bl
+	jnz	Lb10
+
+Lb00:	lea	16(%rsi), %rsi
+	lea	16(%rdi), %rdi
+	jmp	Llo0
+
+Lb10:	mov	16(%rdi), %r14
+	lea	32(%rsi), %rsi
+	.byte	0xc4,66,251,0xf6,233
+	jmp	Llo2
+
+Lbx1:	mov	(%rdi), %r15
+	mov	8(%rdi), %r14
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r14
+	adc	$0, %r10
+	mov	8(%rsi), %rdx
+	mov	%r15, (%rdi)
+	.byte	0xc4,66,251,0xf6,217
+	test	$2, %bl
+	jz	Lb11
+
+Lb01:	mov	16(%rdi), %r15
+	lea	24(%rdi), %rdi
+	lea	24(%rsi), %rsi
+	jmp	Llo1
+
+Lb11:	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltop:	.byte	0xc4,66,251,0xf6,233
+	add	%r10, %r15
+	adc	$0, %r12
+Llo2:	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r14
+	adc	$0, %r10
+	lea	32(%rdi), %rdi
+	add	%r11, %r15
+	mov	-16(%rsi), %rdx
+	mov	%r15, -24(%rdi)
+	adc	$0, %r13
+	add	%r12, %r14
+	mov	-8(%rdi), %r15
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+Llo1:	add	%rax, %r14
+	.byte	0xc4,66,251,0xf6,224
+	adc	$0, %r11
+	add	%r13, %r14
+	mov	%r14, -16(%rdi)
+	adc	$0, %r11
+	add	%rax, %r15
+	adc	$0, %r12
+	add	%r10, %r15
+	mov	-8(%rsi), %rdx
+	adc	$0, %r12
+Llo0:	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r15
+	adc	$0, %r13
+	mov	(%rdi), %r14
+	.byte	0xc4,66,251,0xf6,208
+	add	%rax, %r14
+	adc	$0, %r10
+	add	%r11, %r15
+	mov	%r15, -8(%rdi)
+	adc	$0, %r13
+	mov	(%rsi), %rdx
+	add	%r12, %r14
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+Llo3:	add	%rax, %r14
+	adc	$0, %r11
+	.byte	0xc4,66,251,0xf6,224
+	add	%r13, %r14
+	mov	8(%rdi), %r15
+	mov	%r14, (%rdi)
+	mov	16(%rdi), %r14
+	adc	$0, %r11
+	add	%rax, %r15
+	adc	$0, %r12
+	mov	8(%rsi), %rdx
+	lea	32(%rsi), %rsi
+	inc	%rbp
+	jnz	Ltop
+
+Lend:	.byte	0xc4,66,251,0xf6,233
+	add	%r10, %r15
+	adc	$0, %r12
+	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,194,235,0xf6,192
+	add	%r11, %r15
+	mov	%r15, 8(%rdi)
+	adc	$0, %r13
+	add	%r12, %rdx
+	adc	$0, %rax
+	add	%r13, %rdx
+	mov	%rdx, 16(%rdi)
+	adc	$0, %rax
+	mov	%rax, 24(%rdi)
+
+	addl	$-2, (%rsp)
+	lea	16(%rcx), %rcx
+	lea	-16(%rsi,%rbx,8), %rsi
+	lea	32(%rdi,%rbx,8), %rdi
+	jnz	Louter
+
+	pop	%rax		
+	pop	%r15
+Lret5:pop	%r14
+Lret4:pop	%r13
+Lret3:pop	%r12
+Lret2:pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/mullo_basecase.s b/vere/ext/gmp/gen/x86_64-macos/mpn/mullo_basecase.s
new file mode 100644
index 0000000..127dd3f
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/mullo_basecase.s
@@ -0,0 +1,436 @@
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+	.text
+	.align	5, 0x90
+	.globl	___gmpn_mullo_basecase
+	
+	
+___gmpn_mullo_basecase:
+
+	
+
+	mov	%rdx, %r8
+	mov	(%rsi), %rdx
+
+	cmp	$4, %rcx
+	jb	Lsmall
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+
+	mov	(%r8), %r9
+	mov	8(%r8), %rbx
+
+	lea	2(%rcx), %rbp
+	shr	$2, %rbp
+	neg	%rcx
+	add	$2, %rcx
+
+	push	%rsi			
+
+	test	$1, %cl
+	jnz	Lm2x1
+
+Lm2x0:.byte	0xc4,66,171,0xf6,233
+	xor	%r12d, %r12d
+	test	$2, %cl
+	jz	Lm2b2
+
+Lm2b0:lea	-8(%rdi), %rdi
+	lea	-8(%rsi), %rsi
+	jmp	Lm2e0
+
+Lm2b2:lea	-24(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Lm2e2
+
+Lm2x1:.byte	0xc4,66,155,0xf6,217
+	xor	%r10d, %r10d
+	test	$2, %cl
+	jnz	Lm2b3
+
+Lm2b1:jmp	Lm2e1
+
+Lm2b3:lea	-16(%rdi), %rdi
+	lea	-16(%rsi), %rsi
+	jmp	Lm2e3
+
+	.align	4, 0x90
+Lm2tp:.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r12
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+	add	%rax, %r12
+	adc	$0, %r11
+	add	%r13, %r12
+Lm2e1:mov	%r12, (%rdi)
+	adc	$0, %r11
+	.byte	0xc4,98,251,0xf6,227
+	add	%rax, %r10
+	mov	8(%rsi), %rdx
+	adc	$0, %r12
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r10
+	adc	$0, %r13
+	add	%r11, %r10
+Lm2e0:mov	%r10, 8(%rdi)
+	adc	$0, %r13
+	.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r12
+	mov	16(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+	add	%rax, %r12
+	adc	$0, %r11
+	add	%r13, %r12
+Lm2e3:mov	%r12, 16(%rdi)
+	adc	$0, %r11
+	.byte	0xc4,98,251,0xf6,227
+	add	%rax, %r10
+	mov	24(%rsi), %rdx
+	adc	$0, %r12
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r10
+	adc	$0, %r13
+	add	%r11, %r10
+	lea	32(%rsi), %rsi
+Lm2e2:mov	%r10, 24(%rdi)
+	adc	$0, %r13
+	dec	%rbp
+	lea	32(%rdi), %rdi
+	jnz	Lm2tp
+
+Lm2ed:.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r12
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,217
+	add	%r12, %rax
+	add	%r13, %rax
+	mov	%rax, (%rdi)
+
+	mov	(%rsp), %rsi		
+	lea	16(%r8), %r8
+	lea	8(%rdi,%rcx,8), %rdi		
+	add	$2, %rcx
+	jge	Lcor1
+
+	push	%r14
+	push	%r15
+
+Louter:
+	mov	(%r8), %r9
+	mov	8(%r8), %rbx
+
+	lea	(%rcx), %rbp
+	sar	$2, %rbp
+
+	mov	(%rsi), %rdx
+	test	$1, %cl
+	jnz	Lbx1
+
+Lbx0:	mov	(%rdi), %r15
+	mov	8(%rdi), %r14
+	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r14
+	adc	$0, %r10
+	mov	8(%rsi), %rdx
+	mov	%r15, (%rdi)
+	.byte	0xc4,66,251,0xf6,217
+	test	$2, %cl
+	jz	Lb2
+
+Lb0:	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Llo0
+
+Lb2:	mov	16(%rdi), %r15
+	lea	24(%rdi), %rdi
+	lea	24(%rsi), %rsi
+	jmp	Llo2
+
+Lbx1:	mov	(%rdi), %r14
+	mov	8(%rdi), %r15
+	.byte	0xc4,66,251,0xf6,217
+	add	%rax, %r14
+	.byte	0xc4,98,251,0xf6,227
+	adc	$0, %r11
+	mov	%r14, (%rdi)
+	add	%rax, %r15
+	adc	$0, %r12
+	mov	8(%rsi), %rdx
+	test	$2, %cl
+	jnz	Lb3
+
+Lb1:	lea	16(%rsi), %rsi
+	lea	16(%rdi), %rdi
+	jmp	Llo1
+
+Lb3:	mov	16(%rdi), %r14
+	lea	32(%rsi), %rsi
+	.byte	0xc4,66,251,0xf6,233
+	inc	%rbp
+	jz	Lcj3
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltop:	.byte	0xc4,66,251,0xf6,233
+	add	%r10, %r15
+	adc	$0, %r12
+Llo3:	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r14
+	adc	$0, %r10
+	lea	32(%rdi), %rdi
+	add	%r11, %r15
+	mov	-16(%rsi), %rdx
+	mov	%r15, -24(%rdi)
+	adc	$0, %r13
+	add	%r12, %r14
+	mov	-8(%rdi), %r15
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+Llo2:	add	%rax, %r14
+	.byte	0xc4,98,251,0xf6,227
+	adc	$0, %r11
+	add	%r13, %r14
+	mov	%r14, -16(%rdi)
+	adc	$0, %r11
+	add	%rax, %r15
+	adc	$0, %r12
+	add	%r10, %r15
+	mov	-8(%rsi), %rdx
+	adc	$0, %r12
+Llo1:	.byte	0xc4,66,251,0xf6,233
+	add	%rax, %r15
+	adc	$0, %r13
+	mov	(%rdi), %r14
+	.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r14
+	adc	$0, %r10
+	add	%r11, %r15
+	mov	%r15, -8(%rdi)
+	adc	$0, %r13
+	mov	(%rsi), %rdx
+	add	%r12, %r14
+	.byte	0xc4,66,251,0xf6,217
+	adc	$0, %r10
+Llo0:	add	%rax, %r14
+	adc	$0, %r11
+	.byte	0xc4,98,251,0xf6,227
+	add	%r13, %r14
+	mov	8(%rdi), %r15
+	mov	%r14, (%rdi)
+	mov	16(%rdi), %r14
+	adc	$0, %r11
+	add	%rax, %r15
+	adc	$0, %r12
+	mov	8(%rsi), %rdx
+	lea	32(%rsi), %rsi
+	inc	%rbp
+	jnz	Ltop
+
+Lend:	.byte	0xc4,66,251,0xf6,233
+	add	%r10, %r15
+	adc	$0, %r12
+Lcj3:	add	%rax, %r15
+	adc	$0, %r13
+	.byte	0xc4,98,251,0xf6,211
+	add	%rax, %r14
+	add	%r11, %r15
+	mov	-16(%rsi), %rdx
+	mov	%r15, 8(%rdi)
+	adc	$0, %r13
+	add	%r12, %r14
+	.byte	0xc4,66,251,0xf6,217
+	add	%r14, %rax
+	add	%r13, %rax
+	mov	%rax, 16(%rdi)
+
+	mov	16(%rsp), %rsi		
+	lea	16(%r8), %r8
+	lea	24(%rdi,%rcx,8), %rdi		
+	add	$2, %rcx
+	jl	Louter
+
+	pop	%r15
+	pop	%r14
+
+	jnz	Lcor0
+
+Lcor1:mov	(%r8), %r9
+	mov	8(%r8), %rbx
+	mov	(%rsi), %rdx
+	.byte	0xc4,194,155,0xf6,233		
+	add	(%rdi), %r12		
+	adc	%rax, %rbp
+	mov	8(%rsi), %r10
+	imul	%r9, %r10
+	imul	%rbx, %rdx
+	mov	%r12, (%rdi)
+	add	%r10, %rdx
+	add	%rbp, %rdx
+	mov	%rdx, 8(%rdi)
+	pop	%rax			
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+
+Lcor0:mov	(%r8), %r11
+	imul	(%rsi), %r11
+	add	%rax, %r11
+	mov	%r11, (%rdi)
+	pop	%rax			
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+
+	.align	4, 0x90
+Lsmall:
+	cmp	$2, %rcx
+	jae	Lgt1
+Ln1:	imul	(%r8), %rdx
+	mov	%rdx, (%rdi)
+	
+	ret
+Lgt1:	ja	Lgt2
+Ln2:	mov	(%r8), %r9
+	.byte	0xc4,194,251,0xf6,209
+	mov	%rax, (%rdi)
+	mov	8(%rsi), %rax
+	imul	%r9, %rax
+	add	%rax, %rdx
+	mov	8(%r8), %r9
+	mov	(%rsi), %rcx
+	imul	%r9, %rcx
+	add	%rcx, %rdx
+	mov	%rdx, 8(%rdi)
+	
+	ret
+Lgt2:
+Ln3:	mov	(%r8), %r9
+	.byte	0xc4,66,251,0xf6,209	
+	mov	%rax, (%rdi)
+	mov	8(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,209	
+	imul	16(%rsi), %r9		
+	add	%rax, %r10
+	adc	%rdx, %r9
+	mov	8(%r8), %r11
+	mov	(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,211	
+	add	%rax, %r10
+	adc	%rdx, %r9
+	imul	8(%rsi), %r11		
+	add	%r11, %r9
+	mov	%r10, 8(%rdi)
+	mov	16(%r8), %r10
+	mov	(%rsi), %rax
+	imul	%rax, %r10		
+	add	%r10, %r9
+	mov	%r9, 16(%rdi)
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/nand_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/nand_n.s
new file mode 100644
index 0000000..79898b8
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/nand_n.s
@@ -0,0 +1,164 @@
+
+
+
+
+
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+  
+  
+  
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+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_nand_n
+	
+	
+___gmpn_nand_n:
+
+	
+	mov	(%rdx), %r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	and	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	and	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+Lb00:	mov	8(%rdx), %r9
+	and	(%rsi), %r8
+	not	%r8
+	and	8(%rsi), %r9
+	not	%r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+Le10:	mov	24(%rdx), %r9
+	lea	32(%rdx), %rdx
+	and	16(%rsi), %r8
+	not	%r8
+	and	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	not	%r9
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/nior_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/nior_n.s
new file mode 100644
index 0000000..b8d0008
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/nior_n.s
@@ -0,0 +1,164 @@
+
+
+
+
+
+
+
+
+
+
+
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+  
+  
+  
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+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_nior_n
+	
+	
+___gmpn_nior_n:
+
+	
+	mov	(%rdx), %r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	or	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	or	(%rsi), %r8
+	not	%r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+Lb00:	mov	8(%rdx), %r9
+	or	(%rsi), %r8
+	not	%r8
+	or	8(%rsi), %r9
+	not	%r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+Le10:	mov	24(%rdx), %r9
+	lea	32(%rdx), %rdx
+	or	16(%rsi), %r8
+	not	%r8
+	or	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	not	%r9
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/perfsqr.h b/vere/ext/gmp/gen/x86_64-macos/mpn/perfsqr.h
new file mode 100644
index 0000000..80c5eb7
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/perfsqr.h
@@ -0,0 +1,46 @@
+/* This file generated by gen-psqr.c - DO NOT EDIT. */
+
+#if GMP_LIMB_BITS != 64 || GMP_NAIL_BITS != 0
+Error, error, this data is for 64 bit limb and 0 bit nail
+#endif
+
+/* Non-zero bit indicates a quadratic residue mod 0x100.
+   This test identifies 82.81% as non-squares (212/256). */
+static const mp_limb_t
+sq_res_0x100[4] = {
+  CNST_LIMB(0x202021202030213),
+  CNST_LIMB(0x202021202020213),
+  CNST_LIMB(0x202021202030212),
+  CNST_LIMB(0x202021202020212),
+};
+
+/* 2^48-1 = 3^2 * 5 * 7 * 13 * 17 * 97 ... */
+#define PERFSQR_MOD_BITS  49
+
+/* This test identifies 97.81% as non-squares. */
+#define PERFSQR_MOD_TEST(up, usize) \
+  do {                              \
+    mp_limb_t  r;                   \
+    PERFSQR_MOD_34 (r, up, usize);  \
+                                    \
+    /* 69.23% */                    \
+    PERFSQR_MOD_2 (r, CNST_LIMB(91), CNST_LIMB(0xfd2fd2fd2fd3), \
+                   CNST_LIMB(0x2191240), CNST_LIMB(0x8850a206953820e1)); \
+                                    \
+    /* 68.24% */                    \
+    PERFSQR_MOD_2 (r, CNST_LIMB(85), CNST_LIMB(0xfcfcfcfcfcfd), \
+                   CNST_LIMB(0x82158), CNST_LIMB(0x10b48c4b4206a105)); \
+                                    \
+    /* 55.56% */                    \
+    PERFSQR_MOD_1 (r, CNST_LIMB( 9), CNST_LIMB(0xe38e38e38e39), \
+                   CNST_LIMB(0x93)); \
+                                    \
+    /* 49.48% */                    \
+    PERFSQR_MOD_2 (r, CNST_LIMB(97), CNST_LIMB(0xfd5c5f02a3a1), \
+                   CNST_LIMB(0x1eb628b47), CNST_LIMB(0x6067981b8b451b5f)); \
+  } while (0)
+
+/* Grand total sq_res_0x100 and PERFSQR_MOD_TEST, 99.62% non-squares. */
+
+/* helper for tests/mpz/t-perfsqr.c */
+#define PERFSQR_DIVISORS  { 256, 91, 85, 9, 97, }
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/popcount.s b/vere/ext/gmp/gen/x86_64-macos/mpn/popcount.s
new file mode 100644
index 0000000..c7695bb
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/popcount.s
@@ -0,0 +1,211 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_popcount
+	
+	
+___gmpn_popcount:
+
+	
+
+	mov	%esi, %r8d
+	and	$7, %r8d
+
+	.byte	0xf3,0x48,0x0f,0xb8,0x07	
+	xor	%ecx, %ecx
+
+	lea	Ltab(%rip), %r9
+
+	movslq	(%r9,%r8,4), %r8
+	add	%r9, %r8
+	jmp	*%r8
+
+
+L3:	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x10	
+	add	$24, %rdi
+	sub	$8, %rsi
+	jg	Le34
+	add	%r10, %rax
+	add	%r11, %rax
+Ls1:	
+	ret
+
+L1:	sub	$8, %rsi
+	jle	Ls1
+	.byte	0xf3,0x4c,0x0f,0xb8,0x47,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x10	
+	add	$8, %rdi
+	jmp	Le12
+
+L7:	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x10	
+	add	$-8, %rdi
+	jmp	Le07
+
+L0:	.byte	0xf3,0x48,0x0f,0xb8,0x4f,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x10	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x18	
+	jmp	Le07
+
+L4:	.byte	0xf3,0x48,0x0f,0xb8,0x4f,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x10	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x18	
+	add	$32, %rdi
+	sub	$8, %rsi
+	jle	Lx4
+
+	.align	4, 0x90
+Ltop:
+Le34:	.byte	0xf3,0x4c,0x0f,0xb8,0x07	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x08	
+	add	%r10, %rcx
+	add	%r11, %rax
+Le12:	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x10	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x18	
+	add	%r8, %rcx
+	add	%r9, %rax
+Le07:	.byte	0xf3,0x4c,0x0f,0xb8,0x47,0x20	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x28	
+	add	%r10, %rcx
+	add	%r11, %rax
+Le56:	.byte	0xf3,0x4c,0x0f,0xb8,0x57,0x30	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x5f,0x38	
+	add	$64, %rdi
+	add	%r8, %rcx
+	add	%r9, %rax
+	sub	$8, %rsi
+	jg	Ltop
+
+Lx4:	add	%r10, %rcx
+	add	%r11, %rax
+Lx2:	add	%rcx, %rax
+
+	
+	ret
+
+L2:	.byte	0xf3,0x48,0x0f,0xb8,0x4f,0x08	
+	sub	$8, %rsi
+	jle	Lx2
+	.byte	0xf3,0x4c,0x0f,0xb8,0x47,0x10	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x18	
+	add	$16, %rdi
+	jmp	Le12
+
+L5:	.byte	0xf3,0x4c,0x0f,0xb8,0x47,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x10	
+	add	$-24, %rdi
+	jmp	Le56
+
+L6:	.byte	0xf3,0x48,0x0f,0xb8,0x4f,0x08	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x47,0x10	
+	.byte	0xf3,0x4c,0x0f,0xb8,0x4f,0x18	
+	add	$-16, %rdi
+	jmp	Le56
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/redc_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/redc_1.s
new file mode 100644
index 0000000..55ef11f
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/redc_1.s
@@ -0,0 +1,446 @@
+
+
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+   
+   
+   
+   
+    
+
+
+
+
+  
+
+    
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_redc_1
+	
+	
+___gmpn_redc_1:
+
+	
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+	push	%rdi
+	mov	%rdx, %rdi		
+	mov	(%rsi), %rdx
+
+	neg	%rcx
+	push	%r8			
+	imul	%r8, %rdx	
+	mov	%rcx, %r15			
+
+	test	$1, %cl
+	jnz	Lbx1
+
+Lbx0:	test	$2, %cl
+	jz	Lo0b
+
+	cmp	$-2, %ecx
+	jnz	Lo2
+
+
+	mov	8(%rsp), %rbx		
+	lea	16(%rsp), %rsp		
+	.byte	0xc4,98,179,0xf6,39
+	.byte	0xc4,98,163,0xf6,87,8
+	add	%r12, %r11
+	adc	$0, %r10
+	add	(%rsi), %r9		
+	adc	8(%rsi), %r11		
+	adc	$0, %r10		
+	mov	%r11, %rdx
+	imul	%r8, %rdx
+	.byte	0xc4,98,147,0xf6,39
+	.byte	0xc4,98,139,0xf6,127,8
+	xor	%eax, %eax
+	add	%r12, %r14
+	adc	$0, %r15
+	add	%r11, %r13		
+	adc	16(%rsi), %r14		
+	adc	$0, %r15		
+	add	%r14, %r10
+	adc	24(%rsi), %r15
+	mov	%r10, (%rbx)
+	mov	%r15, 8(%rbx)
+	setc	%al
+	jmp	Lret
+
+Lo2:	lea	2(%rcx), %r14			
+	.byte	0xc4,98,179,0xf6,7
+	.byte	0xc4,98,163,0xf6,87,8
+	sar	$2, %r14
+	add	%r8, %r11
+	jmp	Llo2
+
+	.align	4, 0x90
+Ltp2:	adc	%rax, %r9
+	lea	32(%rsi), %rsi
+	adc	%r8, %r11
+Llo2:	.byte	0xc4,98,147,0xf6,103,16
+	mov	(%rsi), %r8
+	.byte	0xc4,226,227,0xf6,71,24
+	lea	32(%rdi), %rdi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	8(%rsi), %r10
+	mov	16(%rsi), %r12
+	add	%r9, %r8
+	mov	24(%rsi), %rbp
+	mov	%r8, (%rsi)
+	adc	%r11, %r10
+	.byte	0xc4,98,179,0xf6,7
+	mov	%r10, 8(%rsi)
+	adc	%r13, %r12
+	mov	%r12, 16(%rsi)
+	adc	%rbx, %rbp
+	.byte	0xc4,98,163,0xf6,87,8
+	mov	%rbp, 24(%rsi)
+	inc	%r14
+	jnz	Ltp2
+
+Led2:	mov	56(%rsi,%rcx,8), %rdx	
+	lea	16(%rdi,%rcx,8), %rdi		
+	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	32(%rsi), %r8
+	adc	$0, %r10
+	imul	(%rsp), %rdx		
+	mov	40(%rsi), %rax
+	add	%r9, %r8
+	mov	%r8, 32(%rsi)
+	adc	%r11, %rax
+	mov	%rax, 40(%rsi)
+	lea	56(%rsi,%rcx,8), %rsi		
+	adc	$0, %r10
+	mov	%r10, -8(%rsi)
+	inc	%r15
+	jnz	Lo2
+
+	jmp	Lcj
+
+
+Lbx1:	test	$2, %cl
+	jz	Lo3a
+
+Lo1a:	cmp	$-1, %ecx
+	jnz	Lo1b
+
+
+	mov	8(%rsp), %rbx		
+	lea	16(%rsp), %rsp		
+	.byte	0xc4,98,163,0xf6,23
+	add	(%rsi), %r11
+	adc	8(%rsi), %r10
+	mov	%r10, (%rbx)
+	mov	$0, %eax
+	setc	%al
+	jmp	Lret
+
+Lo1b:	lea	24(%rdi), %rdi
+Lo1:	lea	1(%rcx), %r14			
+	.byte	0xc4,98,163,0xf6,87,232
+	.byte	0xc4,98,147,0xf6,103,240
+	.byte	0xc4,226,227,0xf6,71,248
+	sar	$2, %r14
+	add	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rsi), %r10
+	mov	8(%rsi), %r12
+	mov	16(%rsi), %rbp
+	add	%r11, %r10
+	jmp	Llo1
+
+	.align	4, 0x90
+Ltp1:	adc	%rax, %r9
+	lea	32(%rsi), %rsi
+	adc	%r8, %r11
+	.byte	0xc4,98,147,0xf6,103,16
+	mov	-8(%rsi), %r8
+	.byte	0xc4,226,227,0xf6,71,24
+	lea	32(%rdi), %rdi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rsi), %r10
+	mov	8(%rsi), %r12
+	add	%r9, %r8
+	mov	16(%rsi), %rbp
+	mov	%r8, -8(%rsi)
+	adc	%r11, %r10
+Llo1:	.byte	0xc4,98,179,0xf6,7
+	mov	%r10, (%rsi)
+	adc	%r13, %r12
+	mov	%r12, 8(%rsi)
+	adc	%rbx, %rbp
+	.byte	0xc4,98,163,0xf6,87,8
+	mov	%rbp, 16(%rsi)
+	inc	%r14
+	jnz	Ltp1
+
+Led1:	mov	48(%rsi,%rcx,8), %rdx	
+	lea	40(%rdi,%rcx,8), %rdi		
+	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	24(%rsi), %r8
+	adc	$0, %r10
+	imul	(%rsp), %rdx		
+	mov	32(%rsi), %rax
+	add	%r9, %r8
+	mov	%r8, 24(%rsi)
+	adc	%r11, %rax
+	mov	%rax, 32(%rsi)
+	lea	48(%rsi,%rcx,8), %rsi		
+	adc	$0, %r10
+	mov	%r10, -8(%rsi)
+	inc	%r15
+	jnz	Lo1
+
+	jmp	Lcj
+
+Lo3a:	cmp	$-3, %ecx
+	jnz	Lo3b
+
+
+Ln3:	.byte	0xc4,226,227,0xf6,7
+	.byte	0xc4,98,179,0xf6,119,8
+	add	(%rsi), %rbx
+	.byte	0xc4,98,163,0xf6,87,16
+	adc	%rax, %r9		
+	adc	%r14, %r11		
+	mov	8(%rsi), %r14
+	mov	%r8, %rdx
+	adc	$0, %r10		
+	mov	16(%rsi), %rax
+	add	%r9, %r14		
+	mov	%r14, 8(%rsi)
+	.byte	0xc4,66,235,0xf6,238	
+	adc	%r11, %rax		
+	mov	%rax, 16(%rsi)
+	adc	$0, %r10		
+	mov	%r10, (%rsi)
+	lea	8(%rsi), %rsi		
+	inc	%r15
+	jnz	Ln3
+
+	jmp	Lcj
+
+Lo3b:	lea	8(%rdi), %rdi
+Lo3:	lea	4(%rcx), %r14			
+	.byte	0xc4,226,227,0xf6,71,248
+	.byte	0xc4,98,179,0xf6,7
+	mov	(%rsi), %rbp
+	.byte	0xc4,98,163,0xf6,87,8
+	sar	$2, %r14
+	add	%rbx, %rbp
+	nop
+	adc	%rax, %r9
+	jmp	Llo3
+
+	.align	4, 0x90
+Ltp3:	adc	%rax, %r9
+	lea	32(%rsi), %rsi
+Llo3:	adc	%r8, %r11
+	.byte	0xc4,98,147,0xf6,103,16
+	mov	8(%rsi), %r8
+	.byte	0xc4,226,227,0xf6,71,24
+	lea	32(%rdi), %rdi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	16(%rsi), %r10
+	mov	24(%rsi), %r12
+	add	%r9, %r8
+	mov	32(%rsi), %rbp
+	mov	%r8, 8(%rsi)
+	adc	%r11, %r10
+	.byte	0xc4,98,179,0xf6,7
+	mov	%r10, 16(%rsi)
+	adc	%r13, %r12
+	mov	%r12, 24(%rsi)
+	adc	%rbx, %rbp
+	.byte	0xc4,98,163,0xf6,87,8
+	mov	%rbp, 32(%rsi)
+	inc	%r14
+	jnz	Ltp3
+
+Led3:	mov	64(%rsi,%rcx,8), %rdx	
+	lea	24(%rdi,%rcx,8), %rdi		
+	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	40(%rsi), %r8
+	adc	$0, %r10
+	imul	(%rsp), %rdx		
+	mov	48(%rsi), %rax
+	add	%r9, %r8
+	mov	%r8, 40(%rsi)
+	adc	%r11, %rax
+	mov	%rax, 48(%rsi)
+	lea	64(%rsi,%rcx,8), %rsi		
+	adc	$0, %r10
+	mov	%r10, -8(%rsi)
+	inc	%r15
+	jnz	Lo3
+
+	jmp	Lcj
+
+Lo0b:	lea	16(%rdi), %rdi
+Lo0:	mov	%rcx, %r14			
+	.byte	0xc4,98,147,0xf6,103,240
+	.byte	0xc4,226,227,0xf6,71,248
+	sar	$2, %r14
+	add	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rsi), %r12
+	mov	8(%rsi), %rbp
+	.byte	0xc4,98,179,0xf6,7
+	add	%r13, %r12
+	jmp	Llo0
+
+	.align	4, 0x90
+Ltp0:	adc	%rax, %r9
+	lea	32(%rsi), %rsi
+	adc	%r8, %r11
+	.byte	0xc4,98,147,0xf6,103,16
+	mov	-16(%rsi), %r8
+	.byte	0xc4,226,227,0xf6,71,24
+	lea	32(%rdi), %rdi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	-8(%rsi), %r10
+	mov	(%rsi), %r12
+	add	%r9, %r8
+	mov	8(%rsi), %rbp
+	mov	%r8, -16(%rsi)
+	adc	%r11, %r10
+	.byte	0xc4,98,179,0xf6,7
+	mov	%r10, -8(%rsi)
+	adc	%r13, %r12
+	mov	%r12, (%rsi)
+Llo0:	adc	%rbx, %rbp
+	.byte	0xc4,98,163,0xf6,87,8
+	mov	%rbp, 8(%rsi)
+	inc	%r14
+	jnz	Ltp0
+
+Led0:	mov	40(%rsi,%rcx,8), %rdx	
+	lea	32(%rdi,%rcx,8), %rdi		
+	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	16(%rsi), %r8
+	adc	$0, %r10
+	imul	(%rsp), %rdx		
+	mov	24(%rsi), %rax
+	add	%r9, %r8
+	mov	%r8, 16(%rsi)
+	adc	%r11, %rax
+	mov	%rax, 24(%rsi)
+	lea	40(%rsi,%rcx,8), %rsi		
+	adc	$0, %r10
+	mov	%r10, -8(%rsi)
+	inc	%r15
+	jnz	Lo0
+
+Lcj:
+	mov	8(%rsp), %rdi		
+	lea	16-8(%rsp), %rsp	
+	lea	(%rsi,%rcx,8), %rdx		
+	neg	%ecx			
+
+	
+
+	
+	call	___gmpn_add_n
+
+	lea	8(%rsp), %rsp	
+
+
+Lret:	pop	%r15
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh1_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh1_n.s
new file mode 100644
index 0000000..824e7af
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh1_n.s
@@ -0,0 +1,212 @@
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+	
+	
+	
+	
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+
+
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+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_rsblsh1_nc
+	
+	
+___gmpn_rsblsh1_nc:
+
+	
+
+	push	%rbp
+	mov	%r8, %rax
+	neg	%rax			
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+	mov	%ecx, %r9d
+	and	$3, %r9d
+	je	Lb00
+	cmp	$2, %r9d
+	jc	Lb01
+	je	Lb10
+	jmp	Lb11
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_rsblsh1_n
+	
+	
+___gmpn_rsblsh1_n:
+
+	
+	push	%rbp
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$63, %r10, %r9
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	sbb	16(%rsi), %r9
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, %rbp
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$3, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb01:	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	mov	%rbp, (%rdi)
+	mov	%r8, %rbp
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$1, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb10:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, %rbp
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$2, %rcx
+	ja	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	shrd	$63, %r8, %rbp
+Lb00:	mov	8(%rdx), %r9
+	shrd	$63, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$63, %r10, %r9
+	mov	24(%rdx), %r11
+	shrd	$63, %r11, %r10
+	lea	32(%rdx), %rdx
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	sbb	16(%rsi), %r9
+	sbb	24(%rsi), %r10
+	lea	32(%rsi), %rsi
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, 24(%rdi)
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lend:	shr	$63, %rbp
+	add	%eax, %eax	
+	sbb	$0, %rbp
+	mov	%rbp, %rax
+	pop	%rbp
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh2_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh2_n.s
new file mode 100644
index 0000000..77e0be2
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh2_n.s
@@ -0,0 +1,214 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+	
+	
+	
+	
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_rsblsh2_nc
+	
+	
+___gmpn_rsblsh2_nc:
+
+	
+
+	push	%rbp
+	mov	%r8, %rax
+	neg	%rax			
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+	mov	%ecx, %r9d
+	and	$3, %r9d
+	je	Lb00
+	cmp	$2, %r9d
+	jc	Lb01
+	je	Lb10
+	jmp	Lb11
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_rsblsh2_n
+	
+	
+___gmpn_rsblsh2_n:
+
+	
+	push	%rbp
+	xor	%ebp, %ebp	
+	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$62, %r10, %r9
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	sbb	16(%rsi), %r9
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, %rbp
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$3, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb01:	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	mov	%rbp, (%rdi)
+	mov	%r8, %rbp
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$1, %rcx
+	ja	Ltop
+	jmp	Lend
+
+Lb10:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, %rbp
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$2, %rcx
+	ja	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	shrd	$62, %r8, %rbp
+Lb00:	mov	8(%rdx), %r9
+	shrd	$62, %r9, %r8
+	mov	16(%rdx), %r10
+	shrd	$62, %r10, %r9
+	mov	24(%rdx), %r11
+	shrd	$62, %r11, %r10
+	lea	32(%rdx), %rdx
+	add	%eax, %eax	
+	sbb	(%rsi), %rbp
+	sbb	8(%rsi), %r8
+	sbb	16(%rsi), %r9
+	sbb	24(%rsi), %r10
+	lea	32(%rsi), %rsi
+	mov	%rbp, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r9, 16(%rdi)
+	mov	%r10, 24(%rdi)
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	sbb	%eax, %eax	
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lend:	shr	$62, %rbp
+	add	%eax, %eax	
+	sbb	$0, %rbp
+	mov	%rbp, %rax
+	pop	%rbp
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh_n.s
new file mode 100644
index 0000000..329c600
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rsblsh_n.s
@@ -0,0 +1,269 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+
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+
+
+
+
+
+
+
+
+
+  
+  
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_rsblsh_n
+	
+	
+___gmpn_rsblsh_n:
+
+	
+
+
+	mov	(%rdx), %r10
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	xor	%r9d, %r9d
+	sub	%r8, %r9
+	and	$7, %eax
+
+	lea	Ltab(%rip), %r11
+
+	movslq	(%r11,%rax,4), %rax
+	add	%r11, %rax
+	jmp	*%rax
+
+
+L0:	lea	32(%rsi), %rsi
+	lea	32(%rdx), %rdx
+	lea	32(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le0
+
+L7:	mov	%r10, %r11
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le7
+
+L6:	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le6
+
+L5:	mov	%r10, %r11
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le5
+
+Lend:	sbb	24(%rsi), %rax
+	mov	%rax, -40(%rdi)
+	.byte	0xc4,194,179,0xf7,195
+	sbb	%rcx, %rax
+	
+	ret
+
+	.align	5, 0x90
+Ltop:	jrcxz	Lend
+	mov	-32(%rdx), %r10
+	sbb	24(%rsi), %rax
+	lea	64(%rsi), %rsi
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -40(%rdi)
+Le0:	dec	%rcx
+	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	-24(%rdx), %r11
+	sbb	-32(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, -32(%rdi)
+Le7:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	-16(%rdx), %r10
+	sbb	-24(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -24(%rdi)
+Le6:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	-8(%rdx), %r11
+	sbb	-16(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, -16(%rdi)
+Le5:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	(%rdx), %r10
+	sbb	-8(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, -8(%rdi)
+Le4:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	8(%rdx), %r11
+	sbb	(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, (%rdi)
+Le3:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	mov	16(%rdx), %r10
+	sbb	8(%rsi), %rax
+	.byte	0xc4,66,179,0xf7,219
+	mov	%rax, 8(%rdi)
+Le2:	.byte	0xc4,194,185,0xf7,194
+	lea	(%r11,%rax), %rax
+	mov	24(%rdx), %r11
+	sbb	16(%rsi), %rax
+	lea	64(%rdx), %rdx
+	.byte	0xc4,66,179,0xf7,210
+	mov	%rax, 16(%rdi)
+	lea	64(%rdi), %rdi
+Le1:	.byte	0xc4,194,185,0xf7,195
+	lea	(%r10,%rax), %rax
+	jmp	Ltop
+
+L4:	xor	%r11d, %r11d
+	jmp	Le4
+
+L3:	mov	%r10, %r11
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le3
+
+L2:	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	xor	%r11d, %r11d
+	jmp	Le2
+
+L1:	mov	%r10, %r11
+	lea	-24(%rsi), %rsi
+	lea	40(%rdx), %rdx
+	lea	40(%rdi), %rdi
+	xor	%r10d, %r10d
+	jmp	Le1
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1add_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1add_n.s
new file mode 100644
index 0000000..96749ec
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1add_n.s
@@ -0,0 +1,208 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	
+	
+	
+	
+
+
+
+
+
+
+
+
+	.text
+
+	.align	4, 0x90
+	.globl	___gmpn_rsh1add_nc
+	
+	
+___gmpn_rsh1add_nc:
+
+	
+
+	push	%rbx
+	push	%rbp
+
+	neg	%r8			
+	mov	(%rsi), %rbp
+	adc	(%rdx), %rbp
+
+	jmp	Lent
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_rsh1add_n
+	
+	
+___gmpn_rsh1add_n:
+
+	
+	push	%rbx
+	push	%rbp
+
+	mov	(%rsi), %rbp
+	add	(%rdx), %rbp
+Lent:
+	sbb	%ebx, %ebx	
+	mov	%ebp, %eax
+	and	$1, %eax		
+
+	mov	%ecx, %r11d
+	and	$3, %r11d
+
+	cmp	$1, %r11d
+	je	Ldo			
+
+Ln1:	cmp	$2, %r11d
+	jne	Ln2			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r10
+	adc	8(%rdx), %r10
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r10, %rbp
+	mov	%rbp, -8(%rdi)
+	jmp	Lcj1
+
+Ln2:	cmp	$3, %r11d
+	jne	Ln3			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r9
+	mov	16(%rsi), %r10
+	adc	8(%rdx), %r9
+	adc	16(%rdx), %r10
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r9, %rbp
+	mov	%rbp, -16(%rdi)
+	jmp	Lcj2
+
+Ln3:	dec	%rcx			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	adc	8(%rdx), %r8
+	adc	16(%rdx), %r9
+	mov	24(%rsi), %r10
+	adc	24(%rdx), %r10
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r8, %rbp
+	mov	%rbp, -24(%rdi)
+	shrd	$1, %r9, %r8
+	mov	%r8, -16(%rdi)
+Lcj2:	shrd	$1, %r10, %r9
+	mov	%r9, -8(%rdi)
+Lcj1:	mov	%r10, %rbp
+
+Ldo:
+	shr	$2, %rcx			
+	je	Lend			
+	.align	4, 0x90
+Ltop:	add	%ebx, %ebx		
+
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	adc	8(%rdx), %r8
+	adc	16(%rdx), %r9
+	mov	24(%rsi), %r10
+	mov	32(%rsi), %r11
+	adc	24(%rdx), %r10
+	adc	32(%rdx), %r11
+
+	lea	32(%rsi), %rsi
+	lea	32(%rdx), %rdx
+
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r8, %rbp
+	mov	%rbp, (%rdi)
+	shrd	$1, %r9, %r8
+	mov	%r8, 8(%rdi)
+	shrd	$1, %r10, %r9
+	mov	%r9, 16(%rdi)
+	shrd	$1, %r11, %r10
+	mov	%r10, 24(%rdi)
+
+	dec	%rcx
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	jne	Ltop
+
+Lend:	shrd	$1, %rbx, %rbp
+	mov	%rbp, (%rdi)
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1sub_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1sub_n.s
new file mode 100644
index 0000000..ca201b3
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rsh1sub_n.s
@@ -0,0 +1,208 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+	
+	
+	
+	
+
+
+
+
+
+
+
+	.text
+
+	.align	4, 0x90
+	.globl	___gmpn_rsh1sub_nc
+	
+	
+___gmpn_rsh1sub_nc:
+
+	
+
+	push	%rbx
+	push	%rbp
+
+	neg	%r8			
+	mov	(%rsi), %rbp
+	sbb	(%rdx), %rbp
+
+	jmp	Lent
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_rsh1sub_n
+	
+	
+___gmpn_rsh1sub_n:
+
+	
+	push	%rbx
+	push	%rbp
+
+	mov	(%rsi), %rbp
+	sub	(%rdx), %rbp
+Lent:
+	sbb	%ebx, %ebx	
+	mov	%ebp, %eax
+	and	$1, %eax		
+
+	mov	%ecx, %r11d
+	and	$3, %r11d
+
+	cmp	$1, %r11d
+	je	Ldo			
+
+Ln1:	cmp	$2, %r11d
+	jne	Ln2			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r10
+	sbb	8(%rdx), %r10
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r10, %rbp
+	mov	%rbp, -8(%rdi)
+	jmp	Lcj1
+
+Ln2:	cmp	$3, %r11d
+	jne	Ln3			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r9
+	mov	16(%rsi), %r10
+	sbb	8(%rdx), %r9
+	sbb	16(%rdx), %r10
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	16(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r9, %rbp
+	mov	%rbp, -16(%rdi)
+	jmp	Lcj2
+
+Ln3:	dec	%rcx			
+	add	%ebx, %ebx	
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	sbb	8(%rdx), %r8
+	sbb	16(%rdx), %r9
+	mov	24(%rsi), %r10
+	sbb	24(%rdx), %r10
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	24(%rdi), %rdi
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r8, %rbp
+	mov	%rbp, -24(%rdi)
+	shrd	$1, %r9, %r8
+	mov	%r8, -16(%rdi)
+Lcj2:	shrd	$1, %r10, %r9
+	mov	%r9, -8(%rdi)
+Lcj1:	mov	%r10, %rbp
+
+Ldo:
+	shr	$2, %rcx			
+	je	Lend			
+	.align	4, 0x90
+Ltop:	add	%ebx, %ebx		
+
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	sbb	8(%rdx), %r8
+	sbb	16(%rdx), %r9
+	mov	24(%rsi), %r10
+	mov	32(%rsi), %r11
+	sbb	24(%rdx), %r10
+	sbb	32(%rdx), %r11
+
+	lea	32(%rsi), %rsi
+	lea	32(%rdx), %rdx
+
+	sbb	%ebx, %ebx	
+
+	shrd	$1, %r8, %rbp
+	mov	%rbp, (%rdi)
+	shrd	$1, %r9, %r8
+	mov	%r8, 8(%rdi)
+	shrd	$1, %r10, %r9
+	mov	%r9, 16(%rdi)
+	shrd	$1, %r11, %r10
+	mov	%r10, 24(%rdi)
+
+	dec	%rcx
+	mov	%r11, %rbp
+	lea	32(%rdi), %rdi
+	jne	Ltop
+
+Lend:	shrd	$1, %rbx, %rbp
+	mov	%rbp, (%rdi)
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/rshift.s b/vere/ext/gmp/gen/x86_64-macos/mpn/rshift.s
new file mode 100644
index 0000000..7528e27
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/rshift.s
@@ -0,0 +1,230 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	6, 0x90
+	.globl	___gmpn_rshift
+	
+	
+___gmpn_rshift:
+
+	
+	movd	%ecx, %xmm4
+	mov	$64, %eax
+	sub	%ecx, %eax
+	movd	%eax, %xmm5
+
+	neg	%ecx
+	mov	(%rsi), %rax
+	shl	%cl, %rax
+
+	cmp	$3, %rdx
+	jle	Lbc
+
+	test	$8, %dil
+	jz	Lrp_aligned
+
+
+	movq	(%rsi), %xmm0
+	movq	8(%rsi), %xmm1
+	psrlq	%xmm4, %xmm0
+	psllq	%xmm5, %xmm1
+	por	%xmm1, %xmm0
+	movq	%xmm0, (%rdi)
+	lea	8(%rsi), %rsi
+	lea	8(%rdi), %rdi
+	dec	%rdx
+
+Lrp_aligned:
+	lea	1(%rdx), %r8d
+	lea	(%rsi,%rdx,8), %rsi
+	lea	(%rdi,%rdx,8), %rdi
+	neg	%rdx
+
+	and	$6, %r8d
+	jz	Lbu0
+	cmp	$4, %r8d
+	jz	Lbu4
+	jc	Lbu2
+Lbu6:	add	$4, %rdx
+	jmp	Li56
+Lbu0:	add	$6, %rdx
+	jmp	Li70
+Lbu4:	add	$2, %rdx
+	jmp	Li34
+Lbu2:	add	$8, %rdx
+	jge	Lend
+
+	.align	4, 0x90
+Ltop:	movdqu	-64(%rsi,%rdx,8), %xmm1
+	movdqu	-56(%rsi,%rdx,8), %xmm0
+	psllq	%xmm5, %xmm0
+	psrlq	%xmm4, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, -64(%rdi,%rdx,8)
+Li70:
+	movdqu	-48(%rsi,%rdx,8), %xmm1
+	movdqu	-40(%rsi,%rdx,8), %xmm0
+	psllq	%xmm5, %xmm0
+	psrlq	%xmm4, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, -48(%rdi,%rdx,8)
+Li56:
+	movdqu	-32(%rsi,%rdx,8), %xmm1
+	movdqu	-24(%rsi,%rdx,8), %xmm0
+	psllq	%xmm5, %xmm0
+	psrlq	%xmm4, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, -32(%rdi,%rdx,8)
+Li34:
+	movdqu	-16(%rsi,%rdx,8), %xmm1
+	movdqu	-8(%rsi,%rdx,8), %xmm0
+	psllq	%xmm5, %xmm0
+	psrlq	%xmm4, %xmm1
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, -16(%rdi,%rdx,8)
+	add	$8, %rdx
+	jl	Ltop
+
+Lend:	test	$1, %dl
+	jnz	Le1
+
+	movdqu	-16(%rsi), %xmm1
+	movq	-8(%rsi), %xmm0
+	psrlq	%xmm4, %xmm1
+	psllq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movdqa	%xmm0, -16(%rdi)
+	
+	ret
+
+Le1:	movq	-8(%rsi), %xmm0
+	psrlq	%xmm4, %xmm0
+	movq	%xmm0, -8(%rdi)
+	
+	ret
+
+
+	.align	4, 0x90
+Lbc:	dec	%edx
+	jnz	1f
+	movq	(%rsi), %xmm0
+	psrlq	%xmm4, %xmm0
+	movq	%xmm0, (%rdi)
+	
+	ret
+
+1:	movq	(%rsi), %xmm1
+	movq	8(%rsi), %xmm0
+	psrlq	%xmm4, %xmm1
+	psllq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movq	%xmm0, (%rdi)
+	dec	%edx
+	jnz	1f
+	movq	8(%rsi), %xmm0
+	psrlq	%xmm4, %xmm0
+	movq	%xmm0, 8(%rdi)
+	
+	ret
+
+1:	movq	8(%rsi), %xmm1
+	movq	16(%rsi), %xmm0
+	psrlq	%xmm4, %xmm1
+	psllq	%xmm5, %xmm0
+	por	%xmm1, %xmm0
+	movq	%xmm0,	8(%rdi)
+	movq	16(%rsi), %xmm0
+	psrlq	%xmm4, %xmm0
+	movq	%xmm0, 16(%rdi)
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sec_tabselect.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sec_tabselect.s
new file mode 100644
index 0000000..46c87ed
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sec_tabselect.s
@@ -0,0 +1,233 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_sec_tabselect
+	
+	
+___gmpn_sec_tabselect:
+
+	
+
+
+
+
+
+
+
+
+	movd	%r8, %xmm8
+	pshufd	$0, %xmm8, %xmm8	
+	mov	$1, %eax
+	movd	%rax, %xmm9
+	pshufd	$0, %xmm9, %xmm9	
+
+	mov	%rdx, %r9
+	add	$-8, %r9
+	js	Louter_end
+
+Louter_top:
+	mov	%rcx, %r10
+	mov	%rsi, %r11
+	pxor	%xmm1, %xmm1
+	pxor	%xmm4, %xmm4
+	pxor	%xmm5, %xmm5
+	pxor	%xmm6, %xmm6
+	pxor	%xmm7, %xmm7
+	.align	4, 0x90
+Ltop:	movdqa	%xmm8, %xmm0
+	pcmpeqd	%xmm1, %xmm0
+	paddd	%xmm9, %xmm1
+	movdqu	0(%rsi), %xmm2
+	movdqu	16(%rsi), %xmm3
+	pand	%xmm0, %xmm2
+	pand	%xmm0, %xmm3
+	por	%xmm2, %xmm4
+	por	%xmm3, %xmm5
+	movdqu	32(%rsi), %xmm2
+	movdqu	48(%rsi), %xmm3
+	pand	%xmm0, %xmm2
+	pand	%xmm0, %xmm3
+	por	%xmm2, %xmm6
+	por	%xmm3, %xmm7
+	lea	(%rsi,%rdx,8), %rsi
+	add	$-1, %r10
+	jne	Ltop
+
+	movdqu	%xmm4, 0(%rdi)
+	movdqu	%xmm5, 16(%rdi)
+	movdqu	%xmm6, 32(%rdi)
+	movdqu	%xmm7, 48(%rdi)
+
+	lea	64(%r11), %rsi
+	lea	64(%rdi), %rdi
+	add	$-8, %r9
+	jns	Louter_top
+Louter_end:
+
+	test	$4, %dl
+	je	Lb0xx
+Lb1xx:mov	%rcx, %r10
+	mov	%rsi, %r11
+	pxor	%xmm1, %xmm1
+	pxor	%xmm4, %xmm4
+	pxor	%xmm5, %xmm5
+	.align	4, 0x90
+Ltp4:	movdqa	%xmm8, %xmm0
+	pcmpeqd	%xmm1, %xmm0
+	paddd	%xmm9, %xmm1
+	movdqu	0(%rsi), %xmm2
+	movdqu	16(%rsi), %xmm3
+	pand	%xmm0, %xmm2
+	pand	%xmm0, %xmm3
+	por	%xmm2, %xmm4
+	por	%xmm3, %xmm5
+	lea	(%rsi,%rdx,8), %rsi
+	add	$-1, %r10
+	jne	Ltp4
+	movdqu	%xmm4, 0(%rdi)
+	movdqu	%xmm5, 16(%rdi)
+	lea	32(%r11), %rsi
+	lea	32(%rdi), %rdi
+
+Lb0xx:test	$2, %dl
+	je	Lb00x
+Lb01x:mov	%rcx, %r10
+	mov	%rsi, %r11
+	pxor	%xmm1, %xmm1
+	pxor	%xmm4, %xmm4
+	.align	4, 0x90
+Ltp2:	movdqa	%xmm8, %xmm0
+	pcmpeqd	%xmm1, %xmm0
+	paddd	%xmm9, %xmm1
+	movdqu	0(%rsi), %xmm2
+	pand	%xmm0, %xmm2
+	por	%xmm2, %xmm4
+	lea	(%rsi,%rdx,8), %rsi
+	add	$-1, %r10
+	jne	Ltp2
+	movdqu	%xmm4, 0(%rdi)
+	lea	16(%r11), %rsi
+	lea	16(%rdi), %rdi
+
+Lb00x:test	$1, %dl
+	je	Lb000
+Lb001:mov	%rcx, %r10
+	mov	%rsi, %r11
+	pxor	%xmm1, %xmm1
+	pxor	%xmm4, %xmm4
+	.align	4, 0x90
+Ltp1:	movdqa	%xmm8, %xmm0
+	pcmpeqd	%xmm1, %xmm0
+	paddd	%xmm9, %xmm1
+	movq	0(%rsi), %xmm2
+	pand	%xmm0, %xmm2
+	por	%xmm2, %xmm4
+	lea	(%rsi,%rdx,8), %rsi
+	add	$-1, %r10
+	jne	Ltp1
+	movq	%xmm4, 0(%rdi)
+
+Lb000:
+
+
+
+
+
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_basecase.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_basecase.s
new file mode 100644
index 0000000..fea3649
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_basecase.s
@@ -0,0 +1,520 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_sqr_basecase
+	
+	
+___gmpn_sqr_basecase:
+
+	
+
+	cmp	$2, %rdx
+	jae	Lgt1
+
+	mov	(%rsi), %rdx
+	.byte	0xc4,226,251,0xf6,210
+	mov	%rax, (%rdi)
+	mov	%rdx, 8(%rdi)
+	
+	ret
+
+Lgt1:	jne	Lgt2
+
+	mov	(%rsi), %rdx
+	mov	8(%rsi), %rcx
+	.byte	0xc4,98,179,0xf6,209	
+	.byte	0xc4,98,251,0xf6,194	
+	mov	%rcx, %rdx
+	.byte	0xc4,226,163,0xf6,210	
+	add	%r9, %r9		
+	adc	%r10, %r10		
+	adc	$0, %rdx		
+	add	%r9, %r8		
+	adc	%r11, %r10		
+	adc	$0, %rdx		
+	mov	%rax, (%rdi)
+	mov	%r8, 8(%rdi)
+	mov	%r10, 16(%rdi)
+	mov	%rdx, 24(%rdi)
+	
+	ret
+
+Lgt2:	cmp	$4, %rdx
+	jae	Lgt3
+
+
+
+
+
+	mov	(%rsi), %r8
+	mov	8(%rsi), %rdx
+	mov	%rdx, %r9
+	.byte	0xc4,194,163,0xf6,192
+	mov	16(%rsi), %rdx
+	.byte	0xc4,194,171,0xf6,200
+	mov	%r11, %r8
+	add	%rax, %r10
+	adc	$0, %rcx
+	.byte	0xc4,194,235,0xf6,193
+	add	%rcx, %rdx
+	mov	%rdx, 24(%rdi)
+	adc	$0, %rax
+	mov	%rax, 32(%rdi)
+	xor	%ecx, %ecx
+	mov	(%rsi), %rdx
+	.byte	0xc4,98,251,0xf6,218
+	mov	%rax, (%rdi)
+	add	%r8, %r8
+	adc	%r10, %r10
+	setc	%cl
+	mov	8(%rsi), %rdx
+	.byte	0xc4,226,251,0xf6,210
+	add	%r11, %r8
+	adc	%rax, %r10
+	mov	%r8, 8(%rdi)
+	mov	%r10, 16(%rdi)
+	mov	24(%rdi), %r8
+	mov	32(%rdi), %r10
+	lea	(%rdx,%rcx), %r11
+	adc	%r8, %r8
+	adc	%r10, %r10
+	setc	%cl
+	mov	16(%rsi), %rdx
+	.byte	0xc4,226,251,0xf6,210
+	add	%r11, %r8
+	adc	%rax, %r10
+	mov	%r8, 24(%rdi)
+	mov	%r10, 32(%rdi)
+	adc	%rcx, %rdx
+	mov	%rdx, 40(%rdi)
+	
+	ret
+
+Lgt3:
+
+
+
+
+
+
+
+
+
+
+
+
+
+Ldo_mul_2:
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	mov	$0, %r12d
+	sub	%rdx, %r12		
+	push	%r12
+	mov	(%rsi), %r8
+	mov	8(%rsi), %rdx
+	lea	2(%r12), %rcx
+	sar	$2, %rcx			
+	inc	%r12			
+	mov	%rdx, %r9
+
+	test	$1, %r12b
+	jnz	Lmx1
+
+Lmx0:	.byte	0xc4,66,227,0xf6,216
+	mov	16(%rsi), %rdx
+	mov	%rbx, 8(%rdi)
+	xor	%rbx, %rbx
+	.byte	0xc4,194,171,0xf6,232
+	test	$2, %r12b
+	jz	Lm00
+
+Lm10:	lea	-8(%rdi), %rdi
+	lea	-8(%rsi), %rsi
+	jmp	Lmlo2
+
+Lm00:	lea	8(%rsi), %rsi
+	lea	8(%rdi), %rdi
+	jmp	Lmlo0
+
+Lmx1:	.byte	0xc4,194,171,0xf6,232
+	mov	16(%rsi), %rdx
+	mov	%r10, 8(%rdi)
+	xor	%r10, %r10
+	.byte	0xc4,66,227,0xf6,216
+	test	$2, %r12b
+	jz	Lmlo3
+
+Lm01:	lea	16(%rdi), %rdi
+	lea	16(%rsi), %rsi
+	jmp	Lmlo1
+
+	.align	5, 0x90
+Lmtop:.byte	0xc4,66,251,0xf6,209
+	add	%rax, %rbx		
+	mov	(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,216
+	adc	$0, %r10			
+	add	%rax, %rbx		
+Lmlo1:adc	$0, %r11			
+	add	%rbp, %rbx			
+	mov	%rbx, (%rdi)		
+	adc	$0, %r11			
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r10		
+	mov	8(%rsi), %rdx
+	adc	$0, %rbx			
+	.byte	0xc4,194,251,0xf6,232
+	add	%rax, %r10		
+	adc	$0, %rbp			
+Lmlo0:add	%r11, %r10			
+	mov	%r10, 8(%rdi)		
+	adc	$0, %rbp			
+	.byte	0xc4,66,251,0xf6,209
+	add	%rax, %rbx		
+	mov	16(%rsi), %rdx
+	.byte	0xc4,66,251,0xf6,216
+	adc	$0, %r10			
+	add	%rax, %rbx		
+	adc	$0, %r11			
+Lmlo3:add	%rbp, %rbx			
+	mov	%rbx, 16(%rdi)		
+	adc	$0, %r11			
+	.byte	0xc4,194,251,0xf6,217
+	add	%rax, %r10		
+	mov	24(%rsi), %rdx
+	adc	$0, %rbx			
+	.byte	0xc4,194,251,0xf6,232
+	add	%rax, %r10		
+	adc	$0, %rbp			
+Lmlo2:add	%r11, %r10			
+	lea	32(%rsi), %rsi
+	mov	%r10, 24(%rdi)		
+	adc	$0, %rbp			
+	inc	%rcx
+	lea	32(%rdi), %rdi
+	jnz	Lmtop
+
+Lmend:.byte	0xc4,194,235,0xf6,193
+	add	%rdx, %rbx
+	adc	$0, %rax
+	add	%rbp, %rbx
+	mov	%rbx, (%rdi)
+	adc	$0, %rax
+	mov	%rax, 8(%rdi)
+
+	lea	16(%rsi), %rsi
+	lea	-16(%rdi), %rdi
+
+Ldo_addmul_2:
+Louter:
+	lea	(%rsi,%r12,8), %rsi		
+	lea	48(%rdi,%r12,8), %rdi		
+
+	mov	-8(%rsi), %r8		
+
+	add	$2, %r12			
+	cmp	$-2, %r12
+	jge	Lcorner
+
+	mov	(%rsi), %r9
+
+	lea	1(%r12), %rcx
+	sar	$2, %rcx			
+
+	mov	%r9, %rdx
+	test	$1, %r12b
+	jnz	Lbx1
+
+Lbx0:	mov	(%rdi), %r13
+	mov	8(%rdi), %r14
+	.byte	0xc4,66,251,0xf6,216
+	add	%rax, %r13
+	adc	$0, %r11
+	mov	%r13, (%rdi)
+	xor	%rbx, %rbx
+	test	$2, %r12b
+	jnz	Lb10
+
+Lb00:	mov	8(%rsi), %rdx
+	lea	16(%rdi), %rdi
+	lea	16(%rsi), %rsi
+	jmp	Llo0
+
+Lb10:	mov	8(%rsi), %rdx
+	mov	16(%rdi), %r13
+	lea	32(%rsi), %rsi
+	inc	%rcx
+	.byte	0xc4,194,251,0xf6,232
+	jz	Lex
+	jmp	Llo2
+
+Lbx1:	mov	(%rdi), %r14
+	mov	8(%rdi), %r13
+	.byte	0xc4,194,251,0xf6,232
+	mov	8(%rsi), %rdx
+	add	%rax, %r14
+	adc	$0, %rbp
+	xor	%r10, %r10
+	mov	%r14, (%rdi)
+	.byte	0xc4,66,251,0xf6,216
+	test	$2, %r12b
+	jz	Lb11
+
+Lb01:	mov	16(%rdi), %r14
+	lea	24(%rdi), %rdi
+	lea	24(%rsi), %rsi
+	jmp	Llo1
+
+Lb11:	lea	8(%rdi), %rdi
+	lea	8(%rsi), %rsi
+	jmp	Llo3
+
+	.align	5, 0x90
+Ltop:	.byte	0xc4,194,251,0xf6,232
+	add	%r10, %r14
+	adc	$0, %rbx
+Llo2:	add	%rax, %r14
+	adc	$0, %rbp
+	.byte	0xc4,66,251,0xf6,209
+	add	%rax, %r13
+	adc	$0, %r10
+	lea	32(%rdi), %rdi
+	add	%r11, %r14
+	mov	-16(%rsi), %rdx
+	mov	%r14, -24(%rdi)
+	adc	$0, %rbp
+	add	%rbx, %r13
+	mov	-8(%rdi), %r14
+	.byte	0xc4,66,251,0xf6,216
+	adc	$0, %r10
+Llo1:	add	%rax, %r13
+	.byte	0xc4,194,251,0xf6,217
+	adc	$0, %r11
+	add	%rbp, %r13
+	mov	%r13, -16(%rdi)
+	adc	$0, %r11
+	add	%rax, %r14
+	adc	$0, %rbx
+	add	%r10, %r14
+	mov	-8(%rsi), %rdx
+	adc	$0, %rbx
+Llo0:	.byte	0xc4,194,251,0xf6,232
+	add	%rax, %r14
+	adc	$0, %rbp
+	mov	(%rdi), %r13
+	.byte	0xc4,66,251,0xf6,209
+	add	%rax, %r13
+	adc	$0, %r10
+	add	%r11, %r14
+	mov	%r14, -8(%rdi)
+	adc	$0, %rbp
+	mov	(%rsi), %rdx
+	add	%rbx, %r13
+	.byte	0xc4,66,251,0xf6,216
+	adc	$0, %r10
+Llo3:	add	%rax, %r13
+	adc	$0, %r11
+	.byte	0xc4,194,251,0xf6,217
+	add	%rbp, %r13
+	mov	8(%rdi), %r14
+	mov	%r13, (%rdi)
+	mov	16(%rdi), %r13
+	adc	$0, %r11
+	add	%rax, %r14
+	adc	$0, %rbx
+	mov	8(%rsi), %rdx
+	lea	32(%rsi), %rsi
+	inc	%rcx
+	jnz	Ltop
+
+Lend:	.byte	0xc4,194,251,0xf6,232
+	add	%r10, %r14
+	adc	$0, %rbx
+Lex:	add	%rax, %r14
+	adc	$0, %rbp
+	.byte	0xc4,194,235,0xf6,193
+	add	%r11, %r14
+	mov	%r14, 8(%rdi)
+	adc	$0, %rbp
+	add	%rbx, %rdx
+	adc	$0, %rax
+	add	%rdx, %rbp
+	mov	%rbp, 16(%rdi)
+	adc	$0, %rax
+	mov	%rax, 24(%rdi)
+
+	jmp	Louter		
+
+Lcorner:
+	pop	%r12
+	mov	(%rsi), %rdx
+	jg	Lsmall_corner
+
+	mov	%rdx, %r9
+	mov	(%rdi), %r13
+	mov	%rax, %r14		
+	.byte	0xc4,66,251,0xf6,216
+	add	%rax, %r13
+	adc	$0, %r11
+	mov	%r13, (%rdi)
+	mov	8(%rsi), %rdx
+	.byte	0xc4,194,251,0xf6,232
+	add	%rax, %r14
+	adc	$0, %rbp
+	.byte	0xc4,194,235,0xf6,193
+	add	%r11, %r14
+	mov	%r14, 8(%rdi)
+	adc	$0, %rbp
+	add	%rbp, %rdx
+	mov	%rdx, 16(%rdi)
+	adc	$0, %rax
+	mov	%rax, 24(%rdi)
+	lea	32(%rdi), %rdi
+	lea	16(%rsi), %rsi
+	jmp	Lcom
+
+Lsmall_corner:
+	.byte	0xc4,194,139,0xf6,232
+	add	%rax, %r14		
+	adc	$0, %rbp
+	mov	%r14, (%rdi)
+	mov	%rbp, 8(%rdi)
+	lea	16(%rdi), %rdi
+	lea	8(%rsi), %rsi
+
+Lcom:
+
+Lsqr_diag_addlsh1:
+	lea	8(%rsi,%r12,8), %rsi		
+	lea	(%rdi,%r12,8), %rdi
+	lea	(%rdi,%r12,8), %rdi		
+	inc	%r12
+
+	mov	-8(%rsi), %rdx
+	xor	%ebx, %ebx	
+	.byte	0xc4,98,251,0xf6,210
+	mov	%rax, 8(%rdi)
+	mov	16(%rdi), %r8
+	mov	24(%rdi), %r9
+	jmp	Ldm
+
+	.align	4, 0x90
+Ldtop:mov	32(%rdi), %r8
+	mov	40(%rdi), %r9
+	lea	16(%rdi), %rdi
+	lea	(%rdx,%rbx), %r10
+Ldm:	adc	%r8, %r8
+	adc	%r9, %r9
+	setc	%bl
+	mov	(%rsi), %rdx
+	lea	8(%rsi), %rsi
+	.byte	0xc4,226,251,0xf6,210
+	add	%r10, %r8
+	adc	%rax, %r9
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	inc	%r12
+	jnz	Ldtop
+
+Ldend:adc	%rbx, %rdx
+	mov	%rdx, 32(%rdi)
+
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_diag_addlsh1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_diag_addlsh1.s
new file mode 100644
index 0000000..f82bd03
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sqr_diag_addlsh1.s
@@ -0,0 +1,130 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_sqr_diag_addlsh1
+	
+	
+___gmpn_sqr_diag_addlsh1:
+
+	
+	push	%rbx
+
+	dec	%rcx
+	shl	%rcx
+
+	mov	(%rdx), %rax
+
+	lea	(%rdi,%rcx,8), %rdi
+	lea	(%rsi,%rcx,8), %rsi
+	lea	(%rdx,%rcx,4), %r11
+	neg	%rcx
+
+	mul	%rax
+	mov	%rax, (%rdi,%rcx,8)
+
+	xor	%ebx, %ebx
+	jmp	Lmid
+
+	.align	4, 0x90
+Ltop:	add	%r10, %r8
+	adc	%rax, %r9
+	mov	%r8, -8(%rdi,%rcx,8)
+	mov	%r9, (%rdi,%rcx,8)
+Lmid:	mov	8(%r11,%rcx,4), %rax
+	mov	(%rsi,%rcx,8), %r8
+	mov	8(%rsi,%rcx,8), %r9
+	adc	%r8, %r8
+	adc	%r9, %r9
+	lea	(%rdx,%rbx), %r10
+	setc	%bl
+	mul	%rax
+	add	$2, %rcx
+	js	Ltop
+
+Lend:	add	%r10, %r8
+	adc	%rax, %r9
+	mov	%r8, -8(%rdi)
+	mov	%r9, (%rdi)
+	adc	%rbx, %rdx
+	mov	%rdx, 8(%rdi)
+
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err1_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err1_n.s
new file mode 100644
index 0000000..68dcb90
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err1_n.s
@@ -0,0 +1,237 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_sub_err1_n
+	
+	
+___gmpn_sub_err1_n:
+
+	mov	8(%rsp), %rax
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+
+	lea	(%rsi,%r9,8), %rsi
+	lea	(%rdx,%r9,8), %rdx
+	lea	(%rdi,%r9,8), %rdi
+
+	mov	%r9d, %r10d
+	and	$3, %r10d
+	jz	L0mod4
+	cmp	$2, %r10d
+	jc	L1mod4
+	jz	L2mod4
+L3mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	xor	%r10d, %r10d
+	xor	%r11d, %r11d
+	lea	-24(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	mov	8(%rsi,%r9,8), %r15
+	sbb	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	16(%r8), %rbx
+	sbb	8(%rdx,%r9,8), %r15
+	mov	%r15, 8(%rdi,%r9,8)
+	cmovc	8(%r8), %r10
+	mov	16(%rsi,%r9,8), %r14
+	sbb	16(%rdx,%r9,8), %r14
+	mov	%r14, 16(%rdi,%r9,8)
+	cmovc	(%r8), %r11
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+	add	%r11, %rbx
+	adc	$0, %rbp
+
+	add	$3, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	4, 0x90
+L0mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	lea	(%r8,%r9,8), %r8
+	neg	%r9
+	jmp	Lloop
+
+	.align	4, 0x90
+L1mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	lea	-8(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	sbb	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	(%r8), %rbx
+	setc	%al		   
+
+	add	$1, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	4, 0x90
+L2mod4:
+	xor	%ebx, %ebx
+	xor	%ebp, %ebp
+	xor	%r10d, %r10d
+	lea	-16(%r8,%r9,8), %r8
+	neg	%r9
+
+	shr	$1, %al		   
+	mov	(%rsi,%r9,8), %r14
+	mov	8(%rsi,%r9,8), %r15
+	sbb	(%rdx,%r9,8), %r14
+	mov	%r14, (%rdi,%r9,8)
+	cmovc	8(%r8), %rbx
+	sbb	8(%rdx,%r9,8), %r15
+	mov	%r15, 8(%rdi,%r9,8)
+	cmovc	(%r8), %r10
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+
+	add	$2, %r9
+	jnz	Lloop
+	jmp	Lend
+
+	.align	5, 0x90
+Lloop:
+	mov	(%rsi,%r9,8), %r14
+	shr	$1, %al		   
+	mov	-8(%r8), %r10
+	mov	$0, %r13d
+	sbb	(%rdx,%r9,8), %r14
+	cmovnc	%r13, %r10
+	mov	%r14, (%rdi,%r9,8)
+	mov	8(%rsi,%r9,8), %r15
+	mov	16(%rsi,%r9,8), %r14
+	sbb	8(%rdx,%r9,8), %r15
+	mov	-16(%r8), %r11
+	cmovnc	%r13, %r11
+	mov	-24(%r8), %r12
+	mov	%r15, 8(%rdi,%r9,8)
+	sbb	16(%rdx,%r9,8), %r14
+	cmovnc	%r13, %r12
+	mov	24(%rsi,%r9,8), %r15
+	sbb	24(%rdx,%r9,8), %r15
+	cmovc	-32(%r8), %r13
+	setc	%al		   
+	add	%r10, %rbx
+	adc	$0, %rbp
+	add	%r11, %rbx
+	adc	$0, %rbp
+	add	%r12, %rbx
+	adc	$0, %rbp
+	lea	-32(%r8), %r8
+	mov	%r14, 16(%rdi,%r9,8)
+	add	%r13, %rbx
+	adc	$0, %rbp
+	add	$4, %r9
+	mov	%r15, -8(%rdi,%r9,8)
+	jnz	Lloop
+
+Lend:
+	mov	%rbx, (%rcx)
+	mov	%rbp, 8(%rcx)
+
+	pop	%r15
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err2_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err2_n.s
new file mode 100644
index 0000000..bfa02d4
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err2_n.s
@@ -0,0 +1,184 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_sub_err2_n
+	
+	
+___gmpn_sub_err2_n:
+
+	mov	16(%rsp), %rax
+	mov	8(%rsp), %r10
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+
+	xor	%ebp, %ebp
+	xor	%r11d, %r11d
+	xor	%r12d, %r12d
+	xor	%r13d, %r13d
+
+	sub	%r8, %r9
+
+	lea	(%rdi,%r10,8), %rdi
+	lea	(%rsi,%r10,8), %rsi
+	lea	(%rdx,%r10,8), %rdx
+
+	test	$1, %r10
+	jnz	Lodd
+
+	lea	-8(%r8,%r10,8), %r8
+	neg	%r10
+	jmp	Ltop
+
+	.align	4, 0x90
+Lodd:
+	lea	-16(%r8,%r10,8), %r8
+	neg	%r10
+	shr	$1, %rax
+	mov	(%rsi,%r10,8), %rbx
+	sbb	(%rdx,%r10,8), %rbx
+	cmovc	8(%r8), %rbp
+	cmovc	8(%r8,%r9), %r12
+	mov	%rbx, (%rdi,%r10,8)
+	sbb	%rax, %rax
+	inc	%r10
+	jz	Lend
+
+	.align	4, 0x90
+Ltop:
+	mov	(%rsi,%r10,8), %rbx
+	shr	$1, %rax		
+	sbb	(%rdx,%r10,8), %rbx
+	mov	%rbx, (%rdi,%r10,8)
+	sbb	%r14, %r14	
+
+	mov	8(%rsi,%r10,8), %rbx
+	sbb	8(%rdx,%r10,8), %rbx
+	mov	%rbx, 8(%rdi,%r10,8)
+	sbb	%rax, %rax	
+
+	mov	(%r8), %rbx	
+	and	%r14, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	and	(%r8,%r9), %r14	
+	add	%r14, %r12
+	adc	$0, %r13
+
+	mov	-8(%r8), %rbx	
+	and	%rax, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	mov	-8(%r8,%r9), %rbx	
+	and	%rax, %rbx
+	add	%rbx, %r12
+	adc	$0, %r13
+
+	add	$2, %r10
+	lea	-16(%r8), %r8
+	jnz	Ltop
+Lend:
+
+	mov	%rbp, (%rcx)
+	mov	%r11, 8(%rcx)
+	mov	%r12, 16(%rcx)
+	mov	%r13, 24(%rcx)
+
+	and	$1, %eax	
+
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err3_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err3_n.s
new file mode 100644
index 0000000..fcccfe3
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_err3_n.s
@@ -0,0 +1,168 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+	
+	
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_sub_err3_n
+	
+	
+___gmpn_sub_err3_n:
+
+	mov	24(%rsp), %rax
+	mov	16(%rsp), %r10
+
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+
+	push	%rcx
+	mov	64(%rsp), %rcx       
+
+	xor	%ebp, %ebp
+	xor	%r11d, %r11d
+	xor	%r12d, %r12d
+	xor	%r13d, %r13d
+	xor	%r14d, %r14d
+	xor	%r15d, %r15d
+
+	sub	%r8, %r9
+	sub	%r8, %rcx
+
+	lea	-8(%r8,%r10,8), %r8
+	lea	(%rdi,%r10,8), %rdi
+	lea	(%rsi,%r10,8), %rsi
+	lea	(%rdx,%r10,8), %rdx
+	neg	%r10
+
+	.align	4, 0x90
+Ltop:
+	shr	$1, %rax		
+	mov	(%rsi,%r10,8), %rax
+	sbb	(%rdx,%r10,8), %rax
+	mov	%rax, (%rdi,%r10,8)
+	sbb	%rax, %rax		
+
+	mov	(%r8), %rbx
+	and	%rax, %rbx
+	add	%rbx, %rbp
+	adc	$0, %r11
+
+	mov	(%r8,%r9), %rbx
+	and	%rax, %rbx
+	add	%rbx, %r12
+	adc	$0, %r13
+
+	mov	(%r8,%rcx), %rbx
+	and	%rax, %rbx
+	add	%rbx, %r14
+	adc	$0, %r15
+
+	lea	-8(%r8), %r8
+	inc	%r10
+	jnz     Ltop
+
+Lend:
+	and	$1, %eax
+	pop	%rcx
+
+	mov	%rbp, (%rcx)
+	mov	%r11, 8(%rcx)
+	mov	%r12, 16(%rcx)
+	mov	%r13, 24(%rcx)
+	mov	%r14, 32(%rcx)
+	mov	%r15, 40(%rcx)
+
+	pop	%r15
+	pop	%r14
+	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sub_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_n.s
new file mode 100644
index 0000000..f9868bb
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sub_n.s
@@ -0,0 +1,289 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+	
+	
+	
+	
+	
+
+
+
+	
+	
+	
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_sub_nc
+	
+	
+___gmpn_sub_nc:
+
+	
+
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	and	$7, %eax
+
+	lea	Ltab(%rip), %r9
+	neg	%r8			
+
+	movslq	(%r9,%rax,4), %rax
+	lea	(%r9,%rax), %rax	
+	jmp	*%rax
+
+	
+
+	.align	4, 0x90
+	.globl	___gmpn_sub_n
+	
+	
+___gmpn_sub_n:
+
+	
+
+	mov	%ecx, %eax
+	shr	$3, %rcx
+	and	$7, %eax		
+
+	lea	Ltab(%rip), %r9
+
+	movslq	(%r9,%rax,4), %rax
+	lea	(%r9,%rax), %rax	
+	jmp	*%rax
+
+
+L0:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	sbb	(%rdx), %r8
+	jmp	Le0
+
+L4:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	sbb	(%rdx), %r8
+	lea	-32(%rsi), %rsi
+	lea	-32(%rdx), %rdx
+	lea	-32(%rdi), %rdi
+	inc	%rcx
+	jmp	Le4
+
+L5:	mov	(%rsi), %r11
+	mov	8(%rsi), %r8
+	mov	16(%rsi), %r9
+	sbb	(%rdx), %r11
+	lea	-24(%rsi), %rsi
+	lea	-24(%rdx), %rdx
+	lea	-24(%rdi), %rdi
+	inc	%rcx
+	jmp	Le5
+
+L6:	mov	(%rsi), %r10
+	sbb	(%rdx), %r10
+	mov	8(%rsi), %r11
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	inc	%rcx
+	jmp	Le6
+
+L7:	mov	(%rsi), %r9
+	mov	8(%rsi), %r10
+	sbb	(%rdx), %r9
+	sbb	8(%rdx), %r10
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	inc	%rcx
+	jmp	Le7
+
+	.align	4, 0x90
+Ltop:
+Le3:	mov	%r9, 40(%rdi)
+Le2:	mov	%r10, 48(%rdi)
+Le1:	mov	(%rsi), %r8
+	mov	8(%rsi), %r9
+	sbb	(%rdx), %r8
+	mov	%r11, 56(%rdi)
+	lea	64(%rdi), %rdi
+Le0:	mov	16(%rsi), %r10
+	sbb	8(%rdx), %r9
+	sbb	16(%rdx), %r10
+	mov	%r8, (%rdi)
+Le7:	mov	24(%rsi), %r11
+	mov	%r9, 8(%rdi)
+Le6:	mov	32(%rsi), %r8
+	mov	40(%rsi), %r9
+	sbb	24(%rdx), %r11
+	mov	%r10, 16(%rdi)
+Le5:	sbb	32(%rdx), %r8
+	mov	%r11, 24(%rdi)
+Le4:	mov	48(%rsi), %r10
+	mov	56(%rsi), %r11
+	mov	%r8, 32(%rdi)
+	lea	64(%rsi), %rsi
+	sbb	40(%rdx), %r9
+	sbb	48(%rdx), %r10
+	sbb	56(%rdx), %r11
+	lea	64(%rdx), %rdx
+	dec	%rcx
+	jnz	Ltop
+
+Lend:	mov	%r9, 40(%rdi)
+	mov	%r10, 48(%rdi)
+	mov	%r11, 56(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L3:	mov	(%rsi), %r9
+	mov	8(%rsi), %r10
+	mov	16(%rsi), %r11
+	sbb	(%rdx), %r9
+	sbb	8(%rdx), %r10
+	sbb	16(%rdx), %r11
+	jrcxz	Lx3
+	lea	24(%rsi), %rsi
+	lea	24(%rdx), %rdx
+	lea	-40(%rdi), %rdi
+	jmp	Le3
+Lx3:	mov	%r9, (%rdi)
+	mov	%r10, 8(%rdi)
+	mov	%r11, 16(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L1:	mov	(%rsi), %r11
+	sbb	(%rdx), %r11
+	jrcxz	Lx1
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	-56(%rdi), %rdi
+	jmp	Le1
+Lx1:	mov	%r11, (%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+
+	.align	4, 0x90
+L2:	mov	(%rsi), %r10
+	mov	8(%rsi), %r11
+	sbb	(%rdx), %r10
+	sbb	8(%rdx), %r11
+	jrcxz	Lx2
+	lea	16(%rsi), %rsi
+	lea	16(%rdx), %rdx
+	lea	-48(%rdi), %rdi
+	jmp	Le2
+Lx2:	mov	%r10, (%rdi)
+	mov	%r11, 8(%rdi)
+	mov	%ecx, %eax
+	adc	%ecx, %eax
+	
+	ret
+	
+	.text
+	.align	3, 0x90
+Ltab:	.set	L0_tmp, L0-Ltab
+	.long	L0_tmp
+
+	.set	L1_tmp, L1-Ltab
+	.long	L1_tmp
+
+	.set	L2_tmp, L2-Ltab
+	.long	L2_tmp
+
+	.set	L3_tmp, L3-Ltab
+	.long	L3_tmp
+
+	.set	L4_tmp, L4-Ltab
+	.long	L4_tmp
+
+	.set	L5_tmp, L5-Ltab
+	.long	L5_tmp
+
+	.set	L6_tmp, L6-Ltab
+	.long	L6_tmp
+
+	.set	L7_tmp, L7-Ltab
+	.long	L7_tmp
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh1_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh1_n.s
new file mode 100644
index 0000000..40b2b48
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh1_n.s
@@ -0,0 +1,190 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	3, 0x90
+	.globl	___gmpn_sublsh1_n
+	
+	
+___gmpn_sublsh1_n:
+
+	
+	push	%rbx
+	push	%r12
+
+	mov	%ecx, %eax
+	lea	24(%rsi,%rcx,8), %rsi
+	lea	24(%rdx,%rcx,8), %rdx
+	lea	24(%rdi,%rcx,8), %rdi
+	neg	%rcx
+
+	xor	%r11d, %r11d
+
+	mov	-24(%rdx,%rcx,8), %r8	
+	shrd	$63, %r8, %r11
+
+	and	$3, %eax
+	je	Lb0
+	cmp	$2, %eax
+	jc	Lb1
+	je	Lb2
+
+Lb3:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$63, %r9, %r8
+	mov	-8(%rdx,%rcx,8), %r10
+	shrd	$63, %r10, %r9
+	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+	mov	-8(%rsi,%rcx,8), %r12
+	sbb	%r9, %r12
+	mov	%r12, -8(%rdi,%rcx,8)
+	mov	%r10, %r11
+	sbb	%eax, %eax	
+	add	$3, %rcx
+	js	Ltop
+	jmp	Lend
+
+Lb1:	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	%r8, %r11
+	sbb	%eax, %eax	
+	inc	%rcx
+	js	Ltop
+	jmp	Lend
+
+Lb2:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$63, %r9, %r8
+	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+	mov	%r9, %r11
+	sbb	%eax, %eax	
+	add	$2, %rcx
+	js	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	-24(%rdx,%rcx,8), %r8
+	shrd	$63, %r8, %r11
+Lb0:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$63, %r9, %r8
+	mov	-8(%rdx,%rcx,8), %r10
+	shrd	$63, %r10, %r9
+	mov	(%rdx,%rcx,8), %rbx
+	shrd	$63, %rbx, %r10
+
+	add	%eax, %eax	
+
+	mov	-24(%rsi,%rcx,8), %r12
+	sbb	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+
+	mov	-8(%rsi,%rcx,8), %r12
+	sbb	%r9, %r12
+	mov	%r12, -8(%rdi,%rcx,8)
+
+	mov	(%rsi,%rcx,8), %r12
+	sbb	%r10, %r12
+	mov	%r12, (%rdi,%rcx,8)
+
+	mov	%rbx, %r11
+	sbb	%eax, %eax	
+
+	add	$4, %rcx
+	js	Ltop
+
+Lend:	shr	$63, %r11
+	pop	%r12
+	pop	%rbx
+	sub	%r11d, %eax
+	neg	%eax
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh2_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh2_n.s
new file mode 100644
index 0000000..8e62cfe
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/sublsh2_n.s
@@ -0,0 +1,190 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	3, 0x90
+	.globl	___gmpn_sublsh2_n
+	
+	
+___gmpn_sublsh2_n:
+
+	
+	push	%rbx
+	push	%r12
+
+	mov	%ecx, %eax
+	lea	24(%rsi,%rcx,8), %rsi
+	lea	24(%rdx,%rcx,8), %rdx
+	lea	24(%rdi,%rcx,8), %rdi
+	neg	%rcx
+
+	xor	%r11d, %r11d
+
+	mov	-24(%rdx,%rcx,8), %r8	
+	shrd	$62, %r8, %r11
+
+	and	$3, %eax
+	je	Lb0
+	cmp	$2, %eax
+	jc	Lb1
+	je	Lb2
+
+Lb3:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$62, %r9, %r8
+	mov	-8(%rdx,%rcx,8), %r10
+	shrd	$62, %r10, %r9
+	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+	mov	-8(%rsi,%rcx,8), %r12
+	sbb	%r9, %r12
+	mov	%r12, -8(%rdi,%rcx,8)
+	mov	%r10, %r11
+	sbb	%eax, %eax	
+	add	$3, %rcx
+	js	Ltop
+	jmp	Lend
+
+Lb1:	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	%r8, %r11
+	sbb	%eax, %eax	
+	inc	%rcx
+	js	Ltop
+	jmp	Lend
+
+Lb2:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$62, %r9, %r8
+	mov	-24(%rsi,%rcx,8), %r12
+	sub	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+	mov	%r9, %r11
+	sbb	%eax, %eax	
+	add	$2, %rcx
+	js	Ltop
+	jmp	Lend
+
+	.align	4, 0x90
+Ltop:	mov	-24(%rdx,%rcx,8), %r8
+	shrd	$62, %r8, %r11
+Lb0:	mov	-16(%rdx,%rcx,8), %r9
+	shrd	$62, %r9, %r8
+	mov	-8(%rdx,%rcx,8), %r10
+	shrd	$62, %r10, %r9
+	mov	(%rdx,%rcx,8), %rbx
+	shrd	$62, %rbx, %r10
+
+	add	%eax, %eax	
+
+	mov	-24(%rsi,%rcx,8), %r12
+	sbb	%r11, %r12
+	mov	%r12, -24(%rdi,%rcx,8)
+
+	mov	-16(%rsi,%rcx,8), %r12
+	sbb	%r8, %r12
+	mov	%r12, -16(%rdi,%rcx,8)
+
+	mov	-8(%rsi,%rcx,8), %r12
+	sbb	%r9, %r12
+	mov	%r12, -8(%rdi,%rcx,8)
+
+	mov	(%rsi,%rcx,8), %r12
+	sbb	%r10, %r12
+	mov	%r12, (%rdi,%rcx,8)
+
+	mov	%rbx, %r11
+	sbb	%eax, %eax	
+
+	add	$4, %rcx
+	js	Ltop
+
+Lend:	shr	$62, %r11
+	pop	%r12
+	pop	%rbx
+	sub	%r11d, %eax
+	neg	%eax
+	
+	ret
+	
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/submul_1.s b/vere/ext/gmp/gen/x86_64-macos/mpn/submul_1.s
new file mode 100644
index 0000000..37fcb54
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/submul_1.s
@@ -0,0 +1,211 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+   
+   
+   
+   
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+	.text
+	.align	4, 0x90
+	.globl	___gmpn_submul_1
+	
+	
+___gmpn_submul_1:
+
+	
+	push	%rbx
+	push	%rbp
+	push	%r12
+	push	%r13
+
+	mov	%rdx, %rbp
+	mov	%rcx, %rdx
+
+	test	$1, %bpl
+	jnz	Lbx1
+
+Lbx0:	shr	$2, %rbp
+	jc	Lb10
+
+Lb00:	.byte	0xc4,98,147,0xf6,38
+	.byte	0xc4,226,227,0xf6,70,8
+	add	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rdi), %r12
+	mov	8(%rdi), %rcx
+	.byte	0xc4,98,179,0xf6,70,16
+	lea	-16(%rdi), %rdi
+	lea	16(%rsi), %rsi
+	sub	%r13, %r12
+	jmp	Llo0
+
+Lbx1:	shr	$2, %rbp
+	jc	Lb11
+
+Lb01:	.byte	0xc4,98,163,0xf6,22
+	jnz	Lgt1
+Ln1:	sub	%r11, (%rdi)
+	mov	$0, %eax
+	adc	%r10, %rax
+	jmp	Lret
+
+Lgt1:	.byte	0xc4,98,147,0xf6,102,8
+	.byte	0xc4,226,227,0xf6,70,16
+	lea	24(%rsi), %rsi
+	add	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	(%rdi), %r10
+	mov	8(%rdi), %r12
+	mov	16(%rdi), %rcx
+	lea	-8(%rdi), %rdi
+	sub	%r11, %r10
+	jmp	Llo1
+
+Lb11:	.byte	0xc4,226,227,0xf6,6
+	mov	(%rdi), %rcx
+	.byte	0xc4,98,179,0xf6,70,8
+	lea	8(%rsi), %rsi
+	lea	-24(%rdi), %rdi
+	inc	%rbp			
+	sub	%rbx, %rcx
+	jmp	Llo3
+
+Lb10:	.byte	0xc4,98,179,0xf6,6
+	.byte	0xc4,98,163,0xf6,86,8
+	lea	-32(%rdi), %rdi
+	mov	$0, %eax
+	clc				
+	jz	Lend			
+
+	.align	4, 0x90
+Ltop:	adc	%rax, %r9
+	lea	32(%rdi), %rdi
+	adc	%r8, %r11
+	.byte	0xc4,98,147,0xf6,102,16
+	mov	(%rdi), %r8
+	.byte	0xc4,226,227,0xf6,70,24
+	lea	32(%rsi), %rsi
+	adc	%r10, %r13
+	adc	%r12, %rbx
+	adc	$0, %rax
+	mov	8(%rdi), %r10
+	mov	16(%rdi), %r12
+	sub	%r9, %r8
+	mov	24(%rdi), %rcx
+	mov	%r8, (%rdi)
+	sbb	%r11, %r10
+Llo1:	.byte	0xc4,98,179,0xf6,6
+	mov	%r10, 8(%rdi)
+	sbb	%r13, %r12
+Llo0:	mov	%r12, 16(%rdi)
+	sbb	%rbx, %rcx
+Llo3:	.byte	0xc4,98,163,0xf6,86,8
+	mov	%rcx, 24(%rdi)
+	dec	%rbp
+	jnz	Ltop
+
+Lend:	adc	%rax, %r9
+	adc	%r8, %r11
+	mov	32(%rdi), %r8
+	mov	%r10, %rax
+	adc	$0, %rax
+	mov	40(%rdi), %r10
+	sub	%r9, %r8
+	mov	%r8, 32(%rdi)
+	sbb	%r11, %r10
+	mov	%r10, 40(%rdi)
+	adc	$0, %rax
+
+Lret:	pop	%r13
+	pop	%r12
+	pop	%rbp
+	pop	%rbx
+	
+	ret
+	
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/xnor_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/xnor_n.s
new file mode 100644
index 0000000..fb72dba
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/xnor_n.s
@@ -0,0 +1,163 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_xnor_n
+	
+	
+___gmpn_xnor_n:
+
+	
+	mov	(%rdx), %r8
+	not	%r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	xor	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	xor	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+	not	%r8
+Lb00:	mov	8(%rdx), %r9
+	not	%r9
+	xor	(%rsi), %r8
+	xor	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+	not	%r8
+Le10:	mov	24(%rdx), %r9
+	not	%r9
+	lea	32(%rdx), %rdx
+	xor	16(%rsi), %r8
+	xor	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/mpn/xor_n.s b/vere/ext/gmp/gen/x86_64-macos/mpn/xor_n.s
new file mode 100644
index 0000000..e6ec0c5
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/mpn/xor_n.s
@@ -0,0 +1,158 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+  
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+	.text
+	.align	5, 0x90
+	.globl	___gmpn_xor_n
+	
+	
+___gmpn_xor_n:
+
+	
+	mov	(%rdx), %r8
+	mov	%ecx, %eax
+	and	$3, %eax
+	je	Lb00
+	cmp	$2, %eax
+	jc	Lb01
+	je	Lb10
+
+Lb11:	xor	(%rsi), %r8
+	mov	%r8, (%rdi)
+	inc	%rcx
+	lea	-8(%rsi), %rsi
+	lea	-8(%rdx), %rdx
+	lea	-8(%rdi), %rdi
+	jmp	Le11
+Lb10:	add	$2, %rcx
+	lea	-16(%rsi), %rsi
+	lea	-16(%rdx), %rdx
+	lea	-16(%rdi), %rdi
+	jmp	Le10
+Lb01:	xor	(%rsi), %r8
+	mov	%r8, (%rdi)
+	dec	%rcx
+	jz	Lret
+	lea	8(%rsi), %rsi
+	lea	8(%rdx), %rdx
+	lea	8(%rdi), %rdi
+
+	.align	4, 0x90
+Ltop:	mov	(%rdx), %r8
+Lb00:	mov	8(%rdx), %r9
+	xor	(%rsi), %r8
+	xor	8(%rsi), %r9
+	mov	%r8, (%rdi)
+	mov	%r9, 8(%rdi)
+Le11:	mov	16(%rdx), %r8
+Le10:	mov	24(%rdx), %r9
+	lea	32(%rdx), %rdx
+	xor	16(%rsi), %r8
+	xor	24(%rsi), %r9
+	lea	32(%rsi), %rsi
+	mov	%r8, 16(%rdi)
+	mov	%r9, 24(%rdi)
+	lea	32(%rdi), %rdi
+	sub	$4, %rcx
+	jnz	Ltop
+
+Lret:	
+	ret
+	
+
+
+
+
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/sieve_table.h b/vere/ext/gmp/gen/x86_64-macos/sieve_table.h
new file mode 100644
index 0000000..ee9ac14
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/sieve_table.h
@@ -0,0 +1,46 @@
+/* This file generated by gen-sieve.c - DO NOT EDIT. */
+
+#if GMP_LIMB_BITS != 64
+Error, error, this data is for 64 bits
+#endif
+
+#define PRIMESIEVE_INIT_TABLE \
+	CNST_LIMB (0x3294C9E069128480),	/* 5 - 196 (42 primes) */	\
+	CNST_LIMB (0x95A35E1EC4AB21DC),	/* 197 - 388 (32 primes) */	\
+	CNST_LIMB (0x4AD7CE99B8693366),	/* 389 - 580 (30 primes) */	\
+	CNST_LIMB (0x6595B6DA728DC52B),	/* 581 - 772 (30 primes) */	\
+	CNST_LIMB (0xEA6D9F8787B0CEDE),	/* 773 - 964 (26 primes) */	\
+	CNST_LIMB (0x3F56A1F4CD3275A9),	/* 965 - 1156 (29 primes) */	\
+	CNST_LIMB (0xFD3848FB74A76ADB),	/* 1157 - 1348 (26 primes) */	\
+	CNST_LIMB (0xDBBA0DD1A1EDF6AF),	/* 1349 - 1540 (25 primes) */	\
+	CNST_LIMB (0xCEC7F17ED22799A5),	/* 1541 - 1732 (27 primes) */	\
+	CNST_LIMB (0xEAEC17BDBB717D56),	/* 1733 - 1924 (24 primes) */	\
+	CNST_LIMB (0x3B0EB7B3585AFCF3),	/* 1925 - 2116 (26 primes) */	\
+	CNST_LIMB (0xE563D8F69FDF6C4F),	/* 2117 - 2308 (23 primes) */	\
+	CNST_LIMB (0xFE5BA7ABA45E92FC),	/* 2309 - 2500 (25 primes) */	\
+	CNST_LIMB (0x158DEE6F3BF49B7D),	/* 2501 - 2692 (24 primes) */	\
+	CNST_LIMB (0xBE5A7BC4EDE6CD1A),	/* 2693 - 2884 (26 primes) */	\
+	CNST_LIMB (0xD7679B3FCA7BB6AD),	/* 2885 - 3076 (22 primes) */	\
+	CNST_LIMB (0xC3F66B971FEF37E9),	/* 3077 - 3268 (22 primes) */	\
+	CNST_LIMB (0x6F7EBCF339C953FD),	/* 3269 - 3460 (22 primes) */	\
+	CNST_LIMB (0xD5A5ECDCD235DBF0),	/* 3461 - 3652 (27 primes) */	\
+	CNST_LIMB (0xECFA7B2FD5B65E3B),	/* 3653 - 3844 (22 primes) */	\
+	CNST_LIMB (0xD28EFDF9C89F67B1),	/* 3845 - 4036 (25 primes) */	\
+	CNST_LIMB (0xCB7F7C7A3DD3AF4F),	/* 4037 - 4228 (21 primes) */	\
+	CNST_LIMB (0xEEBED6CDFF6B32CC),	/* 4229 - 4420 (22 primes) */	\
+	CNST_LIMB (0xD5BD73F85ECFA97C),	/* 4421 - 4612 (23 primes) */	\
+	CNST_LIMB (0x21FDBE4FBBAD48F7),	/* 4613 - 4804 (24 primes) */	\
+	CNST_LIMB (0x5E35A3B5EEB7FDE7),	/* 4805 - 4996 (21 primes) */	\
+	CNST_LIMB (0xD9EBFD53A7DBBCC9),	/* 4997 - 5188 (22 primes) */	\
+	CNST_LIMB (0xFF9EDEAF2EFE1F76),	/* 5189 - 5380 (18 primes) */	
+#define PRIMESIEVE_NUMBEROF_TABLE 28
+/* #define PRIMESIEVE_PRIMES_IN_TABLE 706 */
+#define PRIMESIEVE_HIGHEST_PRIME 5351
+/* #define PRIMESIEVE_FIRST_UNCHECKED 5381 */
+
+#define SIEVE_MASK1 CNST_LIMB(0x3204C1A049120485)
+#define SIEVE_MASKT CNST_LIMB(0xA1204892058)
+#define SIEVE_2MSK1 CNST_LIMB(0x29048402110840A)
+#define SIEVE_2MSK2 CNST_LIMB(0x9402180C40230184)
+#define SIEVE_2MSKT CNST_LIMB(0x5021088402120)
+
diff --git a/vere/ext/gmp/gen/x86_64-macos/trialdivtab.h b/vere/ext/gmp/gen/x86_64-macos/trialdivtab.h
new file mode 100644
index 0000000..eb81d7f
--- /dev/null
+++ b/vere/ext/gmp/gen/x86_64-macos/trialdivtab.h
@@ -0,0 +1,1214 @@
+#if GMP_LIMB_BITS != 64
+#error This table is for GMP_LIMB_BITS = 64
+#endif
+
+#if GMP_NAIL_BITS != 0
+#error This table does not support nails
+#endif
+
+#ifdef WANT_dtab
+  P(3,CNST_LIMB(0xaaaaaaaaaaaaaaab),CNST_LIMB(0x5555555555555555)),
+  P(5,CNST_LIMB(0xcccccccccccccccd),CNST_LIMB(0x3333333333333333)),
+  P(7,CNST_LIMB(0x6db6db6db6db6db7),CNST_LIMB(0x2492492492492492)),
+  P(11,CNST_LIMB(0x2e8ba2e8ba2e8ba3),CNST_LIMB(0x1745d1745d1745d1)),
+  P(13,CNST_LIMB(0x4ec4ec4ec4ec4ec5),CNST_LIMB(0x13b13b13b13b13b1)),
+  P(17,CNST_LIMB(0xf0f0f0f0f0f0f0f1),CNST_LIMB(0xf0f0f0f0f0f0f0f)),
+  P(19,CNST_LIMB(0x86bca1af286bca1b),CNST_LIMB(0xd79435e50d79435)),
+  P(23,CNST_LIMB(0xd37a6f4de9bd37a7),CNST_LIMB(0xb21642c8590b216)),
+  P(29,CNST_LIMB(0x34f72c234f72c235),CNST_LIMB(0x8d3dcb08d3dcb08)),
+  P(31,CNST_LIMB(0xef7bdef7bdef7bdf),CNST_LIMB(0x842108421084210)),
+  P(37,CNST_LIMB(0x14c1bacf914c1bad),CNST_LIMB(0x6eb3e45306eb3e4)),
+  P(41,CNST_LIMB(0x8f9c18f9c18f9c19),CNST_LIMB(0x63e7063e7063e70)),
+  P(43,CNST_LIMB(0x82fa0be82fa0be83),CNST_LIMB(0x5f417d05f417d05)),
+  P(47,CNST_LIMB(0x51b3bea3677d46cf),CNST_LIMB(0x572620ae4c415c9)),
+  P(53,CNST_LIMB(0x21cfb2b78c13521d),CNST_LIMB(0x4d4873ecade304d)),
+  P(59,CNST_LIMB(0xcbeea4e1a08ad8f3),CNST_LIMB(0x456c797dd49c341)),
+  P(61,CNST_LIMB(0x4fbcda3ac10c9715),CNST_LIMB(0x4325c53ef368eb0)),
+  P(67,CNST_LIMB(0xf0b7672a07a44c6b),CNST_LIMB(0x3d226357e16ece5)),
+  P(71,CNST_LIMB(0x193d4bb7e327a977),CNST_LIMB(0x39b0ad12073615a)),
+  P(73,CNST_LIMB(0x7e3f1f8fc7e3f1f9),CNST_LIMB(0x381c0e070381c0e)),
+  P(79,CNST_LIMB(0x9b8b577e613716af),CNST_LIMB(0x33d91d2a2067b23)),
+  P(83,CNST_LIMB(0xa3784a062b2e43db),CNST_LIMB(0x3159721ed7e7534)),
+  P(89,CNST_LIMB(0xf47e8fd1fa3f47e9),CNST_LIMB(0x2e05c0b81702e05)),
+  P(97,CNST_LIMB(0xa3a0fd5c5f02a3a1),CNST_LIMB(0x2a3a0fd5c5f02a3)),
+  P(101,CNST_LIMB(0x3a4c0a237c32b16d),CNST_LIMB(0x288df0cac5b3f5d)),
+  P(103,CNST_LIMB(0xdab7ec1dd3431b57),CNST_LIMB(0x27c45979c95204f)),
+  P(107,CNST_LIMB(0x77a04c8f8d28ac43),CNST_LIMB(0x2647c69456217ec)),
+  P(109,CNST_LIMB(0xa6c0964fda6c0965),CNST_LIMB(0x2593f69b02593f6)),
+  P(113,CNST_LIMB(0x90fdbc090fdbc091),CNST_LIMB(0x243f6f0243f6f02)),
+  P(127,CNST_LIMB(0x7efdfbf7efdfbf7f),CNST_LIMB(0x204081020408102)),
+  P(131,CNST_LIMB(0x3e88cb3c9484e2b),CNST_LIMB(0x1f44659e4a42715)),
+  P(137,CNST_LIMB(0xe21a291c077975b9),CNST_LIMB(0x1de5d6e3f8868a4)),
+  P(139,CNST_LIMB(0x3aef6ca970586723),CNST_LIMB(0x1d77b654b82c339)),
+  P(149,CNST_LIMB(0xdf5b0f768ce2cabd),CNST_LIMB(0x1b7d6c3dda338b2)),
+  P(151,CNST_LIMB(0x6fe4dfc9bf937f27),CNST_LIMB(0x1b2036406c80d90)),
+  P(157,CNST_LIMB(0x5b4fe5e92c0685b5),CNST_LIMB(0x1a16d3f97a4b01a)),
+  P(163,CNST_LIMB(0x1f693a1c451ab30b),CNST_LIMB(0x1920fb49d0e228d)),
+  P(167,CNST_LIMB(0x8d07aa27db35a717),CNST_LIMB(0x1886e5f0abb0499)),
+  P(173,CNST_LIMB(0x882383b30d516325),CNST_LIMB(0x17ad2208e0ecc35)),
+  P(179,CNST_LIMB(0xed6866f8d962ae7b),CNST_LIMB(0x16e1f76b4337c6c)),
+  P(181,CNST_LIMB(0x3454dca410f8ed9d),CNST_LIMB(0x16a13cd15372904)),
+  P(191,CNST_LIMB(0x1d7ca632ee936f3f),CNST_LIMB(0x1571ed3c506b39a)),
+  P(193,CNST_LIMB(0x70bf015390948f41),CNST_LIMB(0x15390948f40feac)),
+  P(197,CNST_LIMB(0xc96bdb9d3d137e0d),CNST_LIMB(0x14cab88725af6e7)),
+  P(199,CNST_LIMB(0x2697cc8aef46c0f7),CNST_LIMB(0x149539e3b2d066e)),
+  P(211,CNST_LIMB(0xc0e8f2a76e68575b),CNST_LIMB(0x13698df3de07479)),
+  P(223,CNST_LIMB(0x687763dfdb43bb1f),CNST_LIMB(0x125e22708092f11)),
+  P(227,CNST_LIMB(0x1b10ea929ba144cb),CNST_LIMB(0x120b470c67c0d88)),
+  P(229,CNST_LIMB(0x1d10c4c0478bbced),CNST_LIMB(0x11e2ef3b3fb8744)),
+  P(233,CNST_LIMB(0x63fb9aeb1fdcd759),CNST_LIMB(0x119453808ca29c0)),
+  P(239,CNST_LIMB(0x64afaa4f437b2e0f),CNST_LIMB(0x112358e75d30336)),
+  P(241,CNST_LIMB(0xf010fef010fef011),CNST_LIMB(0x10fef010fef010f)),
+  P(251,CNST_LIMB(0x28cbfbeb9a020a33),CNST_LIMB(0x105197f7d734041)),
+  P(257,CNST_LIMB(0xff00ff00ff00ff01),CNST_LIMB(0xff00ff00ff00ff)),
+  P(263,CNST_LIMB(0xd624fd1470e99cb7),CNST_LIMB(0xf92fb2211855a8)),
+  P(269,CNST_LIMB(0x8fb3ddbd6205b5c5),CNST_LIMB(0xf3a0d52cba8723)),
+  P(271,CNST_LIMB(0xd57da36ca27acdef),CNST_LIMB(0xf1d48bcee0d399)),
+  P(277,CNST_LIMB(0xee70c03b25e4463d),CNST_LIMB(0xec979118f3fc4d)),
+  P(281,CNST_LIMB(0xc5b1a6b80749cb29),CNST_LIMB(0xe939651fe2d8d3)),
+  P(283,CNST_LIMB(0x47768073c9b97113),CNST_LIMB(0xe79372e225fe30)),
+  P(293,CNST_LIMB(0x2591e94884ce32ad),CNST_LIMB(0xdfac1f74346c57)),
+  P(307,CNST_LIMB(0xf02806abc74be1fb),CNST_LIMB(0xd578e97c3f5fe5)),
+  P(311,CNST_LIMB(0x7ec3e8f3a7198487),CNST_LIMB(0xd2ba083b445250)),
+  P(313,CNST_LIMB(0x58550f8a39409d09),CNST_LIMB(0xd161543e28e502)),
+  P(317,CNST_LIMB(0xec9e48ae6f71de15),CNST_LIMB(0xcebcf8bb5b4169)),
+  P(331,CNST_LIMB(0x2ff3a018bfce8063),CNST_LIMB(0xc5fe740317f9d0)),
+  P(337,CNST_LIMB(0x7f9ec3fcf61fe7b1),CNST_LIMB(0xc2780613c0309e)),
+  P(347,CNST_LIMB(0x89f5abe570e046d3),CNST_LIMB(0xbcdd535db1cc5b)),
+  P(349,CNST_LIMB(0xda971b23f1545af5),CNST_LIMB(0xbbc8408cd63069)),
+  P(353,CNST_LIMB(0x79d5f00b9a7862a1),CNST_LIMB(0xb9a7862a0ff465)),
+  P(359,CNST_LIMB(0x4dba1df32a128a57),CNST_LIMB(0xb68d31340e4307)),
+  P(367,CNST_LIMB(0x87530217b7747d8f),CNST_LIMB(0xb2927c29da5519)),
+  P(373,CNST_LIMB(0x30baae53bb5e06dd),CNST_LIMB(0xafb321a1496fdf)),
+  P(379,CNST_LIMB(0xee70206c12e9b5b3),CNST_LIMB(0xaceb0f891e6551)),
+  P(383,CNST_LIMB(0xcdde9462ec9dbe7f),CNST_LIMB(0xab1cbdd3e2970f)),
+  P(389,CNST_LIMB(0xafb64b05ec41cf4d),CNST_LIMB(0xa87917088e262b)),
+  P(397,CNST_LIMB(0x2944ff5aec02945),CNST_LIMB(0xa513fd6bb00a51)),
+  P(401,CNST_LIMB(0x2cb033128382df71),CNST_LIMB(0xa36e71a2cb0331)),
+  P(409,CNST_LIMB(0x1ccacc0c84b1c2a9),CNST_LIMB(0xa03c1688732b30)),
+  P(419,CNST_LIMB(0x19a93db575eb3a0b),CNST_LIMB(0x9c69169b30446d)),
+  P(421,CNST_LIMB(0xcebeef94fa86fe2d),CNST_LIMB(0x9baade8e4a2f6e)),
+  P(431,CNST_LIMB(0x6faa77fb3f8df54f),CNST_LIMB(0x980e4156201301)),
+  P(433,CNST_LIMB(0x68a58af00975a751),CNST_LIMB(0x975a750ff68a58)),
+  P(439,CNST_LIMB(0xd56e36d0c3efac07),CNST_LIMB(0x9548e4979e0829)),
+  P(443,CNST_LIMB(0xd8b44c47a8299b73),CNST_LIMB(0x93efd1c50e726b)),
+  P(449,CNST_LIMB(0x2d9ccaf9ba70e41),CNST_LIMB(0x91f5bcb8bb02d9)),
+  P(457,CNST_LIMB(0x985e1c023d9e879),CNST_LIMB(0x8f67a1e3fdc261)),
+  P(461,CNST_LIMB(0x2a343316c494d305),CNST_LIMB(0x8e2917e0e702c6)),
+  P(463,CNST_LIMB(0x70cb7916ab67652f),CNST_LIMB(0x8d8be33f95d715)),
+  P(467,CNST_LIMB(0xd398f132fb10fe5b),CNST_LIMB(0x8c55841c815ed5)),
+  P(479,CNST_LIMB(0x6f2a38a6bf54fa1f),CNST_LIMB(0x88d180cd3a4133)),
+  P(487,CNST_LIMB(0x211df689b98f81d7),CNST_LIMB(0x869222b1acf1ce)),
+  P(491,CNST_LIMB(0xe994983e90f1ec3),CNST_LIMB(0x85797b917765ab)),
+  P(499,CNST_LIMB(0xad671e44bed87f3b),CNST_LIMB(0x8355ace3c897db)),
+  P(503,CNST_LIMB(0xf9623a0516e70fc7),CNST_LIMB(0x824a4e60b3262b)),
+  P(509,CNST_LIMB(0x4b7129be9dece355),CNST_LIMB(0x80c121b28bd1ba)),
+  P(521,CNST_LIMB(0x190f3b7473f62c39),CNST_LIMB(0x7dc9f3397d4c29)),
+  P(523,CNST_LIMB(0x63dacc9aad46f9a3),CNST_LIMB(0x7d4ece8fe88139)),
+  P(541,CNST_LIMB(0xc1108fda24e8d035),CNST_LIMB(0x79237d65bcce50)),
+  P(547,CNST_LIMB(0xb77578472319bd8b),CNST_LIMB(0x77cf53c5f7936c)),
+  P(557,CNST_LIMB(0x473d20a1c7ed9da5),CNST_LIMB(0x75a8accfbdd11e)),
+  P(563,CNST_LIMB(0xfbe85af0fea2c8fb),CNST_LIMB(0x7467ac557c228e)),
+  P(569,CNST_LIMB(0x58a1f7e6ce0f4c09),CNST_LIMB(0x732d70ed8db8e9)),
+  P(571,CNST_LIMB(0x1a00e58c544986f3),CNST_LIMB(0x72c62a24c3797f)),
+  P(577,CNST_LIMB(0x7194a17f55a10dc1),CNST_LIMB(0x7194a17f55a10d)),
+  P(587,CNST_LIMB(0x7084944785e33763),CNST_LIMB(0x6fa549b41da7e7)),
+  P(593,CNST_LIMB(0xba10679bd84886b1),CNST_LIMB(0x6e8419e6f61221)),
+  P(599,CNST_LIMB(0xebe9c6bb31260967),CNST_LIMB(0x6d68b5356c207b)),
+  P(601,CNST_LIMB(0x97a3fe4bd1ff25e9),CNST_LIMB(0x6d0b803685c01b)),
+  P(607,CNST_LIMB(0x6c6388395b84d99f),CNST_LIMB(0x6bf790a8b2d207)),
+  P(613,CNST_LIMB(0x8c51da6a1335df6d),CNST_LIMB(0x6ae907ef4b96c2)),
+  P(617,CNST_LIMB(0x46f3234475d5add9),CNST_LIMB(0x6a37991a23aead)),
+  P(619,CNST_LIMB(0x905605ca3c619a43),CNST_LIMB(0x69dfbdd4295b66)),
+  P(631,CNST_LIMB(0xcee8dff304767747),CNST_LIMB(0x67dc4c45c8033e)),
+  P(641,CNST_LIMB(0xff99c27f00663d81),CNST_LIMB(0x663d80ff99c27f)),
+  P(643,CNST_LIMB(0xacca407f671ddc2b),CNST_LIMB(0x65ec17e3559948)),
+  P(647,CNST_LIMB(0xe71298bac1e12337),CNST_LIMB(0x654ac835cfba5c)),
+  P(653,CNST_LIMB(0xfa1e94309cd09045),CNST_LIMB(0x645c854ae10772)),
+  P(659,CNST_LIMB(0xbebccb8e91496b9b),CNST_LIMB(0x6372990e5f901f)),
+  P(661,CNST_LIMB(0x312fa30cc7d7b8bd),CNST_LIMB(0x6325913c07beef)),
+  P(673,CNST_LIMB(0x6160ff9e9f006161),CNST_LIMB(0x6160ff9e9f0061)),
+  P(677,CNST_LIMB(0x6b03673b5e28152d),CNST_LIMB(0x60cdb520e5e88e)),
+  P(683,CNST_LIMB(0xfe802ffa00bfe803),CNST_LIMB(0x5ff4017fd005ff)),
+  P(691,CNST_LIMB(0xe66fe25c9e907c7b),CNST_LIMB(0x5ed79e31a4dccd)),
+  P(701,CNST_LIMB(0x3f8b236c76528895),CNST_LIMB(0x5d7d42d48ac5ef)),
+  P(709,CNST_LIMB(0xf6f923bf01ce2c0d),CNST_LIMB(0x5c6f35ccba5028)),
+  P(719,CNST_LIMB(0x6c3d3d98bed7c42f),CNST_LIMB(0x5b2618ec6ad0a5)),
+  P(727,CNST_LIMB(0x30981efcd4b010e7),CNST_LIMB(0x5a2553748e42e7)),
+  P(733,CNST_LIMB(0x6f691fc81ebbe575),CNST_LIMB(0x59686cf744cd5b)),
+  P(739,CNST_LIMB(0xb10480ddb47b52cb),CNST_LIMB(0x58ae97bab79976)),
+  P(743,CNST_LIMB(0x74cd59ed64f3f0d7),CNST_LIMB(0x58345f1876865f)),
+  P(751,CNST_LIMB(0x105cb81316d6c0f),CNST_LIMB(0x5743d5bb24795a)),
+  P(757,CNST_LIMB(0x9be64c6d91c1195d),CNST_LIMB(0x5692c4d1ab74ab)),
+  P(761,CNST_LIMB(0x71b3f945a27b1f49),CNST_LIMB(0x561e46a4d5f337)),
+  P(769,CNST_LIMB(0x77d80d50e508fd01),CNST_LIMB(0x5538ed06533997)),
+  P(773,CNST_LIMB(0xa5eb778e133551cd),CNST_LIMB(0x54c807f2c0bec2)),
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+  P(1979,CNST_LIMB(0xa3824386673a573),CNST_LIMB(0x211d9f7fad35f1)),
+  P(1987,CNST_LIMB(0xa4a77d19e575a0eb),CNST_LIMB(0x20fb7d9dd36c18)),
+  P(1993,CNST_LIMB(0xa2bee045e066c279),CNST_LIMB(0x20e2123d661e0e)),
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+  P(2003,CNST_LIMB(0xe279edd9e9c2e85b),CNST_LIMB(0x20b80b3f43ddbf)),
+  P(2011,CNST_LIMB(0xd0c591c221dc9c53),CNST_LIMB(0x2096b9180f46a6)),
+  P(2017,CNST_LIMB(0x6da8ee9c9ee7c21),CNST_LIMB(0x207de7e28de5da)),
+  P(2027,CNST_LIMB(0x9dfebcaf4c27e8c3),CNST_LIMB(0x2054dec8cf1fb3)),
+  P(2029,CNST_LIMB(0x49aeff9f19dd6de5),CNST_LIMB(0x204cb630b3aab5)),
+  P(2039,CNST_LIMB(0x86976a57a296e9c7),CNST_LIMB(0x202428adc37beb)),
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+  P(2083,CNST_LIMB(0xb935b507fd0ce78b),CNST_LIMB(0x1f765a3556a4ee)),
+  P(2087,CNST_LIMB(0xb450f5540660e797),CNST_LIMB(0x1f66ea49d802f1)),
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+  P(2099,CNST_LIMB(0x8992f718c22a32fb),CNST_LIMB(0x1f38f4e6c0f1f9)),
+  P(2111,CNST_LIMB(0x5f3253ad0d37e7bf),CNST_LIMB(0x1f0b8546752578)),
+  P(2113,CNST_LIMB(0x7c0ffe0fc007c1),CNST_LIMB(0x1f03ff83f001f0)),
+  P(2129,CNST_LIMB(0x4d8ebadc0c0640b1),CNST_LIMB(0x1ec853b0a3883c)),
+  P(2131,CNST_LIMB(0xe2729af831037bdb),CNST_LIMB(0x1ec0ee573723eb)),
+  P(2137,CNST_LIMB(0xb8f64bf30feebfe9),CNST_LIMB(0x1eaad38e6f6894)),
+  P(2141,CNST_LIMB(0xda93124b544c0bf5),CNST_LIMB(0x1e9c28a765fe53)),
+  P(2143,CNST_LIMB(0x9cf7ff0b593c539f),CNST_LIMB(0x1e94d8758c2003)),
+  P(2153,CNST_LIMB(0xd6bd8861fa0e07d9),CNST_LIMB(0x1e707ba8f65e68)),
+  P(2161,CNST_LIMB(0x5cfe75c0bd8ab891),CNST_LIMB(0x1e53a2a68f574e)),
+  P(2179,CNST_LIMB(0x43e808757c2e862b),CNST_LIMB(0x1e1380a56b438d)),
+  P(2203,CNST_LIMB(0x90caa96d595c9d93),CNST_LIMB(0x1dbf9f513a3802)),
+  P(2207,CNST_LIMB(0x8fd550625d07135f),CNST_LIMB(0x1db1d1d58bc600)),
+  P(2213,CNST_LIMB(0x76b010a86e209f2d),CNST_LIMB(0x1d9d358f53de38)),
+  P(2221,CNST_LIMB(0xecc0426447769b25),CNST_LIMB(0x1d81e6df6165c7)),
+  P(2237,CNST_LIMB(0xe381339caabe3295),CNST_LIMB(0x1d4bdf7fd40e30)),
+  P(2239,CNST_LIMB(0xd1b190a2d0c7673f),CNST_LIMB(0x1d452c7a1c958d)),
+  P(2243,CNST_LIMB(0xc3bce3cf26b0e7eb),CNST_LIMB(0x1d37cf9b902659)),
+  P(2251,CNST_LIMB(0x5f87e76f56c61ce3),CNST_LIMB(0x1d1d3a5791e97b)),
+  P(2267,CNST_LIMB(0xc06c6857a124b353),CNST_LIMB(0x1ce89fe6b47416)),
+  P(2269,CNST_LIMB(0x38c040fcba630f75),CNST_LIMB(0x1ce219f3235071)),
+  P(2273,CNST_LIMB(0xd078bc4fbd533b21),CNST_LIMB(0x1cd516dcf92139)),
+  P(2281,CNST_LIMB(0xde8e15c5dd354f59),CNST_LIMB(0x1cbb33bd1c2b8b)),
+  P(2287,CNST_LIMB(0xca61d53d7414260f),CNST_LIMB(0x1ca7e7d2546688)),
+  P(2293,CNST_LIMB(0xb56bf5ba8eae635d),CNST_LIMB(0x1c94b5c1b3dbd3)),
+  P(2297,CNST_LIMB(0x44a72cb0fb6e3949),CNST_LIMB(0x1c87f7f9c241c1)),
+  P(2309,CNST_LIMB(0x879839a714f45bcd),CNST_LIMB(0x1c6202706c35a9)),
+  P(2311,CNST_LIMB(0x2a8994fde5314b7),CNST_LIMB(0x1c5bb8a9437632)),
+  P(2333,CNST_LIMB(0xb971920cf2b90135),CNST_LIMB(0x1c174343b4111e)),
+  P(2339,CNST_LIMB(0x8a8fd0b7df9a6e8b),CNST_LIMB(0x1c04d0d3e46b42)),
+  P(2341,CNST_LIMB(0xb31f9a84c1c6eaad),CNST_LIMB(0x1bfeb00fbf4308)),
+  P(2347,CNST_LIMB(0x92293b02823c6d83),CNST_LIMB(0x1bec5dce0b202d)),
+  P(2351,CNST_LIMB(0xeee77ff20fe5ddcf),CNST_LIMB(0x1be03444620037)),
+  P(2357,CNST_LIMB(0xe1ea0f6c496c11d),CNST_LIMB(0x1bce09c66f6fc3)),
+  P(2371,CNST_LIMB(0xfdf2d3d6f88ccb6b),CNST_LIMB(0x1ba40228d02b30)),
+  P(2377,CNST_LIMB(0xfa9d74a3457738f9),CNST_LIMB(0x1b9225b1cf8919)),
+  P(2381,CNST_LIMB(0xefc3ca3db71a5785),CNST_LIMB(0x1b864a2ff3f53f)),
+  P(2383,CNST_LIMB(0x8e2071718d0d6daf),CNST_LIMB(0x1b80604150e49b)),
+  P(2389,CNST_LIMB(0xbc0fdbfeb6cfabfd),CNST_LIMB(0x1b6eb1aaeaacf3)),
+  P(2393,CNST_LIMB(0x1eeab613e5e5aee9),CNST_LIMB(0x1b62f48da3c8cc)),
+  P(2399,CNST_LIMB(0x2d2388e90e9e929f),CNST_LIMB(0x1b516babe96092)),
+  P(2411,CNST_LIMB(0x81dbafba588ddb43),CNST_LIMB(0x1b2e9cef1e0c87)),
+  P(2417,CNST_LIMB(0x52eebc51c4799791),CNST_LIMB(0x1b1d56bedc849b)),
+  P(2423,CNST_LIMB(0x1c6bc4693b45a047),CNST_LIMB(0x1b0c267546aec0)),
+  P(2437,CNST_LIMB(0x6eee0974498874d),CNST_LIMB(0x1ae45f62024fa0)),
+  P(2441,CNST_LIMB(0xd85b7377a9953cb9),CNST_LIMB(0x1ad917631b5f54)),
+  P(2447,CNST_LIMB(0x4b6df412d4caf56f),CNST_LIMB(0x1ac83d18cb608f)),
+  P(2459,CNST_LIMB(0x6b8afbbb4a053493),CNST_LIMB(0x1aa6c7ad8c063f)),
+  P(2467,CNST_LIMB(0xcc5299c96ac7720b),CNST_LIMB(0x1a90a7b1228e2a)),
+  P(2473,CNST_LIMB(0xadce84b5c710aa99),CNST_LIMB(0x1a8027c03ba059)),
+  P(2477,CNST_LIMB(0x9d673f5aa3804225),CNST_LIMB(0x1a7533289deb89)),
+  P(2503,CNST_LIMB(0xe6541268efbce7f7),CNST_LIMB(0x1a2ed7ce16b49f)),
+  P(2521,CNST_LIMB(0xfcf41e76cf5be669),CNST_LIMB(0x19fefc0a279a73)),
+  P(2531,CNST_LIMB(0x5c3eb5dc31c383cb),CNST_LIMB(0x19e4b0cd873b5f)),
+  P(2539,CNST_LIMB(0x301832d11d8ad6c3),CNST_LIMB(0x19cfcdfd60e514)),
+  P(2543,CNST_LIMB(0x2e9c0942f1ce450f),CNST_LIMB(0x19c56932d66c85)),
+  P(2549,CNST_LIMB(0x97f3f2be37a39a5d),CNST_LIMB(0x19b5e1ab6fc7c2)),
+  P(2551,CNST_LIMB(0xe8b7d8a9654187c7),CNST_LIMB(0x19b0b8a62f2a73)),
+  P(2557,CNST_LIMB(0xb5d024d7da5b1b55),CNST_LIMB(0x19a149fc98942c)),
+  P(2579,CNST_LIMB(0xb8ba9d6e7ae3501b),CNST_LIMB(0x1969517ec25b85)),
+  P(2591,CNST_LIMB(0xf50865f71b90f1df),CNST_LIMB(0x194b3083360ba8)),
+  P(2593,CNST_LIMB(0x739c1682847df9e1),CNST_LIMB(0x194631f4bebdc1)),
+  P(2609,CNST_LIMB(0xc470a4d842b90ed1),CNST_LIMB(0x191e84127268fd)),
+  P(2617,CNST_LIMB(0x1fb1be11698cc409),CNST_LIMB(0x190adbb543984f)),
+  P(2621,CNST_LIMB(0xd8d5512a7cd35d15),CNST_LIMB(0x1901130bd18200)),
+  P(2633,CNST_LIMB(0xa5496821723e07f9),CNST_LIMB(0x18e3e6b889ac94)),
+  P(2647,CNST_LIMB(0xbcc8c6d7abaa8167),CNST_LIMB(0x18c233420e1ec1)),
+  P(2657,CNST_LIMB(0x52c396c95eb619a1),CNST_LIMB(0x18aa5872d92bd6)),
+  P(2659,CNST_LIMB(0x6eb7e380878ec74b),CNST_LIMB(0x18a5989945ccf9)),
+  P(2663,CNST_LIMB(0x3d5513b504537157),CNST_LIMB(0x189c1e60b57f60)),
+  P(2671,CNST_LIMB(0x314391f8862e948f),CNST_LIMB(0x18893fbc8690b9)),
+  P(2677,CNST_LIMB(0xdc0b17cfcd81f5dd),CNST_LIMB(0x187b2bb3e1041c)),
+  P(2683,CNST_LIMB(0x2f6bea3ec89044b3),CNST_LIMB(0x186d27c9cdcfb8)),
+  P(2687,CNST_LIMB(0xce13a05869f1b57f),CNST_LIMB(0x1863d8bf4f2c1c)),
+  P(2689,CNST_LIMB(0x7593474e8ace3581),CNST_LIMB(0x185f33e2ad7593)),
+  P(2693,CNST_LIMB(0x7fc329295a05e4d),CNST_LIMB(0x1855ef75973e13)),
+  P(2699,CNST_LIMB(0xb05377cba4908d23),CNST_LIMB(0x1848160153f134)),
+  P(2707,CNST_LIMB(0xe7b2131a628aa39b),CNST_LIMB(0x1835b72e6f0656)),
+  P(2711,CNST_LIMB(0x9031dbed7de01527),CNST_LIMB(0x182c922d83eb39)),
+  P(2713,CNST_LIMB(0x76844b1c670aa9a9),CNST_LIMB(0x18280243c0365a)),
+  P(2719,CNST_LIMB(0x6a03f4533b08915f),CNST_LIMB(0x181a5cd5898e73)),
+  P(2729,CNST_LIMB(0x1dbca579db0a3999),CNST_LIMB(0x1803c0961773aa)),
+  P(2731,CNST_LIMB(0x2ffe800bffa003),CNST_LIMB(0x17ff4005ffd001)),
+  P(2741,CNST_LIMB(0x478ab1a3e936139d),CNST_LIMB(0x17e8d670433edb)),
+  P(2749,CNST_LIMB(0x66e722bc4c5cc095),CNST_LIMB(0x17d7066cf4bb5d)),
+  P(2753,CNST_LIMB(0x7a8f63c717278541),CNST_LIMB(0x17ce285b806b1f)),
+  P(2767,CNST_LIMB(0xdf6eee24d292bc2f),CNST_LIMB(0x17af52cdf27e02)),
+  P(2777,CNST_LIMB(0x9fc20d17237dd569),CNST_LIMB(0x17997d47d01039)),
+  P(2789,CNST_LIMB(0xcdf9932356bda2ed),CNST_LIMB(0x177f7ec2c6d0ba)),
+  P(2791,CNST_LIMB(0x97b5e332e80f68d7),CNST_LIMB(0x177b2f3cd00756)),
+  P(2797,CNST_LIMB(0x46eee26fd875e2e5),CNST_LIMB(0x176e4a22f692a0)),
+  P(2801,CNST_LIMB(0x3548a8e65157a611),CNST_LIMB(0x1765b94271e11b)),
+  P(2803,CNST_LIMB(0xc288d03be9b71e3b),CNST_LIMB(0x1761732b044ae4)),
+  P(2819,CNST_LIMB(0x8151186db38937ab),CNST_LIMB(0x173f7a5300a2bc)),
+  P(2833,CNST_LIMB(0x7800b910895a45f1),CNST_LIMB(0x1722112b48be1f)),
+  P(2837,CNST_LIMB(0xaee0b024182eec3d),CNST_LIMB(0x1719b7a16eb843)),
+  P(2843,CNST_LIMB(0x96323eda173b5713),CNST_LIMB(0x170d3c99cc5052)),
+  P(2851,CNST_LIMB(0xed0dbd03ae77c8b),CNST_LIMB(0x16fcad7aed3bb6)),
+  P(2857,CNST_LIMB(0xf73800b7828dc119),CNST_LIMB(0x16f051b8231ffd)),
+  P(2861,CNST_LIMB(0x1b61715ec22b7ca5),CNST_LIMB(0x16e81beae20643)),
+  P(2879,CNST_LIMB(0xa8533a991ead64bf),CNST_LIMB(0x16c3721584c1d8)),
+  P(2887,CNST_LIMB(0x7f6c7290e46c2e77),CNST_LIMB(0x16b34c2ba09663)),
+  P(2897,CNST_LIMB(0x6325e8d907b01db1),CNST_LIMB(0x169f3ce292ddcd)),
+  P(2903,CNST_LIMB(0x28909f70152a1067),CNST_LIMB(0x169344b2220a0d)),
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+  P(2917,CNST_LIMB(0x7e605cad10c32e6d),CNST_LIMB(0x167787f1418ec9)),
+  P(2927,CNST_LIMB(0x471b33570635b38f),CNST_LIMB(0x1663e190395ff2)),
+  P(2939,CNST_LIMB(0xab559fa997a61bb3),CNST_LIMB(0x164c7a4b6eb5b3)),
+  P(2953,CNST_LIMB(0xad4bdae562bddab9),CNST_LIMB(0x16316a061182fd)),
+  P(2957,CNST_LIMB(0x55e1b2f2ed62f45),CNST_LIMB(0x1629ba914584e4)),
+  P(2963,CNST_LIMB(0x3cd328b1a2dca9b),CNST_LIMB(0x161e3d57de21b2)),
+  P(2969,CNST_LIMB(0xd28f4e08733218a9),CNST_LIMB(0x1612cc01b977f0)),
+  P(2971,CNST_LIMB(0xb6800b077f186293),CNST_LIMB(0x160efe30c525ff)),
+  P(2999,CNST_LIMB(0x6fbd138c3fd9c207),CNST_LIMB(0x15da45249ec5de)),
+  P(3001,CNST_LIMB(0xb117ccd12ae88a89),CNST_LIMB(0x15d68ab4acff92)),
+  P(3011,CNST_LIMB(0x2f1a1a044046bceb),CNST_LIMB(0x15c3f989d1eb15)),
+  P(3019,CNST_LIMB(0x548aba0b060541e3),CNST_LIMB(0x15b535ad11b8f0)),
+  P(3023,CNST_LIMB(0xcf4e808cea111b2f),CNST_LIMB(0x15addb3f424ec1)),
+  P(3037,CNST_LIMB(0xdbec1b4fa855a475),CNST_LIMB(0x159445cb91be6b)),
+  P(3041,CNST_LIMB(0xe3f794eb600d7821),CNST_LIMB(0x158d0199771e63)),
+  P(3049,CNST_LIMB(0x34fae0d9a11f7c59),CNST_LIMB(0x157e87d9b69e04)),
+  P(3061,CNST_LIMB(0xf006b0ccbbac085d),CNST_LIMB(0x1568f58bc01ac3)),
+  P(3067,CNST_LIMB(0x3f45076dc3114733),CNST_LIMB(0x155e3c993fda9b)),
+  P(3079,CNST_LIMB(0xeef49bfa58a1a1b7),CNST_LIMB(0x1548eacc5e1e6e)),
+  P(3083,CNST_LIMB(0x12c4218bea691fa3),CNST_LIMB(0x1541d8f91ba6a7)),
+  P(3089,CNST_LIMB(0xbc7504e3bd5e64f1),CNST_LIMB(0x153747060cc340)),
+  P(3109,CNST_LIMB(0x4ee21c292bb92fad),CNST_LIMB(0x1514569f93f7c4)),
+  P(3119,CNST_LIMB(0x34338b7327a4bacf),CNST_LIMB(0x150309705d3d79)),
+  P(3121,CNST_LIMB(0x3fe5c0833d6fccd1),CNST_LIMB(0x14ff97020cf5bf)),
+  P(3137,CNST_LIMB(0xb1e70743535203c1),CNST_LIMB(0x14e42c114cf47e)),
+  P(3163,CNST_LIMB(0xefbb5dcdfb4e43d3),CNST_LIMB(0x14b835bdcb6447)),
+  P(3167,CNST_LIMB(0xca68467ca5394f9f),CNST_LIMB(0x14b182b53a9ab7)),
+  P(3169,CNST_LIMB(0x8c51c081408b97a1),CNST_LIMB(0x14ae2ad094a3d3)),
+  P(3181,CNST_LIMB(0x3275a899dfa5dd65),CNST_LIMB(0x149a320ea59f96)),
+  P(3187,CNST_LIMB(0x9e674cb62e1b78bb),CNST_LIMB(0x1490441de1a2fb)),
+  P(3191,CNST_LIMB(0xa37ff5bb2a998d47),CNST_LIMB(0x1489aacce57200)),
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+  P(3209,CNST_LIMB(0x1b48841bc30d29b9),CNST_LIMB(0x146c2cfe53204f)),
+  P(3217,CNST_LIMB(0xf06721d2011d3471),CNST_LIMB(0x145f2ca490d4a1)),
+  P(3221,CNST_LIMB(0x93fd2386dff85ebd),CNST_LIMB(0x1458b2aae0ec87)),
+  P(3229,CNST_LIMB(0x4ce72f54c07ed9b5),CNST_LIMB(0x144bcb0a3a3150)),
+  P(3251,CNST_LIMB(0xd6d0fd3e71dd827b),CNST_LIMB(0x1428a1e65441d4)),
+  P(3253,CNST_LIMB(0x856405fb1eed819d),CNST_LIMB(0x142575a6c210d7)),
+  P(3257,CNST_LIMB(0x8ea8aceb7c443989),CNST_LIMB(0x141f2025ba5c46)),
+  P(3259,CNST_LIMB(0x34a13026f62e5873),CNST_LIMB(0x141bf6e35420fd)),
+  P(3271,CNST_LIMB(0x1eea0208ec0af4f7),CNST_LIMB(0x1409141d1d313a)),
+  P(3299,CNST_LIMB(0x63679853cea598cb),CNST_LIMB(0x13dd8bc19c3513)),
+  P(3301,CNST_LIMB(0xc30b3ebd61f2d0ed),CNST_LIMB(0x13da76f714dc8f)),
+  P(3307,CNST_LIMB(0x7eb9037bc7f43bc3),CNST_LIMB(0x13d13e50f8f49e)),
+  P(3313,CNST_LIMB(0xa583e6f6ce016411),CNST_LIMB(0x13c80e37ca3819)),
+  P(3319,CNST_LIMB(0xf1938d895f1a74c7),CNST_LIMB(0x13bee69fa99ccf)),
+  P(3323,CNST_LIMB(0x80cf1491c1e81e33),CNST_LIMB(0x13b8d0ede55835)),
+  P(3329,CNST_LIMB(0x3c0f12886ba8f301),CNST_LIMB(0x13afb7680bb054)),
+  P(3331,CNST_LIMB(0xe4b786e0dfcc5ab),CNST_LIMB(0x13acb0c3841c96)),
+  P(3343,CNST_LIMB(0x672684c93f2d41ef),CNST_LIMB(0x139a9c5f434fde)),
+  P(3347,CNST_LIMB(0xe00757badb35c51b),CNST_LIMB(0x13949cf33a0d9d)),
+  P(3359,CNST_LIMB(0xd6d84afe66472edf),CNST_LIMB(0x1382b4a00c31b0)),
+  P(3361,CNST_LIMB(0xfbbc0eedcbbfb6e1),CNST_LIMB(0x137fbbc0eedcbb)),
+  P(3371,CNST_LIMB(0x250f43aa08a84983),CNST_LIMB(0x1370ecf047b069)),
+  P(3373,CNST_LIMB(0x4400e927b1acaa5),CNST_LIMB(0x136df9790e3155)),
+  P(3389,CNST_LIMB(0x56572be34b9d3215),CNST_LIMB(0x13567dd8defd5b)),
+  P(3391,CNST_LIMB(0x87964ef7781c62bf),CNST_LIMB(0x13539261fdbc34)),
+  P(3407,CNST_LIMB(0x29ed84051c06e9af),CNST_LIMB(0x133c564292d28a)),
+  P(3413,CNST_LIMB(0xb00acd11ed3f87fd),CNST_LIMB(0x1333ae178d6388)),
+  P(3433,CNST_LIMB(0x6307881744152d9),CNST_LIMB(0x13170ad00d1fd7)),
+  P(3449,CNST_LIMB(0x7a786459f5c1ccc9),CNST_LIMB(0x13005f01db0947)),
+  P(3457,CNST_LIMB(0x1308125d74563281),CNST_LIMB(0x12f51d40342210)),
+  P(3461,CNST_LIMB(0x395310a480b3e34d),CNST_LIMB(0x12ef815e4ed950)),
+  P(3463,CNST_LIMB(0x35985baa8b202837),CNST_LIMB(0x12ecb4abccd827)),
+  P(3467,CNST_LIMB(0x96304a6e052b3223),CNST_LIMB(0x12e71dc1d3d820)),
+  P(3469,CNST_LIMB(0xbd8265fc9af8fd45),CNST_LIMB(0x12e45389a16495)),
+  P(3491,CNST_LIMB(0x1b6d0b383ec58e0b),CNST_LIMB(0x12c5d9226476cc)),
+  P(3499,CNST_LIMB(0xc21a7c3b68b28503),CNST_LIMB(0x12badc391156fd)),
+  P(3511,CNST_LIMB(0x236fa180fbfd6007),CNST_LIMB(0x12aa78e412f522)),
+  P(3517,CNST_LIMB(0xc42accd440ed9595),CNST_LIMB(0x12a251f5f47fd1)),
+  P(3527,CNST_LIMB(0x7acf7128236ba3f7),CNST_LIMB(0x1294cb85c53534)),
+  P(3529,CNST_LIMB(0xf909367a987b9c79),CNST_LIMB(0x12921963beb65e)),
+  P(3533,CNST_LIMB(0xb64efb252bfba705),CNST_LIMB(0x128cb777c69ca8)),
+  P(3539,CNST_LIMB(0x980d4f5a7e4cd25b),CNST_LIMB(0x1284aa6cf07294)),
+  P(3541,CNST_LIMB(0xe1ecc4ef27b0c37d),CNST_LIMB(0x1281fcf6ac7f87)),
+  P(3547,CNST_LIMB(0x9111aebb81d72653),CNST_LIMB(0x1279f937367db9)),
+  P(3557,CNST_LIMB(0x8951f985cb2c67ed),CNST_LIMB(0x126cad0488be94)),
+  P(3559,CNST_LIMB(0xc439d4fc54e0b5d7),CNST_LIMB(0x126a06794646a2)),
+  P(3571,CNST_LIMB(0xe857bf31896d533b),CNST_LIMB(0x125a2f2bcd3e95)),
+  P(3581,CNST_LIMB(0xb614bb4cb5023755),CNST_LIMB(0x124d108389e6b1)),
+  P(3583,CNST_LIMB(0x938a89e5473bf1ff),CNST_LIMB(0x124a73083771ac)),
+  P(3593,CNST_LIMB(0xeac481aca34de039),CNST_LIMB(0x123d6acda0620a)),
+  P(3607,CNST_LIMB(0x14b961badf4809a7),CNST_LIMB(0x122b4b2917eafd)),
+  P(3613,CNST_LIMB(0x76784fecba352435),CNST_LIMB(0x122391bfce1e2f)),
+  P(3617,CNST_LIMB(0xefa689bb58aef5e1),CNST_LIMB(0x121e6f1ea579f2)),
+  P(3623,CNST_LIMB(0xb2b2c4db9c3a8197),CNST_LIMB(0x1216c09e471568)),
+  P(3631,CNST_LIMB(0x2503bc992279f8cf),CNST_LIMB(0x120c8cb9d93909)),
+  P(3637,CNST_LIMB(0xd2ab9aec5ca1541d),CNST_LIMB(0x1204ed58e64ef9)),
+  P(3643,CNST_LIMB(0x3e78ba1460f99af3),CNST_LIMB(0x11fd546578f00c)),
+  P(3659,CNST_LIMB(0xa01426572cfcb63),CNST_LIMB(0x11e9310b8b4c9c)),
+  P(3671,CNST_LIMB(0xbea857968f3cbd67),CNST_LIMB(0x11da3405db9911)),
+  P(3673,CNST_LIMB(0x78db213eefe659e9),CNST_LIMB(0x11d7b6f4eb055d)),
+  P(3677,CNST_LIMB(0x963e8541a74d35f5),CNST_LIMB(0x11d2bee748c145)),
+  P(3691,CNST_LIMB(0x9e22d152776f2e43),CNST_LIMB(0x11c1706ddce7a7)),
+  P(3697,CNST_LIMB(0x5d10d39d1e1f291),CNST_LIMB(0x11ba0fed2a4f14)),
+  P(3701,CNST_LIMB(0x374468dccaced1dd),CNST_LIMB(0x11b528538ed64a)),
+  P(3709,CNST_LIMB(0x8d145c7d110c5ad5),CNST_LIMB(0x11ab61404242ac)),
+  P(3719,CNST_LIMB(0x3251a39f5acb5737),CNST_LIMB(0x119f378ce81d2f)),
+  P(3727,CNST_LIMB(0xa66e50171443506f),CNST_LIMB(0x1195889ece79da)),
+  P(3733,CNST_LIMB(0x124f69ad91dd4cbd),CNST_LIMB(0x118e4c65387077)),
+  P(3739,CNST_LIMB(0xec24f8f2a61a2793),CNST_LIMB(0x1187161d70e725)),
+  P(3761,CNST_LIMB(0xb472148e656b7a51),CNST_LIMB(0x116cd6d1c85239)),
+  P(3767,CNST_LIMB(0xadf9570e1142f07),CNST_LIMB(0x1165bbe7ce86b1)),
+  P(3769,CNST_LIMB(0x89bf33b065119789),CNST_LIMB(0x11635ee344ce36)),
+  P(3779,CNST_LIMB(0x8f0149803cb291eb),CNST_LIMB(0x11579767b6d679)),
+  P(3793,CNST_LIMB(0x8334b63afd190a31),CNST_LIMB(0x114734711e2b54)),
+  P(3797,CNST_LIMB(0x920908d50d6aba7d),CNST_LIMB(0x11428b90147f05)),
+  P(3803,CNST_LIMB(0x57d8b018c5a33d53),CNST_LIMB(0x113b92f3021636)),
+  P(3821,CNST_LIMB(0xea1773092dc27ee5),CNST_LIMB(0x1126cabc886884)),
+  P(3823,CNST_LIMB(0xcae5f38b7bf2e00f),CNST_LIMB(0x11247eb1b85976)),
+  P(3833,CNST_LIMB(0x2bd02df34f695349),CNST_LIMB(0x11190bb01efd65)),
+  P(3847,CNST_LIMB(0xddfecd5be62e2eb7),CNST_LIMB(0x11091de0fd679c)),
+  P(3851,CNST_LIMB(0xdbf849ebec96c4a3),CNST_LIMB(0x1104963c7e4e0b)),
+  P(3853,CNST_LIMB(0xda31d4d0187357c5),CNST_LIMB(0x110253516420b0)),
+  P(3863,CNST_LIMB(0xe34e21cc2d5418a7),CNST_LIMB(0x10f70db7c41797)),
+  P(3877,CNST_LIMB(0x68ca5137a9e574ad),CNST_LIMB(0x10e75ee2bf9ecd)),
+  P(3881,CNST_LIMB(0x3eaa0d0f804bfd19),CNST_LIMB(0x10e2e91c6e0676)),
+  P(3889,CNST_LIMB(0x554fb753cc20e9d1),CNST_LIMB(0x10da049b9d428d)),
+  P(3907,CNST_LIMB(0x797afcca1300756b),CNST_LIMB(0x10c6248fe3b1a2)),
+  P(3911,CNST_LIMB(0x8b8d950b52eeea77),CNST_LIMB(0x10c1c03ed690eb)),
+  P(3917,CNST_LIMB(0xfb6cd166acabc185),CNST_LIMB(0x10bb2e1379e3a2)),
+  P(3919,CNST_LIMB(0x4eb6c5ed9437a7af),CNST_LIMB(0x10b8fe7f61228e)),
+  P(3923,CNST_LIMB(0xd1eddbd91b790cdb),CNST_LIMB(0x10b4a10d60a4f7)),
+  P(3929,CNST_LIMB(0x93d714ea4d8948e9),CNST_LIMB(0x10ae192681ec0f)),
+  P(3931,CNST_LIMB(0x3ca13ed8145188d3),CNST_LIMB(0x10abecfbe5b0ae)),
+  P(3943,CNST_LIMB(0x829086016da89c57),CNST_LIMB(0x109eefd568b96d)),
+  P(3947,CNST_LIMB(0xd7da1f432124a543),CNST_LIMB(0x109a9ff178b40c)),
+  P(3967,CNST_LIMB(0x7ead5581632fb07f),CNST_LIMB(0x108531e22f9ff9)),
+  P(3989,CNST_LIMB(0x35443837f63ec3bd),CNST_LIMB(0x106ddec1af4417)),
+  P(4001,CNST_LIMB(0x89e2b200e5519461),CNST_LIMB(0x10614174a4911d)),
+  P(4003,CNST_LIMB(0xe9ae44f0b7289c0b),CNST_LIMB(0x105f291f0448e7)),
+  P(4007,CNST_LIMB(0x94387a277b9fa817),CNST_LIMB(0x105afa0ef32891)),
+  P(4013,CNST_LIMB(0xc84f1a58abfc2c25),CNST_LIMB(0x1054b777bd2530)),
+  P(4019,CNST_LIMB(0x71101d8e3c83377b),CNST_LIMB(0x104e79a97fb69e)),
+  P(4021,CNST_LIMB(0xc024abe5c50ba69d),CNST_LIMB(0x104c661eafd845)),
+  P(4027,CNST_LIMB(0x15de4eb365a65d73),CNST_LIMB(0x10462ea939c933)),
+  P(4049,CNST_LIMB(0x9ed28a76bcca931),CNST_LIMB(0x102f8baa442836)),
+  P(4051,CNST_LIMB(0x816bffbf4a00205b),CNST_LIMB(0x102d7ff7e94004)),
+  P(4057,CNST_LIMB(0x1f5c71543d558069),CNST_LIMB(0x10275ff9f13c02)),
+  P(4073,CNST_LIMB(0xf25c64d0ec53b859),CNST_LIMB(0x1017213fcbb4d3)),
+  P(4079,CNST_LIMB(0x96c02c2ef1e0ff0f),CNST_LIMB(0x101112234579d1)),
+  P(4091,CNST_LIMB(0x19a804816870a333),CNST_LIMB(0x100501907d271c)),
+  P(4093,CNST_LIMB(0x6de49add0971c555),CNST_LIMB(0x100300901b0510)),
+  P(4099,CNST_LIMB(0x528087e684c71aab),CNST_LIMB(0xffd008fe5050f)),
+  P(4111,CNST_LIMB(0xa94152c269bcdeef),CNST_LIMB(0xff10e02dd5084)),
+  P(4127,CNST_LIMB(0x379450a3c2b6bdf),CNST_LIMB(0xfe13b9c80c67f)),
+  P(4129,CNST_LIMB(0xd2cd38bafe5373e1),CNST_LIMB(0xfdf4384be37ad)),
+  P(4133,CNST_LIMB(0xc29df2bea71d8bad),CNST_LIMB(0xfdb54cbe8766e)),
+  P(4139,CNST_LIMB(0xc15862775f302e83),CNST_LIMB(0xfd5725ca6ff32)),
+  P(4153,CNST_LIMB(0x1016af2fe55ede09),CNST_LIMB(0xfc7c84684c6fb)),
+  P(4157,CNST_LIMB(0x3d26dbd9d1910715),CNST_LIMB(0xfc3e5265dbaa8)),
+  P(4159,CNST_LIMB(0x621dab2dfaf3dfbf),CNST_LIMB(0xfc1f44e0cae12)),
+  P(4177,CNST_LIMB(0xb6f1d7ac287338b1),CNST_LIMB(0xfb0921c50a7af)),
+  P(4201,CNST_LIMB(0x8d9e9f0c3f9e7fd9),CNST_LIMB(0xf999fd70cbc6b)),
+  P(4211,CNST_LIMB(0x60a93f8762e914bb),CNST_LIMB(0xf9023fd5339d0)),
+  P(4217,CNST_LIMB(0xb14371f247c159c9),CNST_LIMB(0xf8a78ce671475)),
+  P(4219,CNST_LIMB(0x6dd3b484471d4eb3),CNST_LIMB(0xf8895fee86574)),
+  P(4229,CNST_LIMB(0xcd172f4701c1684d),CNST_LIMB(0xf7f2ecb084b10)),
+  P(4231,CNST_LIMB(0x372e686ed8bb537),CNST_LIMB(0xf7d4eb7d10c29)),
+  P(4241,CNST_LIMB(0xbc07f7ca65c5b071),CNST_LIMB(0xf73f52277a3c3)),
+  P(4243,CNST_LIMB(0xab2b6170c3f78d9b),CNST_LIMB(0xf7217c598961c)),
+  P(4253,CNST_LIMB(0xf3d74f461fe6f5b5),CNST_LIMB(0xf68cbb1448f42)),
+  P(4259,CNST_LIMB(0xdbc13f4b31f3230b),CNST_LIMB(0xf633d0276e4c5)),
+  P(4261,CNST_LIMB(0xd1420716e3f1572d),CNST_LIMB(0xf6163ac20ec79)),
+  P(4271,CNST_LIMB(0xd5be2fd4d805464f),CNST_LIMB(0xf582ba2bc16c6)),
+  P(4273,CNST_LIMB(0xc68b97c136943851),CNST_LIMB(0xf5654f43290a0)),
+  P(4283,CNST_LIMB(0x9e27918af7cfb473),CNST_LIMB(0xf4d2a23810bc6)),
+  P(4289,CNST_LIMB(0x5ec8ab6c36ac7f41),CNST_LIMB(0xf47af4d6a2f27)),
+  P(4297,CNST_LIMB(0x964076331dd90979),CNST_LIMB(0xf4066f2b6e652)),
+  P(4327,CNST_LIMB(0x30198eff77b002d7),CNST_LIMB(0xf2555048e3a92)),
+  P(4337,CNST_LIMB(0x3af7cb9583ece011),CNST_LIMB(0xf1c64588a5bf6)),
+  P(4339,CNST_LIMB(0x34ce06f643d9883b),CNST_LIMB(0xf1a9be09cb411)),
+  P(4349,CNST_LIMB(0x79f767e528708c55),CNST_LIMB(0xf11b7d5259d39)),
+  P(4357,CNST_LIMB(0x185332d2ef2313cd),CNST_LIMB(0xf0aa284e7f802)),
+  P(4363,CNST_LIMB(0x43b611b84c8332a3),CNST_LIMB(0xf0556e5e3b7f2)),
+  P(4373,CNST_LIMB(0xc2e215e4f43bb63d),CNST_LIMB(0xefc8bcbc808e5)),
+  P(4391,CNST_LIMB(0xf94b9dd22ce44e97),CNST_LIMB(0xeecd1a690efbb)),
+  P(4397,CNST_LIMB(0xd895834a1db166a5),CNST_LIMB(0xee79aed6d65f2)),
+  P(4409,CNST_LIMB(0x347d2f16d19b8d09),CNST_LIMB(0xedd386114d83a)),
+  P(4421,CNST_LIMB(0x1b54d4dc45b7d98d),CNST_LIMB(0xed2e44366e5e2)),
+  P(4423,CNST_LIMB(0x117ac30d9a044877),CNST_LIMB(0xed12cf8e17f64)),
+  P(4441,CNST_LIMB(0xe10b78a67a526e9),CNST_LIMB(0xec1cd284b2b2d)),
+  P(4447,CNST_LIMB(0x92da68a818688a9f),CNST_LIMB(0xebcb44cadda1e)),
+  P(4451,CNST_LIMB(0xcf2b6c87f741f84b),CNST_LIMB(0xeb9505943771d)),
+  P(4457,CNST_LIMB(0xd264f9bd41e18ed9),CNST_LIMB(0xeb43d57efeadc)),
+  P(4463,CNST_LIMB(0x733cbeaa97166d8f),CNST_LIMB(0xeaf2dd4c00b03)),
+  P(4481,CNST_LIMB(0xc9f475b021d22e81),CNST_LIMB(0xea0141c1ba6a6)),
+  P(4483,CNST_LIMB(0x731f76f2ec4c852b),CNST_LIMB(0xe9e68805f05a7)),
+  P(4493,CNST_LIMB(0xdaf6f0c978f69945),CNST_LIMB(0xe96142b87e431)),
+  P(4507,CNST_LIMB(0x749c8ad20c61ec93),CNST_LIMB(0xe8a7acd811b8c)),
+  P(4513,CNST_LIMB(0x9307ff8bd3c1261),CNST_LIMB(0xe8587db3e001d)),
+  P(4517,CNST_LIMB(0x334a69fb5a486e2d),CNST_LIMB(0xe823d186d44dc)),
+  P(4519,CNST_LIMB(0x1f36c7bf31578617),CNST_LIMB(0xe8098463ee194)),
+  P(4523,CNST_LIMB(0x31ebbcc279ea6103),CNST_LIMB(0xe7d4fbfb3ee1d)),
+  P(4547,CNST_LIMB(0x42e2aad119f466eb),CNST_LIMB(0xe69bba6981ffa)),
+  P(4549,CNST_LIMB(0x106ec05a0ab1450d),CNST_LIMB(0xe681c5cf7d707)),
+  P(4561,CNST_LIMB(0xb1b38db92a99e731),CNST_LIMB(0xe5e684930e334)),
+  P(4567,CNST_LIMB(0x784ae377e67071e7),CNST_LIMB(0xe5993247dc92d)),
+  P(4583,CNST_LIMB(0x3e9e1471ba6671d7),CNST_LIMB(0xe4cbfee201016)),
+  P(4591,CNST_LIMB(0x82c29b59d4d73d0f),CNST_LIMB(0xe465ee7daf979)),
+  P(4597,CNST_LIMB(0xc23dd07128b5525d),CNST_LIMB(0xe4199de07af5c)),
+  P(4603,CNST_LIMB(0x4d4e5ce0e9245133),CNST_LIMB(0xe3cd8031d4f40)),
+  P(4621,CNST_LIMB(0xc8fd1057c09f8cc5),CNST_LIMB(0xe2ea56c157eb2)),
+  P(4637,CNST_LIMB(0xea1516e94f394035),CNST_LIMB(0xe221e5d4d3c73)),
+  P(4639,CNST_LIMB(0xb5e3319c564ee9df),CNST_LIMB(0xe208f09a841c7)),
+  P(4643,CNST_LIMB(0x126a69f90d822d8b),CNST_LIMB(0xe1d716a945161)),
+  P(4649,CNST_LIMB(0x501ed6348857aa19),CNST_LIMB(0xe18c78ec8fd4d)),
+  P(4651,CNST_LIMB(0xde344a324eee1c83),CNST_LIMB(0xe173a4a162079)),
+  P(4657,CNST_LIMB(0x1dd9690cb2c406d1),CNST_LIMB(0xe1294881bb494)),
+  P(4663,CNST_LIMB(0x8d6c5178d5e4387),CNST_LIMB(0xe0df1d5f24661)),
+  P(4673,CNST_LIMB(0x4cea4050a3e8fdc1),CNST_LIMB(0xe063ec7f50b1e)),
+  P(4679,CNST_LIMB(0xc114a06acc83f777),CNST_LIMB(0xe01a4313dc53d)),
+  P(4691,CNST_LIMB(0x20b060ebc0ea01db),CNST_LIMB(0xdf8780f47c350)),
+  P(4703,CNST_LIMB(0xfe50045acb78c99f),CNST_LIMB(0xdef57e8eb9666)),
+  P(4721,CNST_LIMB(0x291a68705b196e91),CNST_LIMB(0xde1bdf3f63d46)),
+  P(4723,CNST_LIMB(0xc1042c724273e2bb),CNST_LIMB(0xde03cb5099809)),
+  P(4729,CNST_LIMB(0x2cee680bb165b7c9),CNST_LIMB(0xddbbaecc84bc9)),
+  P(4733,CNST_LIMB(0xfd2ff9f12e0776d5),CNST_LIMB(0xdd8bb5ca73db6)),
+  P(4751,CNST_LIMB(0x166a5da63af2cc6f),CNST_LIMB(0xdcb4d529a6e07)),
+  P(4759,CNST_LIMB(0xedd16a5930408d27),CNST_LIMB(0xdc55da73dea60)),
+  P(4783,CNST_LIMB(0x2adf30c26528844f),CNST_LIMB(0xdb3ad2585011f)),
+  P(4787,CNST_LIMB(0x9a48d6572b5eec7b),CNST_LIMB(0xdb0becf636a79)),
+  P(4789,CNST_LIMB(0x6e8bf2877503cb9d),CNST_LIMB(0xdaf481ca6fefb)),
+  P(4793,CNST_LIMB(0xea27a191a7045389),CNST_LIMB(0xdac5ba7565dae)),
+  P(4799,CNST_LIMB(0x6eb091f34dd45d3f),CNST_LIMB(0xda7fb4e419d19)),
+  P(4801,CNST_LIMB(0xdc8a6cabb2937d41),CNST_LIMB(0xda6867a88d327)),
+  P(4813,CNST_LIMB(0xbc2f04f254922a05),CNST_LIMB(0xd9dd005f50b02)),
+  P(4817,CNST_LIMB(0x41431f4d6eb38631),CNST_LIMB(0xd9aeb01f763f7)),
+  P(4831,CNST_LIMB(0x7bd717435a08291f),CNST_LIMB(0xd90d31dd5804a)),
+  P(4861,CNST_LIMB(0x4232df9c91fc1a55),CNST_LIMB(0xd7b6453358f31)),
+  P(4871,CNST_LIMB(0xa4651e1d5382eab7),CNST_LIMB(0xd744e69d900e4)),
+  P(4877,CNST_LIMB(0x7cfb5409de4cf3c5),CNST_LIMB(0xd7011a317260e)),
+  P(4889,CNST_LIMB(0xcdd636fb068b9929),CNST_LIMB(0xd67a0126e7c19)),
+  P(4903,CNST_LIMB(0xee8f95e740462c97),CNST_LIMB(0xd5dd39e775bd7)),
+  P(4909,CNST_LIMB(0x490f97b3a758b4a5),CNST_LIMB(0xd59a4f2990168)),
+  P(4919,CNST_LIMB(0x641431563c441287),CNST_LIMB(0xd52b24cb6269d)),
+  P(4931,CNST_LIMB(0xb743dad3ec45916b),CNST_LIMB(0xd4a6571da4f04)),
+  P(4933,CNST_LIMB(0x7b188be8f55c878d),CNST_LIMB(0xd49044eac6581)),
+  P(4937,CNST_LIMB(0xd805648b2ca54ef9),CNST_LIMB(0xd4642e40d1129)),
+  P(4943,CNST_LIMB(0x76dbe6eef60123af),CNST_LIMB(0xd4222e81fe723)),
+  P(4951,CNST_LIMB(0x3711525e6a9e8867),CNST_LIMB(0xd3ca6e8c89f41)),
+  P(4957,CNST_LIMB(0x85c2215cb383d8f5),CNST_LIMB(0xd388ce29d4edc)),
+  P(4967,CNST_LIMB(0xe58f554c89825857),CNST_LIMB(0xd31bc7b7d8013)),
+  P(4969,CNST_LIMB(0x8fbd3b17c01dacd9),CNST_LIMB(0xd306071c13fd5)),
+  P(4973,CNST_LIMB(0x4c8c39dc7aedee65),CNST_LIMB(0xd2da935479b1a)),
+  P(4987,CNST_LIMB(0x653ac6dda86cd3b3),CNST_LIMB(0xd2430aa043597)),
+  P(4993,CNST_LIMB(0xd61c6791a9c2c81),CNST_LIMB(0xd2025bc6c7db7)),
+  P(4999,CNST_LIMB(0xb627a30090354237),CNST_LIMB(0xd1c1d4ad1732b)),
+  P(5003,CNST_LIMB(0x83a89a539c527c23),CNST_LIMB(0xd196e5f46f8c8)),
+  P(5009,CNST_LIMB(0x28c8c09330e90d71),CNST_LIMB(0xd156a0c9293e8)),
+  P(5011,CNST_LIMB(0xee1178d27b1f029b),CNST_LIMB(0xd1413d26e0aee)),
+  P(5021,CNST_LIMB(0xcecc740b37860ab5),CNST_LIMB(0xd0d68c6a4128f)),
+  P(5023,CNST_LIMB(0x79736fde910c485f),CNST_LIMB(0xd0c142eaf3837)),
+  P(5039,CNST_LIMB(0x6873d51f2487234f),CNST_LIMB(0xd01792ab9d70d)),
+  P(5051,CNST_LIMB(0x2a112180614fb973),CNST_LIMB(0xcf990317775bc)),
+  P(5059,CNST_LIMB(0xcb04cea98508f4eb),CNST_LIMB(0xcf44f8c38790a)),
+  P(5077,CNST_LIMB(0xc2fcd2c527e28d7d),CNST_LIMB(0xce88d96d10e45)),
+  P(5081,CNST_LIMB(0x980203ee10393c69),CNST_LIMB(0xce5f39b07e906)),
+  P(5087,CNST_LIMB(0x3fa90a1d7d75681f),CNST_LIMB(0xce20e98148847)),
+  P(5099,CNST_LIMB(0xdbf3bfefef217cc3),CNST_LIMB(0xcda4b9c30ccd7)),
+  P(5101,CNST_LIMB(0x66a17fd3087b41e5),CNST_LIMB(0xcd9015ae32495)),
+  P(5107,CNST_LIMB(0x962195d496fbbd3b),CNST_LIMB(0xcd524244aca36)),
+  P(5113,CNST_LIMB(0xc705a86155443e49),CNST_LIMB(0xcd14940099cf6)),
+  P(5119,CNST_LIMB(0x3f298ee0be6febff),CNST_LIMB(0xccd70ac089a07)),
+  P(5147,CNST_LIMB(0xaa99b084e62fa613),CNST_LIMB(0xcbb9c535c4371)),
+  P(5153,CNST_LIMB(0x1f000cb7d0b46fe1),CNST_LIMB(0xcb7d0b46fe0ff)),
+  P(5167,CNST_LIMB(0x9ed7858637c9b2cf),CNST_LIMB(0xcaefe5d7135f4)),
+  P(5171,CNST_LIMB(0x4d871aaf27c106fb),CNST_LIMB(0xcac7b5f00f0cd)),
+  P(5179,CNST_LIMB(0x2e6a467cdc75a4f3),CNST_LIMB(0xca7785ceddbea)),
+  P(5189,CNST_LIMB(0xe9d938fb696dde8d),CNST_LIMB(0xca13a2a86e1db)),
+  P(5197,CNST_LIMB(0x40ec71b0b1554485),CNST_LIMB(0xc9c4009753007)),
+  P(5209,CNST_LIMB(0x3aae12f861e5f3e9),CNST_LIMB(0xc94d02e64bfab)),
+  P(5227,CNST_LIMB(0xa97565873959f843),CNST_LIMB(0xc89b8c9c875ef)),
+  P(5231,CNST_LIMB(0xb5a960c09fbca8f),CNST_LIMB(0xc87447737277e)),
+  P(5233,CNST_LIMB(0x463fe3d268012c91),CNST_LIMB(0xc860aaa2514e3)),
+  P(5237,CNST_LIMB(0xe59a6bd5f5ee1bdd),CNST_LIMB(0xc8397c813f1b9)),
+  P(5261,CNST_LIMB(0x6542e84d7775ce45),CNST_LIMB(0xc74fa805d6d56)),
+  P(5273,CNST_LIMB(0x8b6eef58fd9effa9),CNST_LIMB(0xc6db8a1f5cdfe)),
+  P(5279,CNST_LIMB(0x58993dbb9f98075f),CNST_LIMB(0xc6a1add9e2398)),
+  P(5281,CNST_LIMB(0x2997955a810acf61),CNST_LIMB(0xc68e6be826648)),
+  P(5297,CNST_LIMB(0x76e3d2f5077db451),CNST_LIMB(0xc5f4e25fc9df0)),
+  P(5303,CNST_LIMB(0xb37c1d2867e30907),CNST_LIMB(0xc5bb8bf2ad1cd)),
+  P(5309,CNST_LIMB(0x53ce6e09bd8d8695),CNST_LIMB(0xc58256b316ced)),
+  P(5323,CNST_LIMB(0x39db291ea2a6b0e3),CNST_LIMB(0xc4fd5ad917b5b)),
+  P(5333,CNST_LIMB(0xddd265ab9c58847d),CNST_LIMB(0xc49ecb3ea4d7a)),
+  P(5347,CNST_LIMB(0x5beca8562dddd0cb),CNST_LIMB(0xc41b00b7d950a)),
+  P(5351,CNST_LIMB(0xb69031c153ddbed7),CNST_LIMB(0xc3f57990b87a1)),
+  P(5381,CNST_LIMB(0xd03c2271b42a6fcd),CNST_LIMB(0xc2ddcb31250f8)),
+  P(5387,CNST_LIMB(0xcd6fd19e63e40ea3),CNST_LIMB(0xc2a63b3651432)),
+  P(5393,CNST_LIMB(0xf7687aa8e4fd7bf1),CNST_LIMB(0xc26ecae1db72e)),
+  P(5399,CNST_LIMB(0x649dfda112a272a7),CNST_LIMB(0xc2377a18c051e)),
+  P(5407,CNST_LIMB(0xecf7866a56d526df),CNST_LIMB(0xc1ede9efcec29)),
+  P(5413,CNST_LIMB(0x72bbf1cfdaebfead),CNST_LIMB(0xc1b6e258d13a0)),
+  P(5417,CNST_LIMB(0x55f6a48df7055719),CNST_LIMB(0xc19243f5399bb)),
+  P(5419,CNST_LIMB(0x80060bffcfa00183),CNST_LIMB(0xc17ff9f400305)),
+  P(5431,CNST_LIMB(0x8a104f309919b087),CNST_LIMB(0xc112865703b94)),
+  P(5437,CNST_LIMB(0x98fa7db7652f6a15),CNST_LIMB(0xc0dbfaea33225)),
+  P(5441,CNST_LIMB(0x5d7d1b3df70f7ac1),CNST_LIMB(0xc0b7af12ddfb9)),
+  P(5443,CNST_LIMB(0x16ab7b5e04cc1f6b),CNST_LIMB(0xc0a58e464462c)),
+  P(5449,CNST_LIMB(0x78a5bfd2e5ececf9),CNST_LIMB(0xc06f40512eef2)),
+  P(5471,CNST_LIMB(0x6506392e171d869f),CNST_LIMB(0xbfa9275a2b247)),
+  P(5477,CNST_LIMB(0xc3fc12e221ef146d),CNST_LIMB(0xbf7367402cdf0)),
+  P(5479,CNST_LIMB(0xf8aa132822c33657),CNST_LIMB(0xbf61833f4f921)),
+  P(5483,CNST_LIMB(0x894496574f536f43),CNST_LIMB(0xbf3dc543a74a1)),
+  P(5501,CNST_LIMB(0x8b2546b08fb4cbd5),CNST_LIMB(0xbe9d9302a7115)),
+  P(5503,CNST_LIMB(0x43bbb561bd1aa7f),CNST_LIMB(0xbe8bd6e051e01)),
+  P(5507,CNST_LIMB(0x2412c7cc4ea7a12b),CNST_LIMB(0xbe6868804d5a6)),
+  P(5519,CNST_LIMB(0x6f0bd406dd71696f),CNST_LIMB(0xbdfe6c4359f0e)),
+  P(5521,CNST_LIMB(0xad475c6988d54b71),CNST_LIMB(0xbdeccdb0b5c3a)),
+  P(5527,CNST_LIMB(0xd812e5d48dbbba27),CNST_LIMB(0xbdb8058ee429a)),
+  P(5531,CNST_LIMB(0x22aaca437ba04893),CNST_LIMB(0xbd94e5c1b371f)),
+  P(5557,CNST_LIMB(0xdba6ff1fecd5f09d),CNST_LIMB(0xbcb1d293b1af3)),
+  P(5563,CNST_LIMB(0x13016d3396286773),CNST_LIMB(0xbc7db8db0c1a5)),
+  P(5569,CNST_LIMB(0xc746494631bcfa41),CNST_LIMB(0xbc49bbdfd2662)),
+  P(5573,CNST_LIMB(0xd14888565bf6a10d),CNST_LIMB(0xbc2723240f402)),
+  P(5581,CNST_LIMB(0xc002ef885f0adf05),CNST_LIMB(0xbbe217c2b7c13)),
+  P(5591,CNST_LIMB(0xe5a04da7fee6ade7),CNST_LIMB(0xbb8c10aab27b2)),
+  P(5623,CNST_LIMB(0xc114ce5468593bc7),CNST_LIMB(0xba7ad528a7e79)),
+  P(5639,CNST_LIMB(0xbb6747dd7f577b7),CNST_LIMB(0xb9f3611b48c5e)),
+  P(5641,CNST_LIMB(0x395ce5a20f285839),CNST_LIMB(0xb9e2806e5e7c4)),
+  P(5647,CNST_LIMB(0x6eee8be66e8618ef),CNST_LIMB(0xb9aff0c4913fe)),
+  P(5651,CNST_LIMB(0x52acf64297f1241b),CNST_LIMB(0xb98e4aedd581c)),
+  P(5653,CNST_LIMB(0x361dcc48a364093d),CNST_LIMB(0xb97d7c94b7dc2)),
+  P(5657,CNST_LIMB(0x342d6f475d72e629),CNST_LIMB(0xb95be902d9d9e)),
+  P(5659,CNST_LIMB(0x5e978bd46410d413),CNST_LIMB(0xb94b23c872b90)),
+  P(5669,CNST_LIMB(0xcc3433d75ba015ad),CNST_LIMB(0xb8f77714d15a1)),
+  P(5683,CNST_LIMB(0x1c83b7628458d4fb),CNST_LIMB(0xb882d0beff6a1)),
+  P(5689,CNST_LIMB(0xf9ca45637e38f809),CNST_LIMB(0xb850ff9852703)),
+  P(5693,CNST_LIMB(0xcbed792ffaf6b115),CNST_LIMB(0xb82fd86db8806)),
+  P(5701,CNST_LIMB(0x9abd961d8c0e8c8d),CNST_LIMB(0xb7edadd32f76c)),
+  P(5711,CNST_LIMB(0xe69572fa659340af),CNST_LIMB(0xb79b3b4df3b7b)),
+  P(5717,CNST_LIMB(0x9187e7483a6436fd),CNST_LIMB(0xb769e6d59833f)),
+  P(5737,CNST_LIMB(0x1e9c726993bed9d9),CNST_LIMB(0xb6c636b5141ff)),
+  P(5741,CNST_LIMB(0x243554db91976365),CNST_LIMB(0xb6a59ceae8801)),
+  P(5743,CNST_LIMB(0x4d06ff994c0088f),CNST_LIMB(0xb6955461e38f7)),
+  P(5749,CNST_LIMB(0x25b76abcb74889dd),CNST_LIMB(0xb6648c2dc6bc2)),
+  P(5779,CNST_LIMB(0x3a409642893c779b),CNST_LIMB(0xb572282260209)),
+  P(5783,CNST_LIMB(0x8f8f620d8bc0c927),CNST_LIMB(0xb552072bde889)),
+  P(5791,CNST_LIMB(0x6f9f196b3369855f),CNST_LIMB(0xb511e7552f9c4)),
+  P(5801,CNST_LIMB(0x92a522bb0638ed99),CNST_LIMB(0xb4c1ff34a5c0e)),
+  P(5807,CNST_LIMB(0x96270f1efdd7004f),CNST_LIMB(0xb4922f58d4aa2)),
+  P(5813,CNST_LIMB(0xb4844b380fdaa79d),CNST_LIMB(0xb46278c16b967)),
+  P(5821,CNST_LIMB(0x108936aa5f9c1495),CNST_LIMB(0xb42301cd99b49)),
+  P(5827,CNST_LIMB(0xb60f606f104c9eb),CNST_LIMB(0xb3f385dd77e4e)),
+  P(5839,CNST_LIMB(0xc663dfe8263b302f),CNST_LIMB(0xb394d8ef8f0f6)),
+  P(5843,CNST_LIMB(0xc91a280b9110b15b),CNST_LIMB(0xb375601507c14)),
+  P(5849,CNST_LIMB(0x904287118d10969),CNST_LIMB(0xb3463f76be376)),
+  P(5851,CNST_LIMB(0x160d36a5d31bf553),CNST_LIMB(0xb3368f6c4a07c)),
+  P(5857,CNST_LIMB(0xe84f5fda3c67ad21),CNST_LIMB(0xb3078fc1c25f0)),
+  P(5861,CNST_LIMB(0xbd85701f72d4b6ed),CNST_LIMB(0xb2e84854e93e5)),
+  P(5867,CNST_LIMB(0x4c50cf5924dee1c3),CNST_LIMB(0xb2b971aa909a4)),
+  P(5869,CNST_LIMB(0x2455aaf1633bb6e5),CNST_LIMB(0xb2a9da39d6bc8)),
+  P(5879,CNST_LIMB(0xd775b39f549b8ac7),CNST_LIMB(0xb25c0dc29a0fc)),
+  P(5881,CNST_LIMB(0x87fcdda7a252cb49),CNST_LIMB(0xb24c8698449a7)),
+  P(5897,CNST_LIMB(0x53df2e3bd254a739),CNST_LIMB(0xb1d0ae579aefe)),
+  P(5903,CNST_LIMB(0x8915e69623a5f7ef),CNST_LIMB(0xb1a2698ea2f9e)),
+  P(5923,CNST_LIMB(0x1ef24c80742dd08b),CNST_LIMB(0xb108dc4186078)),
+  P(5927,CNST_LIMB(0xb4d87aaa6fb1e897),CNST_LIMB(0xb0ea463b00212)),
+  P(5939,CNST_LIMB(0x788573e8b92dbbfb),CNST_LIMB(0xb08ec37007962)),
+  P(5953,CNST_LIMB(0x2527b137b0878c1),CNST_LIMB(0xb024778cc023c)),
+  P(5981,CNST_LIMB(0x1870a7c8dee9f4f5),CNST_LIMB(0xaf515df36a88e)),
+  P(5987,CNST_LIMB(0x39b99e40910a224b),CNST_LIMB(0xaf24635f6561e)),
+  P(6007,CNST_LIMB(0x45821c0abd4df247),CNST_LIMB(0xae8f1b92baeaf)),
+  P(6011,CNST_LIMB(0x10fe2b2f50e02fb3),CNST_LIMB(0xae715eee11f8e)),
+  P(6029,CNST_LIMB(0x5762b90c043f0345),CNST_LIMB(0xadec0b0a3bb36)),
+  P(6037,CNST_LIMB(0x82a67b9193b27bbd),CNST_LIMB(0xadb10aa4c956f)),
+  P(6043,CNST_LIMB(0xa6e914e28ec37693),CNST_LIMB(0xad84e49752245)),
+  P(6047,CNST_LIMB(0x835d9a4facaf445f),CNST_LIMB(0xad6782597f0c2)),
+  P(6053,CNST_LIMB(0x48def8175884f82d),CNST_LIMB(0xad3b81a0d72fe)),
+  P(6067,CNST_LIMB(0xae900e2d7c9a6f7b),CNST_LIMB(0xacd52beced79e)),
+  P(6073,CNST_LIMB(0x1c08431bdd18be89),CNST_LIMB(0xaca9755063254)),
+  P(6079,CNST_LIMB(0xb370a66d684fd83f),CNST_LIMB(0xac7dd4cafb12a)),
+  P(6089,CNST_LIMB(0xb4be33e18f93b279),CNST_LIMB(0xac354f80dca44)),
+  P(6091,CNST_LIMB(0x310c50872a7dd5e3),CNST_LIMB(0xac26d5c2b8ad2)),
+  P(6101,CNST_LIMB(0x447ab1281276697d),CNST_LIMB(0xabde997dabd3d)),
+  P(6113,CNST_LIMB(0xc2f122216b2a6c21),CNST_LIMB(0xab883aa1100a0)),
+  P(6121,CNST_LIMB(0xab99c8b5ae1c3059),CNST_LIMB(0xab4ed637f5a0b)),
+  P(6131,CNST_LIMB(0xb78e17a2227d593b),CNST_LIMB(0xab074e9febf52)),
+  P(6133,CNST_LIMB(0xabf97d03f7269c5d),CNST_LIMB(0xaaf90778c2039)),
+  P(6143,CNST_LIMB(0x867aefc9fdbfe7ff),CNST_LIMB(0xaab1c7684f034)),
+  P(6151,CNST_LIMB(0xf7f7ad182e47d5b7),CNST_LIMB(0xaa78f20ebbb3e)),
+  P(6163,CNST_LIMB(0x50dff95a9847721b),CNST_LIMB(0xaa23f8dafd4cc)),
+  P(6173,CNST_LIMB(0xe4cb8a0e83cb6a35),CNST_LIMB(0xa9dd69cad5934)),
+  P(6197,CNST_LIMB(0x8da72ecdf9247a1d),CNST_LIMB(0xa935004a07302)),
+  P(6199,CNST_LIMB(0xc5b04bfc87f31d87),CNST_LIMB(0xa9270690f3d14)),
+  P(6203,CNST_LIMB(0xe2dcf622ea2b00f3),CNST_LIMB(0xa90b1a0aa5d30)),
+  P(6211,CNST_LIMB(0xb9ce9f2e4972f46b),CNST_LIMB(0xa8d35c9d731e9)),
+  P(6217,CNST_LIMB(0x1ed785c911bf59f9),CNST_LIMB(0xa8a9a6a51f16c)),
+  P(6221,CNST_LIMB(0x4ddb8a4eed70e085),CNST_LIMB(0xa88de370f596b)),
+  P(6229,CNST_LIMB(0x81e93b4df68c24fd),CNST_LIMB(0xa856786adae36)),
+  P(6247,CNST_LIMB(0xee0d0812afcd8357),CNST_LIMB(0xa7da4c77d3161)),
+  P(6257,CNST_LIMB(0xf62e3ba72268a891),CNST_LIMB(0xa7959f863d4a1)),
+  P(6263,CNST_LIMB(0x3194d367c8154147),CNST_LIMB(0xa76c85e80c195)),
+  P(6269,CNST_LIMB(0xd096ede8e30c20d5),CNST_LIMB(0xa743806dc44c4)),
+  P(6271,CNST_LIMB(0xd68624d27b87a77f),CNST_LIMB(0xa735d866dfa0a)),
+  P(6277,CNST_LIMB(0xb728fcdc11c8204d),CNST_LIMB(0xa70cedb02531e)),
+  P(6287,CNST_LIMB(0x9d6b6038077e066f),CNST_LIMB(0xa6c8e842c770f)),
+  P(6299,CNST_LIMB(0xaa732d7a4a360d93),CNST_LIMB(0xa67791215dd74)),
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+  P(6317,CNST_LIMB(0xed85352107410b25),CNST_LIMB(0xa5fe22c55c089)),
+  P(6323,CNST_LIMB(0x829c85ee6db8567b),CNST_LIMB(0xa5d5cffb77275)),
+  P(6329,CNST_LIMB(0xef60258952cc6d89),CNST_LIMB(0xa5ad90c4186e5)),
+  P(6337,CNST_LIMB(0xcf28c2e0da787741),CNST_LIMB(0xa578057e7c2eb)),
+  P(6343,CNST_LIMB(0x57567d8494af28f7),CNST_LIMB(0xa54ff3bb10e91)),
+  P(6353,CNST_LIMB(0x2c7c98518f174031),CNST_LIMB(0xa50d5683edc94)),
+  P(6359,CNST_LIMB(0xb28b363a36825ae7),CNST_LIMB(0xa4e57854b3df4)),
+  P(6361,CNST_LIMB(0xed1ffeb64f9ae769),CNST_LIMB(0xa4d8328c4b800)),
+  P(6367,CNST_LIMB(0xcbbb0115e9b9a31f),CNST_LIMB(0xa4b06e01d97b3)),
+  P(6373,CNST_LIMB(0x8d3c5fecb7f9e4ed),CNST_LIMB(0xa488bca2c4449)),
+  P(6379,CNST_LIMB(0x816271698195cfc3),CNST_LIMB(0xa4611e6132ed5)),
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+  P(6397,CNST_LIMB(0xdd9fb7017b0ec455),CNST_LIMB(0xa3eab5c3e44e9)),
+  P(6421,CNST_LIMB(0xc94cab1e57276e3d),CNST_LIMB(0xa34ddd50561e0)),
+  P(6427,CNST_LIMB(0x8b8806b117c79913),CNST_LIMB(0xa326d60e94186)),
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+  P(6469,CNST_LIMB(0xdded6688d83a918d),CNST_LIMB(0xa217aa3479693)),
+  P(6473,CNST_LIMB(0x4e446b6a305428f9),CNST_LIMB(0xa1fe05c62df4b)),
+  P(6481,CNST_LIMB(0x4ddaca7a3696cfb1),CNST_LIMB(0xa1cad538aebf9)),
+  P(6491,CNST_LIMB(0x7eadc4eb87f26ed3),CNST_LIMB(0xa18b05f490083)),
+  P(6521,CNST_LIMB(0x76c13a0ff04c00c9),CNST_LIMB(0xa0ccc4c28fc31)),
+  P(6529,CNST_LIMB(0xcbf800504d2a2681),CNST_LIMB(0xa09a544d01ffe)),
+  P(6547,CNST_LIMB(0x731dada6c4fec9b),CNST_LIMB(0xa0294aa53e9a2)),
+  P(6551,CNST_LIMB(0xbcb52a664e63f627),CNST_LIMB(0xa01041a6aaed5)),
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+  P(6569,CNST_LIMB(0x93774a3d57199a99),CNST_LIMB(0x9f9ff9c3c03e5)),
+  P(6571,CNST_LIMB(0xfb3541cd467a1903),CNST_LIMB(0x9f9389b864ab9)),
+  P(6577,CNST_LIMB(0x6828cab6b4fe8f51),CNST_LIMB(0x9f6e4534bdca8)),
+  P(6581,CNST_LIMB(0x12ac03e3d624cc9d),CNST_LIMB(0x9f557687235c2)),
+  P(6599,CNST_LIMB(0x6363bd1e9bb7d7f7),CNST_LIMB(0x9ee633c0391ab)),
+  P(6607,CNST_LIMB(0x334cfd676a484d2f),CNST_LIMB(0x9eb4f28e0bb39)),
+  P(6619,CNST_LIMB(0xd511acd86f143a53),CNST_LIMB(0x9e6b49e92e4bb)),
+  P(6637,CNST_LIMB(0x73fc2490e0062be5),CNST_LIMB(0x9dfd4ccbd0045)),
+  P(6653,CNST_LIMB(0x10780dda36b78b55),CNST_LIMB(0x9d9c0828536c1)),
+  P(6659,CNST_LIMB(0xabf601274064e0ab),CNST_LIMB(0x9d77ad449f777)),
+  P(6661,CNST_LIMB(0x3ef3e4ca27e4a2cd),CNST_LIMB(0x9d6b92b28ee48)),
+  P(6673,CNST_LIMB(0x9216a26e690a16f1),CNST_LIMB(0x9d231a476ed51)),
+  P(6679,CNST_LIMB(0xbae4849e6034bda7),CNST_LIMB(0x9cfef711bf120)),
+  P(6689,CNST_LIMB(0xf943a0520e01e9e1),CNST_LIMB(0x9cc2e1448b765)),
+  P(6691,CNST_LIMB(0x7c89958f48f6658b),CNST_LIMB(0x9cb6e26cbc64d)),
+  P(6701,CNST_LIMB(0xe67128750e0545a5),CNST_LIMB(0x9c7b03b4a9c67)),
+  P(6703,CNST_LIMB(0xc6c9e1d414516ccf),CNST_LIMB(0x9c6f0fd980ab1)),
+  P(6709,CNST_LIMB(0x805307f996e9e81d),CNST_LIMB(0x9c4b3f3a30c3f)),
+  P(6719,CNST_LIMB(0x3eddd2cff46ad5bf),CNST_LIMB(0x9c0fb29436687)),
+  P(6733,CNST_LIMB(0x35582c1aeb5aae85),CNST_LIMB(0x9bbca025b7aec)),
+  P(6737,CNST_LIMB(0x4973c88573ef6eb1),CNST_LIMB(0x9ba4f4421e52c)),
+  P(6761,CNST_LIMB(0x3063f627c1e715d9),CNST_LIMB(0x9b1783809ff03)),
+  P(6763,CNST_LIMB(0x711ad679a8dcc243),CNST_LIMB(0x9b0bc5b4d2eac)),
+  P(6779,CNST_LIMB(0x51c224a17a3db4b3),CNST_LIMB(0x9aae172fd8b9c)),
+  P(6781,CNST_LIMB(0x612325ca50ddaed5),CNST_LIMB(0x9aa26954607ed)),
+  P(6791,CNST_LIMB(0x9929a7b6b7958b37),CNST_LIMB(0x9a681e758a022)),
+  P(6793,CNST_LIMB(0xa78d222e5a857bb9),CNST_LIMB(0x9a5c7b284942e)),
+  P(6803,CNST_LIMB(0x3ad0ffe3198d139b),CNST_LIMB(0x9a2264ecc5558)),
+  P(6823,CNST_LIMB(0x8b4659ac547ed17),CNST_LIMB(0x99aebb39be56f)),
+  P(6827,CNST_LIMB(0x1752e8904aff1003),CNST_LIMB(0x9997ae1a9faac)),
+  P(6829,CNST_LIMB(0x60745c37ee4e5925),CNST_LIMB(0x998c2a22b6900)),
+  P(6833,CNST_LIMB(0x29e2da1f6557ee51),CNST_LIMB(0x997527603f8a8)),
+  P(6841,CNST_LIMB(0x80d78c24ac49cb89),CNST_LIMB(0x99473685e4d50)),
+  P(6857,CNST_LIMB(0xc56c3b495c8d1f79),CNST_LIMB(0x98eba72512a13)),
+  P(6863,CNST_LIMB(0xcf5bdf9f5088ac2f),CNST_LIMB(0x98c96d8dee9e1)),
+  P(6869,CNST_LIMB(0x8a44800e4fae4e7d),CNST_LIMB(0x98a743453554e)),
+  P(6871,CNST_LIMB(0xdd76384277e578e7),CNST_LIMB(0x989be33c9e6bd)),
+  P(6883,CNST_LIMB(0x20b1562d2703facb),CNST_LIMB(0x9857c692e9a59)),
+  P(6899,CNST_LIMB(0xef56caf96e9d8e3b),CNST_LIMB(0x97fd540c05c9e)),
+  P(6907,CNST_LIMB(0xf54061416aede033),CNST_LIMB(0x97d04302ed944)),
+  P(6911,CNST_LIMB(0xe0bc78c21a26e4ff),CNST_LIMB(0x97b9c48289935)),
+  P(6917,CNST_LIMB(0x524f92731a179cd),CNST_LIMB(0x9798133ece717)),
+  P(6947,CNST_LIMB(0x5d3b4ad7deafec8b),CNST_LIMB(0x96f07c683689e)),
+  P(6949,CNST_LIMB(0x508828f744da88ad),CNST_LIMB(0x96e55d6393fc5)),
+  P(6959,CNST_LIMB(0x6e82014031710bcf),CNST_LIMB(0x96addad861696)),
+  P(6961,CNST_LIMB(0xadf3b77a22595dd1),CNST_LIMB(0x96a2c5a2cf0cf)),
+  P(6967,CNST_LIMB(0xd8f0c03f7ea8a87),CNST_LIMB(0x96818fc825eba)),
+  P(6971,CNST_LIMB(0x2c49e3483c3a05f3),CNST_LIMB(0x966b74027f48a)),
+  P(6977,CNST_LIMB(0xccecbc98c91274c1),CNST_LIMB(0x964a56850b8ed)),
+  P(6983,CNST_LIMB(0x273a08941bb71e77),CNST_LIMB(0x962947990eb36)),
+  P(6991,CNST_LIMB(0xdead5a1e3f341baf),CNST_LIMB(0x95fd4a4c885e0)),
+  P(6997,CNST_LIMB(0x83eee092593309fd),CNST_LIMB(0x95dc5d3954fde)),
+  P(7001,CNST_LIMB(0x4af5f1bd3ae87ce9),CNST_LIMB(0x95c671ddfe516)),
+  P(7013,CNST_LIMB(0x4ca85ad2301c9e6d),CNST_LIMB(0x9584d6340ddf1)),
+  P(7019,CNST_LIMB(0x1b19592cd31a3943),CNST_LIMB(0x95641de84afcc)),
+  P(7027,CNST_LIMB(0x3e7aa05e6dcd81bb),CNST_LIMB(0x953893c386521)),
+  P(7039,CNST_LIMB(0x86336cecb02ba47f),CNST_LIMB(0x94f7740d87794)),
+  P(7043,CNST_LIMB(0xa96b30d0c8a44b2b),CNST_LIMB(0x94e1cb70c9ce0)),
+  P(7057,CNST_LIMB(0xb7c63fa0cfca0571),CNST_LIMB(0x94962ecbcc7ce)),
+  P(7069,CNST_LIMB(0x8eaf59b405a642b5),CNST_LIMB(0x94559c69059cf)),
+  P(7079,CNST_LIMB(0xdf29e9cbb536dc17),CNST_LIMB(0x941ff7e640716)),
+  P(7103,CNST_LIMB(0xed14132c82c1d43f),CNST_LIMB(0x939fd7a24b099)),
+  P(7109,CNST_LIMB(0xaf68778e34caab0d),CNST_LIMB(0x937ff22c014bd)),
+  P(7121,CNST_LIMB(0xa4f04a3368941d31),CNST_LIMB(0x934050872c09e)),
+  P(7127,CNST_LIMB(0xe9960969357c07e7),CNST_LIMB(0x93209446d56f6)),
+  P(7129,CNST_LIMB(0xeb47b62b7360b469),CNST_LIMB(0x9316033b5bd22)),
+  P(7151,CNST_LIMB(0x64c653d779ae730f),CNST_LIMB(0x92a22b9a79374)),
+  P(7159,CNST_LIMB(0x479702d3319915c7),CNST_LIMB(0x927838edba206)),
+  P(7177,CNST_LIMB(0xef3c3eebc6803239),CNST_LIMB(0x921a2e7112833)),
+  P(7187,CNST_LIMB(0x93807b1a2e3c0e1b),CNST_LIMB(0x91e623d5660d0)),
+  P(7193,CNST_LIMB(0x8167e33e3f478029),CNST_LIMB(0x91c6fc0cab8b6)),
+  P(7207,CNST_LIMB(0x60cb76e38c339397),CNST_LIMB(0x917e7d88028eb)),
+  P(7211,CNST_LIMB(0xae34788ffe4bc283),CNST_LIMB(0x9169d455585cd)),
+  P(7213,CNST_LIMB(0x4b6246a0c6c093a5),CNST_LIMB(0x915f81ef2d529)),
+  P(7219,CNST_LIMB(0x872e594b12b03efb),CNST_LIMB(0x9140938595d3a)),
+  P(7229,CNST_LIMB(0xbc0ae83ce9045b15),CNST_LIMB(0x910d2360a450e)),
+  P(7237,CNST_LIMB(0xad30a3917e0968d),CNST_LIMB(0x90e417104eabd)),
+  P(7243,CNST_LIMB(0x124ef5a4e1c7cd63),CNST_LIMB(0x90c55d0fdea28)),
+  P(7247,CNST_LIMB(0x5b98fe0e9fe17aaf),CNST_LIMB(0x90b0e84c04f20)),
+  P(7253,CNST_LIMB(0x414306cfe45400fd),CNST_LIMB(0x909243fac6b70)),
+  P(7283,CNST_LIMB(0xa06d1b4fd391e8bb),CNST_LIMB(0x8ff9d0440d137)),
+  P(7297,CNST_LIMB(0x11939803a60c2381),CNST_LIMB(0x8fb3192789d73)),
+  P(7307,CNST_LIMB(0x668c11cc37ea6b23),CNST_LIMB(0x8f80c0d5031e3)),
+  P(7309,CNST_LIMB(0x83f9b2089dc10645),CNST_LIMB(0x8f76b3664f164)),
+  P(7321,CNST_LIMB(0x65dc8ae47af277a9),CNST_LIMB(0x8f3a80550abc3)),
+  P(7331,CNST_LIMB(0x6e2368b9c685770b),CNST_LIMB(0x8f087c50e00c4)),
+  P(7333,CNST_LIMB(0x3ea137aeba5a6b2d),CNST_LIMB(0x8efe7fb408cc2)),
+  P(7349,CNST_LIMB(0x735f57adca48f19d),CNST_LIMB(0x8eaecce5c4fd7)),
+  P(7351,CNST_LIMB(0x69a8de0ba1b18107),CNST_LIMB(0x8ea4dccaaec0b)),
+  P(7369,CNST_LIMB(0x8fb84bdf5822bd79),CNST_LIMB(0x8e4ba9fbc2ff0)),
+  P(7393,CNST_LIMB(0xb8fab3b748562721),CNST_LIMB(0x8dd5688a3b7d6)),
+  P(7411,CNST_LIMB(0xa6c658ea10a65c3b),CNST_LIMB(0x8d7d3821fd94f)),
+  P(7417,CNST_LIMB(0xe56381f33ab5e549),CNST_LIMB(0x8d5feb03c31d7)),
+  P(7433,CNST_LIMB(0xe3c224da14988139),CNST_LIMB(0x8d12033cc9d30)),
+  P(7451,CNST_LIMB(0x438c253e6d99f513),CNST_LIMB(0x8cbac4dec6a82)),
+  P(7457,CNST_LIMB(0xc1b99f8841a3a6e1),CNST_LIMB(0x8c9dc80ab604b)),
+  P(7459,CNST_LIMB(0x63fa18c79c54fa8b),CNST_LIMB(0x8c942115dcc96)),
+  P(7477,CNST_LIMB(0xe7f6f609619d0d1d),CNST_LIMB(0x8c3d7df67b539)),
+  P(7481,CNST_LIMB(0x7b39ef3b70afc109),CNST_LIMB(0x8c2a4bc35cb3b)),
+  P(7487,CNST_LIMB(0x73922c61ca7452bf),CNST_LIMB(0x8c0d8a4f1f264)),
+  P(7489,CNST_LIMB(0x28d96828332372c1),CNST_LIMB(0x8c03f71cbf906)),
+  P(7499,CNST_LIMB(0x6b6e92968c4e8463),CNST_LIMB(0x8bd42abd9a107)),
+  P(7507,CNST_LIMB(0x571861f084962edb),CNST_LIMB(0x8bae051d7f6ff)),
+  P(7517,CNST_LIMB(0xd935c64f140f1ef5),CNST_LIMB(0x8b7e735068135)),
+  P(7523,CNST_LIMB(0x96459f8fd72a4c4b),CNST_LIMB(0x8b61f82c5fb08)),
+  P(7529,CNST_LIMB(0x410ba9a2a18242d9),CNST_LIMB(0x8b4588a74a05a)),
+  P(7537,CNST_LIMB(0xcf90979f89870391),CNST_LIMB(0x8b1fb0a7ed403)),
+  P(7541,CNST_LIMB(0x10f94ff26bc00add),CNST_LIMB(0x8b0ccc5d8f5c8)),
+  P(7547,CNST_LIMB(0xa6619fbb9da139b3),CNST_LIMB(0x8af07f8ac5146)),
+  P(7549,CNST_LIMB(0x765a23334efb03d5),CNST_LIMB(0x8ae71328ffd49)),
+  P(7559,CNST_LIMB(0x6f2f613b5e631837),CNST_LIMB(0x8ab8086624822)),
+  P(7561,CNST_LIMB(0x666b99bfbcd368b9),CNST_LIMB(0x8aaea3ab5ae89)),
+  P(7573,CNST_LIMB(0x922b78eb01ed45bd),CNST_LIMB(0x8a7661f7020fe)),
+  P(7577,CNST_LIMB(0x7079a199c31de6a9),CNST_LIMB(0x8a63ab88aa8dd)),
+  P(7583,CNST_LIMB(0xa181abcda167be5f),CNST_LIMB(0x8a47a35d020f3)),
+  P(7589,CNST_LIMB(0x2f6dbbcab3a9822d),CNST_LIMB(0x8a2ba68a3cebf)),
+  P(7591,CNST_LIMB(0xc5a83ff0e43eba17),CNST_LIMB(0x8a2254c852497)),
+  P(7603,CNST_LIMB(0x28c68613dda7d97b),CNST_LIMB(0x89ea849898bb3)),
+  P(7607,CNST_LIMB(0x5cf33ed49efa5007),CNST_LIMB(0x89d7f3e285109)),
+  P(7621,CNST_LIMB(0x9125fdead661590d),CNST_LIMB(0x899720af36739)),
+  P(7639,CNST_LIMB(0xaee67f478c7325e7),CNST_LIMB(0x89442160d11dc)),
+  P(7643,CNST_LIMB(0x735b1274a0e89653),CNST_LIMB(0x8931bd5875a22)),
+  P(7649,CNST_LIMB(0x733b56eae1a4e621),CNST_LIMB(0x891630877aedf)),
+  P(7669,CNST_LIMB(0x1944ffb316ffe65d),CNST_LIMB(0x88baaad83e38f)),
+  P(7673,CNST_LIMB(0xf26bc3cfd2a01449),CNST_LIMB(0x88a86b9090aa4)),
+  P(7681,CNST_LIMB(0xb5827ba68b83e201),CNST_LIMB(0x8883fb99bf244)),
+  P(7687,CNST_LIMB(0xac139507e48eefb7),CNST_LIMB(0x8868b45e727ee)),
+  P(7691,CNST_LIMB(0xeb7676b25834fda3),CNST_LIMB(0x88568aef30d47)),
+  P(7699,CNST_LIMB(0xad898f4763da5c1b),CNST_LIMB(0x8832468f0bcdd)),
+  P(7703,CNST_LIMB(0xea906f224398f9a7),CNST_LIMB(0x88202b9a4df76)),
+  P(7717,CNST_LIMB(0xa8aff3caca28cdad),CNST_LIMB(0x87e0f31872e9b)),
+  P(7723,CNST_LIMB(0x46c53aa36b19b083),CNST_LIMB(0x87c5ecd731f42)),
+  P(7727,CNST_LIMB(0x9ada32b09603e8cf),CNST_LIMB(0x87b3eea3bb388)),
+  P(7741,CNST_LIMB(0xd31f842ef5d8e915),CNST_LIMB(0x87751a6c67d78)),
+  P(7753,CNST_LIMB(0x6124af44730a33f9),CNST_LIMB(0x873f6e2f9d34a)),
+  P(7757,CNST_LIMB(0x828ec4c2b6e64a85),CNST_LIMB(0x872d938dcfc01)),
+  P(7759,CNST_LIMB(0x3d6f49df999638af),CNST_LIMB(0x8724a80151dba)),
+  P(7789,CNST_LIMB(0x7641460a0ea89b65),CNST_LIMB(0x869f677f6cc1a)),
+  P(7793,CNST_LIMB(0x97703f98fb7fe291),CNST_LIMB(0x868db701df58d)),
+  P(7817,CNST_LIMB(0xd343c209e3e6b7b9),CNST_LIMB(0x8623f563a7d6d)),
+  P(7823,CNST_LIMB(0x4e5fc01f6a41406f),CNST_LIMB(0x86099ef0c8886)),
+  P(7829,CNST_LIMB(0xb78a05b08aa4bcbd),CNST_LIMB(0x85ef52d38fe87)),
+  P(7841,CNST_LIMB(0x3434a14919d34561),CNST_LIMB(0x85bad981c7847)),
+  P(7853,CNST_LIMB(0xccead7dee120f525),CNST_LIMB(0x8586893de7cfc)),
+  P(7867,CNST_LIMB(0xe1375a2bccd87673),CNST_LIMB(0x8549b491e9efe)),
+  P(7873,CNST_LIMB(0xf727d51420a57141),CNST_LIMB(0x852fb3859bea4)),
+  P(7877,CNST_LIMB(0x2c3b68cfbcebb00d),CNST_LIMB(0x851e631fc08f8)),
+  P(7879,CNST_LIMB(0xda91e2f3e17542f7),CNST_LIMB(0x8515bc9cde5f1)),
+  P(7883,CNST_LIMB(0xb55f6100ae95d6e3),CNST_LIMB(0x850472f6185b3)),
+  P(7901,CNST_LIMB(0x6a0c608e0bbaa975),CNST_LIMB(0x84b6defbc166b)),
+  P(7907,CNST_LIMB(0xac5f2fc151c016cb),CNST_LIMB(0x849d17159854b)),
+  P(7919,CNST_LIMB(0xb1e5af8146e4d00f),CNST_LIMB(0x8469a54a20645)),
+  P(7927,CNST_LIMB(0x6e283d3b112602c7),CNST_LIMB(0x84476f9401ade)),
+  P(7933,CNST_LIMB(0xf9a48bcb76c96e55),CNST_LIMB(0x842dd2e2dc25d)),
+  P(7937,CNST_LIMB(0xa776780ca4c0e101),CNST_LIMB(0x841cc543f58cb)),
+#define SMALLEST_OMITTED_PRIME 7949
+#endif
+#ifdef WANT_ptab
+  {CNST_LIMB(0x444437fed9a2349),{CNST_LIMB(0xe00056482545e92a),5,CNST_LIMB(0x2e044fdfbae4),CNST_LIMB(0x2c8f9615733fe6),CNST_LIMB(0x15319a745d44889),CNST_LIMB(0x30314bfee31fe08),CNST_LIMB(0x213845b5eb1d02b)},0,14},
+  {CNST_LIMB(0x34091fa96ffdf47b),{CNST_LIMB(0x3adc72bf62f96a49),2,CNST_LIMB(0x2fdb815a40082e14),CNST_LIMB(0xa2fb4713ee182be),CNST_LIMB(0x6691fcc7a3042b5),CNST_LIMB(0xd7baca281bd7bfe),CNST_LIMB(0x31645ad7700b6fe1)},14,10},
+  {CNST_LIMB(0x3c47d8d728a77ebb),{CNST_LIMB(0xfcb9aee19f3d0ca),2,CNST_LIMB(0xee09ca35d620514),CNST_LIMB(0x25e3c1639f7dc597),CNST_LIMB(0x176f977d1145f08f),CNST_LIMB(0x4a431b566c292ba),CNST_LIMB(0x100ae9d9482d6937)},24,9},
+  {CNST_LIMB(0x77ab7da9d709ea9),{CNST_LIMB(0x11d1e7012ab3aa25),5,CNST_LIMB(0x1b394f7170aed8e),CNST_LIMB(0x546efaf8f3107d0),CNST_LIMB(0x42ed2efa9db39d8),CNST_LIMB(0xcf1c08fc6f825e),CNST_LIMB(0x252dd3fc3932c60)},33,8},
+  {CNST_LIMB(0x310df3e7bd4bc897),{CNST_LIMB(0x4dfeef7ace095886),2,CNST_LIMB(0xaba3c794d85150d),CNST_LIMB(0x17a7ea757afc9b41),CNST_LIMB(0x27386bf8f31e3ba7),CNST_LIMB(0x14f913784ca1b09a),CNST_LIMB(0x19a5850266378808)},41,8},
+  {CNST_LIMB(0xd997f089e8af1f),{CNST_LIMB(0x2d2f79839e6b7329),8,CNST_LIMB(0x285a2dd96a188d),CNST_LIMB(0x334ffbd384a516),CNST_LIMB(0xd9f5c4d959d8c),CNST_LIMB(0x1a7b0c8f9e2a8),CNST_LIMB(0x51d4df5ea86eca)},49,7},
+  {CNST_LIMB(0x2514ab8fece6d79),{CNST_LIMB(0xb9d8ba8530d526d2),6,CNST_LIMB(0x111e482834cf602),CNST_LIMB(0x2099b9b4399ea77),CNST_LIMB(0xa7e65453d2c58b),CNST_LIMB(0x1543e97a71ba902),CNST_LIMB(0x13c9258fa65ea5c)},56,7},
+  {CNST_LIMB(0x690efbefde431f9),{CNST_LIMB(0x37e6fe9321e30a89),5,CNST_LIMB(0x67c69a65020950a),CNST_LIMB(0x3d4da34fd3fb29d),CNST_LIMB(0x4481530580bf270),CNST_LIMB(0x53418b541a702fb),CNST_LIMB(0x5a63ba140615695)},63,7},
+  {CNST_LIMB(0xf49e199a5f2f371),{CNST_LIMB(0xbe97cf50195e4cf),4,CNST_LIMB(0xb61e665a0d0c8f0),CNST_LIMB(0x12404319392532e),CNST_LIMB(0xc11fa27489010aa),CNST_LIMB(0x9486cdb3a063f1d),CNST_LIMB(0x90fb58fe1716f29)},70,7},
+  {CNST_LIMB(0x20e4ce7eee0a5edf),{CNST_LIMB(0xf216910d87cce9ec),2,CNST_LIMB(0x19be5a877db767e7),CNST_LIMB(0x14174edbad8e4db0),CNST_LIMB(0x13aa47a54ebc0ab3),CNST_LIMB(0x34e03d849eed1a0),CNST_LIMB(0x1c348c675b2b87a9)},77,7},
+  {CNST_LIMB(0x3c3b299a83e166e5),{CNST_LIMB(0x1004d8385b0845e0),2,CNST_LIMB(0xf135995f07a646c),CNST_LIMB(0x39f996f3e7c62cb6),CNST_LIMB(0x10e385c8b908ec46),CNST_LIMB(0x108780c61cd93a1),CNST_LIMB(0xece590a749ce9e6)},84,7},
+  {CNST_LIMB(0x7385117dabf89767),{CNST_LIMB(0x1ba83180cf48fd02),1,CNST_LIMB(0x18f5dd04a80ed132),CNST_LIMB(0x134aacf48cf374fd),CNST_LIMB(0x5f5e8ab304a603e1),CNST_LIMB(0x8196d4d84952f0b),CNST_LIMB(0x27fbce261e06981)},91,7},
+  {CNST_LIMB(0x6b1dd94152d113),{CNST_LIMB(0x31e8de86cb665558),9,CNST_LIMB(0x57c2791756ffa7),CNST_LIMB(0x155d1b6359e72e),CNST_LIMB(0x26e2dd434311d6),CNST_LIMB(0x2d6624583bf57f),CNST_LIMB(0x4b3c0311592466)},98,6},
+  {CNST_LIMB(0x9bed1488742f9b),{CNST_LIMB(0xa44d3b1c6d785d44),8,CNST_LIMB(0x2f0a502161e5b4),CNST_LIMB(0x9197cc3e5a5b04),CNST_LIMB(0x58ecad625341f6),CNST_LIMB(0x2c8e81222f4972),CNST_LIMB(0x1f80904334e61e)},104,6},
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+  {CNST_LIMB(0xad0c05b3ae661),{CNST_LIMB(0x7ab7cf1782b58dcf),12,CNST_LIMB(0x54750c4f56635),CNST_LIMB(0x2eac67167559c),CNST_LIMB(0x563c222f2aff7),CNST_LIMB(0x7b738313b7ac1),CNST_LIMB(0x65d997bccd9d9)},938,4},
+  {CNST_LIMB(0xb0da5211cc3e7),{CNST_LIMB(0x72916ab867f7595c),12,CNST_LIMB(0xfa941ccadf01),CNST_LIMB(0x8d756d36295ea),CNST_LIMB(0x4f9f479e132fd),CNST_LIMB(0x18526df562fde),CNST_LIMB(0x434f07e1d9d33)},942,4},
+  {CNST_LIMB(0xb36ca8c3991af),{CNST_LIMB(0x6d41bd767e129ba0),12,CNST_LIMB(0x13836edce5114),CNST_LIMB(0xa52c71bc138ab),CNST_LIMB(0x339d5f264e899),CNST_LIMB(0x65473fc2cfa57),CNST_LIMB(0x4714fd9da5ac0)},946,4},
+  {CNST_LIMB(0xb6694790c60df),{CNST_LIMB(0x6746add17a9a2fee),12,CNST_LIMB(0x4c2521610f0f4),CNST_LIMB(0x1ef55755cab96),CNST_LIMB(0x3bb413c494cbb),CNST_LIMB(0x59bedca68abba),CNST_LIMB(0x618c95ba5598b)},950,4},
+  {CNST_LIMB(0xb89a345c48d7d),{CNST_LIMB(0x6302ff6c309d06ee),12,CNST_LIMB(0x2296406fcba90),CNST_LIMB(0x4d697f4e83909),CNST_LIMB(0xa16067eedb775),CNST_LIMB(0xa50f824607f2b),CNST_LIMB(0x3d3946b54c9f9)},954,4},
+  {CNST_LIMB(0xbb02a8b8a132b),{CNST_LIMB(0x5e70bfded3b337fc),12,CNST_LIMB(0x8c29c2d62d33),CNST_LIMB(0x3f082e296ef8f),CNST_LIMB(0x49afe57a19b90),CNST_LIMB(0xb7bd5be58da15),CNST_LIMB(0x8de61bd7e627f)},958,4},
+  {CNST_LIMB(0xbd6468bb171ff),{CNST_LIMB(0x5a0880d51b052fd7),12,CNST_LIMB(0x64a7322bed5a0),CNST_LIMB(0x3f94ed2b89267),CNST_LIMB(0x980b9bde44b2d),CNST_LIMB(0x4a6676c0e7d13),CNST_LIMB(0xb24baad1f0c40)},962,4},
+  {CNST_LIMB(0xc17671b548641),{CNST_LIMB(0x52c0b00a813a011e),12,CNST_LIMB(0x85095e7597d4),CNST_LIMB(0x55524352a702c),CNST_LIMB(0x868164742fab5),CNST_LIMB(0x3b3bcfdffb2cf),CNST_LIMB(0xab11b067d542f)},966,4},
+  {CNST_LIMB(0xc57f07d496e1b),{CNST_LIMB(0x4bd58ed22f4b2aac),12,CNST_LIMB(0x449a9c42f9a11),CNST_LIMB(0x2b9c2279a88de),CNST_LIMB(0xa905cf41733e1),CNST_LIMB(0x206b2bfa8b896),CNST_LIMB(0xb378d16c66efd)},970,4},
+  {CNST_LIMB(0xc814b88200ac3),{CNST_LIMB(0x478c251716699c98),12,CNST_LIMB(0x97df5b023b898),CNST_LIMB(0x5507d796eedc1),CNST_LIMB(0xb4a34312d58e3),CNST_LIMB(0x4324fc6d4f6f2),CNST_LIMB(0x29d3a7f3d88da)},974,4},
+  {CNST_LIMB(0xcb958ba8e9259),{CNST_LIMB(0x41e93d5390ce4a3c),12,CNST_LIMB(0x75906ffdbe592),CNST_LIMB(0x35d1e8b619b02),CNST_LIMB(0x5535c122a3ba7),CNST_LIMB(0xb2c9d287f29c8),CNST_LIMB(0x7f9a7f1adf9d9)},978,4},
+  {CNST_LIMB(0xcfaa956d67517),{CNST_LIMB(0x3b9549c76b39f2a8),12,CNST_LIMB(0x44a2e5454ad61),CNST_LIMB(0xa8d0541bab05b),CNST_LIMB(0x801e8693083d4),CNST_LIMB(0xc17c6af57bddf),CNST_LIMB(0xc7b4d9a0870d9)},982,4},
+  {CNST_LIMB(0xd56380a0e8273),{CNST_LIMB(0x331ecd3feca3d608),12,CNST_LIMB(0xc5686ff8a7efd),CNST_LIMB(0x61e35c54a4f3f),CNST_LIMB(0x4bf5dc73ede0f),CNST_LIMB(0x2bf7f029f09a5),CNST_LIMB(0x718dc3463c882)},986,4},
+  {CNST_LIMB(0xd9c8b65d94f5b),{CNST_LIMB(0x2cec062e71d179c4),12,CNST_LIMB(0xa3aaac38dbec6),CNST_LIMB(0x78cabf09fa56c),CNST_LIMB(0xcaf0fccc6b30b),CNST_LIMB(0xce30344eb1fac),CNST_LIMB(0x4ba46e5575b11)},990,4},
+  {CNST_LIMB(0xdc90a482debcb),{CNST_LIMB(0x2920b89d6fc02e7f),12,CNST_LIMB(0x9f0f9b3b403a),CNST_LIMB(0x619327b332542),CNST_LIMB(0xa75eae1f8ff9f),CNST_LIMB(0x62350a1cba491),CNST_LIMB(0x22ac2e8eb19f9)},994,4},
+  {CNST_LIMB(0xe0ac9922e6235),{CNST_LIMB(0x23b187206556b5c4),12,CNST_LIMB(0x157440c67a3c9),CNST_LIMB(0x696b5be3cc464),CNST_LIMB(0x2ebcde890e790),CNST_LIMB(0xae767f93832de),CNST_LIMB(0xcb1eade2d80a8)},998,4}
+#endif
author	polwex <polwex@sortug.com>	2025-10-05 21:56:51 +0700
committer	polwex <polwex@sortug.com>	2025-10-05 21:56:51 +0700
commit	fcedfddf00b3f994e4f4e40332ac7fc192c63244 (patch)
tree	51d38e62c7bdfcc5f9a5e9435fe820c93cfc9a3d /vere/ext/gmp/gen/x86_64-macos