diff options
| author | polwex <polwex@sortug.com> | 2025-10-05 21:56:51 +0700 |
|---|---|---|
| committer | polwex <polwex@sortug.com> | 2025-10-05 21:56:51 +0700 |
| commit | fcedfddf00b3f994e4f4e40332ac7fc192c63244 (patch) | |
| tree | 51d38e62c7bdfcc5f9a5e9435fe820c93cfc9a3d /vere/ext/nasm/x86/insnsa.c | |
claude is gud
Diffstat (limited to 'vere/ext/nasm/x86/insnsa.c')
| -rw-r--r-- | vere/ext/nasm/x86/insnsa.c | 19532 |
1 files changed, 19532 insertions, 0 deletions
diff --git a/vere/ext/nasm/x86/insnsa.c b/vere/ext/nasm/x86/insnsa.c new file mode 100644 index 0000000..668ac07 --- /dev/null +++ b/vere/ext/nasm/x86/insnsa.c @@ -0,0 +1,19532 @@ +/* This file auto-generated from insns.dat by insns.pl - don't edit it */ + +#include "nasm.h" +#include "insns.h" + +static const struct itemplate instrux_DB[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DW[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DD[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DQ[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DT[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DO[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DY[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_DZ[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESB[] = { + {I_RESB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESW[] = { + {I_RESW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESD[] = { + {I_RESD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESQ[] = { + {I_RESQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_REST[] = { + {I_REST, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESO[] = { + {I_RESO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESY[] = { + {I_RESY, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RESZ[] = { + {I_RESZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49325, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INCBIN[] = { + ITEMPLATE_END +}; + +static const struct itemplate instrux_AAA[] = { + {I_AAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50187, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AAD[] = { + {I_AAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49187, 1}, + {I_AAD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49191, 2}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AAM[] = { + {I_AAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49195, 1}, + {I_AAM, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49199, 2}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AAS[] = { + {I_AAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50190, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADC[] = { + {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47247, 3}, + {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47248, 0}, + {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42741, 3}, + {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42742, 0}, + {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42747, 4}, + {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42748, 5}, + {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42753, 6}, + {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42754, 7}, + {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+36381, 8}, + {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+36381, 0}, + {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47252, 8}, + {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47252, 0}, + {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47257, 9}, + {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47257, 5}, + {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47262, 10}, + {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47262, 7}, + {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 11}, + {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32871, 12}, + {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32878, 13}, + {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49203, 8}, + {I_ADC, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32865, 8}, + {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47267, 8}, + {I_ADC, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32872, 9}, + {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47272, 9}, + {I_ADC, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32879, 10}, + {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47277, 10}, + {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42759, 3}, + {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 3}, + {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32885, 3}, + {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32871, 4}, + {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32892, 4}, + {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32878, 6}, + {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32899, 6}, + {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42759, 3}, + {I_ADC, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32864, 3}, + {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32885, 3}, + {I_ADC, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32871, 4}, + {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32892, 4}, + {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42765, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADD[] = { + {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47282, 3}, + {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47283, 0}, + {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42771, 3}, + {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42772, 0}, + {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42777, 4}, + {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42778, 5}, + {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42783, 6}, + {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42784, 7}, + {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40154, 8}, + {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40154, 0}, + {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47287, 8}, + {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47287, 0}, + {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47292, 9}, + {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47292, 5}, + {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47297, 10}, + {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47297, 7}, + {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32906, 11}, + {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32913, 12}, + {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32920, 13}, + {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49207, 8}, + {I_ADD, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32907, 8}, + {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47302, 8}, + {I_ADD, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32914, 9}, + {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47307, 9}, + {I_ADD, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32921, 10}, + {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47312, 10}, + {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42789, 3}, + {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32906, 3}, + {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32927, 3}, + {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32913, 4}, + {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32934, 4}, + {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32920, 6}, + {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32941, 6}, + {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42789, 3}, + {I_ADD, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32906, 3}, + {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32927, 3}, + {I_ADD, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32913, 4}, + {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32934, 4}, + {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42795, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AND[] = { + {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47317, 3}, + {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47318, 0}, + {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42801, 3}, + {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42802, 0}, + {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42807, 4}, + {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42808, 5}, + {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42813, 6}, + {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42814, 7}, + {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40434, 8}, + {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40434, 0}, + {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47322, 8}, + {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47322, 0}, + {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47327, 9}, + {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47327, 5}, + {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47332, 10}, + {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47332, 7}, + {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32948, 11}, + {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32955, 12}, + {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+32962, 13}, + {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49211, 8}, + {I_AND, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32949, 8}, + {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47337, 8}, + {I_AND, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32956, 9}, + {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47342, 9}, + {I_AND, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32963, 10}, + {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47347, 10}, + {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42819, 3}, + {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32948, 3}, + {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32969, 3}, + {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32955, 4}, + {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32976, 4}, + {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+32962, 6}, + {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+32983, 6}, + {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42819, 3}, + {I_AND, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32948, 3}, + {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32969, 3}, + {I_AND, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32955, 4}, + {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32976, 4}, + {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42825, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ARPL[] = { + {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29252, 15}, + {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29252, 16}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BB0_RESET[] = { + {I_BB0_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49215, 17}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BB1_RESET[] = { + {I_BB1_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49219, 17}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BOUND[] = { + {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47352, 18}, + {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47357, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BSF[] = { + {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+32990, 9}, + {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+32990, 5}, + {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+32997, 9}, + {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32997, 5}, + {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33004, 10}, + {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33004, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BSR[] = { + {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33011, 9}, + {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33011, 5}, + {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33018, 9}, + {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33018, 5}, + {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33025, 10}, + {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33025, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BSWAP[] = { + {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42831, 20}, + {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42837, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BT[] = { + {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42843, 9}, + {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42843, 5}, + {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42849, 9}, + {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42849, 5}, + {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42855, 10}, + {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42855, 7}, + {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33032, 5}, + {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33039, 5}, + {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33046, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BTC[] = { + {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33053, 4}, + {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33054, 5}, + {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33060, 4}, + {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33061, 5}, + {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33067, 6}, + {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33068, 7}, + {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12304, 12}, + {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12312, 12}, + {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12320, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BTR[] = { + {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33074, 4}, + {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33075, 5}, + {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33081, 4}, + {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33082, 5}, + {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33088, 6}, + {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33089, 7}, + {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12328, 12}, + {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12336, 12}, + {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12344, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BTS[] = { + {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33095, 4}, + {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33096, 5}, + {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33102, 4}, + {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33103, 5}, + {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33109, 6}, + {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33110, 7}, + {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12352, 12}, + {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12360, 12}, + {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12368, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CALL[] = { + {I_CALL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47362, 21}, + {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47362, 21}, + {I_CALL, 1, {IMMEDIATE|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42861, 1}, + {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47367, 22}, + {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47367, 22}, + {I_CALL, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42867, 1}, + {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47372, 23}, + {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47372, 23}, + {I_CALL, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42873, 19}, + {I_CALL, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47377, 24}, + {I_CALL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47377, 24}, + {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42879, 1}, + {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42885, 1}, + {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42885, 1}, + {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42891, 19}, + {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42891, 19}, + {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47382, 1}, + {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47387, 7}, + {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47392, 0}, + {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47397, 5}, + {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47387, 7}, + {I_CALL, 1, {MEMORY|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47402, 21}, + {I_CALL, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47407, 22}, + {I_CALL, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47412, 23}, + {I_CALL, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47417, 24}, + {I_CALL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47402, 21}, + {I_CALL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47407, 22}, + {I_CALL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47412, 23}, + {I_CALL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47417, 24}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CBW[] = { + {I_CBW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49223, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CDQ[] = { + {I_CDQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49227, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CDQE[] = { + {I_CDQE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49231, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLC[] = { + {I_CLC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48819, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLD[] = { + {I_CLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45984, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLI[] = { + {I_CLI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48134, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLTS[] = { + {I_CLTS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49235, 25}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMC[] = { + {I_CMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50193, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMP[] = { + {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49239, 8}, + {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49239, 0}, + {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47422, 8}, + {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47422, 0}, + {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47427, 9}, + {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47427, 5}, + {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47432, 10}, + {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47432, 7}, + {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40392, 8}, + {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40392, 0}, + {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47437, 8}, + {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+47437, 0}, + {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47442, 9}, + {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+47442, 5}, + {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+47447, 10}, + {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+47447, 7}, + {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42897, 0}, + {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42903, 5}, + {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42909, 7}, + {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49243, 8}, + {I_CMP, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42897, 8}, + {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47452, 8}, + {I_CMP, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42903, 9}, + {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47457, 9}, + {I_CMP, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42909, 10}, + {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47462, 10}, + {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47467, 8}, + {I_CMP, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42897, 8}, + {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42915, 8}, + {I_CMP, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42903, 9}, + {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42921, 9}, + {I_CMP, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+42909, 10}, + {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+42927, 10}, + {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47467, 8}, + {I_CMP, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42897, 8}, + {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42915, 8}, + {I_CMP, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42903, 9}, + {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42921, 9}, + {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47472, 26}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSB[] = { + {I_CMPSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49247, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSD[] = { + {I_CMPSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47477, 5}, + {I_CMPSD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34292, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSQ[] = { + {I_CMPSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47482, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSW[] = { + {I_CMPSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47487, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPXCHG[] = { + {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42933, 27}, + {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42934, 28}, + {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33116, 27}, + {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33117, 28}, + {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33123, 27}, + {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33124, 28}, + {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33130, 6}, + {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33131, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPXCHG486[] = { + {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47492, 29}, + {I_CMPXCHG486, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+47492, 30}, + {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42939, 29}, + {I_CMPXCHG486, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42939, 30}, + {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42945, 29}, + {I_CMPXCHG486, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42945, 30}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPXCHG8B[] = { + {I_CMPXCHG8B, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33137, 31}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPXCHG16B[] = { + {I_CMPXCHG16B, 1, {MEMORY|BITS128,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42951, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CPUID[] = { + {I_CPUID, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49251, 28}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CPU_READ[] = { + {I_CPU_READ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49255, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CPU_WRITE[] = { + {I_CPU_WRITE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49259, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CQO[] = { + {I_CQO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49263, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CWD[] = { + {I_CWD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49267, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CWDE[] = { + {I_CWDE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49271, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DAA[] = { + {I_DAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50196, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DAS[] = { + {I_DAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50199, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DEC[] = { + {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49275, 1}, + {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49279, 19}, + {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47497, 11}, + {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42957, 11}, + {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42963, 12}, + {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42969, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DIV[] = { + {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49283, 0}, + {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47502, 0}, + {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47507, 5}, + {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47512, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DMINT[] = { + {I_DMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49287, 33}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_EMMS[] = { + {I_EMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49291, 34}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENTER[] = { + {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47517, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_EQU[] = { + {I_EQU, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50228, 0}, + {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50228, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_F2XM1[] = { + {I_F2XM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49295, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FABS[] = { + {I_FABS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49299, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FADD[] = { + {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49303, 36}, + {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49307, 36}, + {I_FADD, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47522, 36}, + {I_FADD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47527, 36}, + {I_FADD, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47522, 36}, + {I_FADD, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47532, 36}, + {I_FADD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49311, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FADDP[] = { + {I_FADDP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47537, 36}, + {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47537, 36}, + {I_FADDP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49311, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FBLD[] = { + {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49315, 36}, + {I_FBLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49315, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FBSTP[] = { + {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49319, 36}, + {I_FBSTP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49319, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCHS[] = { + {I_FCHS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49323, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCLEX[] = { + {I_FCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47542, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVB[] = { + {I_FCMOVB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47547, 37}, + {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47552, 37}, + {I_FCMOVB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49327, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVBE[] = { + {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47557, 37}, + {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47562, 37}, + {I_FCMOVBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49331, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVE[] = { + {I_FCMOVE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47567, 37}, + {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47572, 37}, + {I_FCMOVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49335, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVNB[] = { + {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47577, 37}, + {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47582, 37}, + {I_FCMOVNB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49339, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVNBE[] = { + {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47587, 37}, + {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47592, 37}, + {I_FCMOVNBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49343, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVNE[] = { + {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47597, 37}, + {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47602, 37}, + {I_FCMOVNE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49347, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVNU[] = { + {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47607, 37}, + {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47612, 37}, + {I_FCMOVNU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49351, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCMOVU[] = { + {I_FCMOVU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47617, 37}, + {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47622, 37}, + {I_FCMOVU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49355, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOM[] = { + {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49359, 36}, + {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49363, 36}, + {I_FCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47627, 36}, + {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47632, 36}, + {I_FCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49367, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOMI[] = { + {I_FCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47637, 37}, + {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47642, 37}, + {I_FCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49371, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOMIP[] = { + {I_FCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47647, 37}, + {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47652, 37}, + {I_FCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49375, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOMP[] = { + {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49379, 36}, + {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49383, 36}, + {I_FCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47657, 36}, + {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47662, 36}, + {I_FCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49387, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOMPP[] = { + {I_FCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49391, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FCOS[] = { + {I_FCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49395, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDECSTP[] = { + {I_FDECSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49399, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDISI[] = { + {I_FDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47667, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDIV[] = { + {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49403, 36}, + {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49407, 36}, + {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47672, 36}, + {I_FDIV, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47677, 36}, + {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47672, 36}, + {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47682, 36}, + {I_FDIV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49411, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDIVP[] = { + {I_FDIVP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47687, 36}, + {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47687, 36}, + {I_FDIVP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49411, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDIVR[] = { + {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49415, 36}, + {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49419, 36}, + {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47692, 36}, + {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47692, 36}, + {I_FDIVR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47697, 36}, + {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47702, 36}, + {I_FDIVR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49423, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FDIVRP[] = { + {I_FDIVRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47707, 36}, + {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47707, 36}, + {I_FDIVRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49423, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FEMMS[] = { + {I_FEMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49427, 39}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FENI[] = { + {I_FENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47712, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FFREE[] = { + {I_FFREE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47717, 36}, + {I_FFREE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49431, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FFREEP[] = { + {I_FFREEP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47722, 40}, + {I_FFREEP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49435, 40}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FIADD[] = { + {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49439, 36}, + {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49443, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FICOM[] = { + {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49447, 36}, + {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49451, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FICOMP[] = { + {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49455, 36}, + {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49459, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FIDIV[] = { + {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49463, 36}, + {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49467, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FIDIVR[] = { + {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49471, 36}, + {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49475, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FILD[] = { + {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49479, 36}, + {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49483, 36}, + {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49487, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FIMUL[] = { + {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49491, 36}, + {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49495, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FINCSTP[] = { + {I_FINCSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49499, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FINIT[] = { + {I_FINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47727, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FIST[] = { + {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49503, 36}, + {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49507, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FISTP[] = { + {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49511, 36}, + {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49515, 36}, + {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49519, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FISTTP[] = { + {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49523, 41}, + {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49527, 41}, + {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49531, 41}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FISUB[] = { + {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49535, 36}, + {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49539, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FISUBR[] = { + {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49543, 36}, + {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49547, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLD[] = { + {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49551, 36}, + {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49555, 36}, + {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49559, 36}, + {I_FLD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47732, 36}, + {I_FLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49563, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLD1[] = { + {I_FLD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49567, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDCW[] = { + {I_FLDCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49571, 42}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDENV[] = { + {I_FLDENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49575, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDL2E[] = { + {I_FLDL2E, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49579, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDL2T[] = { + {I_FLDL2T, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49583, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDLG2[] = { + {I_FLDLG2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49587, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDLN2[] = { + {I_FLDLN2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49591, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDPI[] = { + {I_FLDPI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49595, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FLDZ[] = { + {I_FLDZ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49599, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FMUL[] = { + {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49603, 36}, + {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49607, 36}, + {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47737, 36}, + {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47737, 36}, + {I_FMUL, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47742, 36}, + {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47747, 36}, + {I_FMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49611, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FMULP[] = { + {I_FMULP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47752, 36}, + {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47752, 36}, + {I_FMULP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49611, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNCLEX[] = { + {I_FNCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47543, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNDISI[] = { + {I_FNDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47668, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNENI[] = { + {I_FNENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47713, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNINIT[] = { + {I_FNINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47728, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNOP[] = { + {I_FNOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49615, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNSAVE[] = { + {I_FNSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47758, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNSTCW[] = { + {I_FNSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47768, 42}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNSTENV[] = { + {I_FNSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47773, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FNSTSW[] = { + {I_FNSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47783, 42}, + {I_FNSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47788, 43}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FPATAN[] = { + {I_FPATAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49619, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FPREM[] = { + {I_FPREM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49623, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FPREM1[] = { + {I_FPREM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49627, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FPTAN[] = { + {I_FPTAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49631, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FRNDINT[] = { + {I_FRNDINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49635, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FRSTOR[] = { + {I_FRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49639, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSAVE[] = { + {I_FSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47757, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSCALE[] = { + {I_FSCALE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49643, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSETPM[] = { + {I_FSETPM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49647, 43}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSIN[] = { + {I_FSIN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49651, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSINCOS[] = { + {I_FSINCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49655, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSQRT[] = { + {I_FSQRT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49659, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FST[] = { + {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49663, 36}, + {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49667, 36}, + {I_FST, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47762, 36}, + {I_FST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49671, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSTCW[] = { + {I_FSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47767, 42}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSTENV[] = { + {I_FSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47772, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSTP[] = { + {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49675, 36}, + {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49679, 36}, + {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49683, 36}, + {I_FSTP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47777, 36}, + {I_FSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49687, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSTSW[] = { + {I_FSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47782, 42}, + {I_FSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47787, 43}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSUB[] = { + {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49691, 36}, + {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49695, 36}, + {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47792, 36}, + {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47792, 36}, + {I_FSUB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47797, 36}, + {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47802, 36}, + {I_FSUB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49699, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSUBP[] = { + {I_FSUBP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47807, 36}, + {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47807, 36}, + {I_FSUBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49699, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSUBR[] = { + {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49703, 36}, + {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49707, 36}, + {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47812, 36}, + {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47812, 36}, + {I_FSUBR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47817, 36}, + {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47822, 36}, + {I_FSUBR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49711, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FSUBRP[] = { + {I_FSUBRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47827, 36}, + {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47827, 36}, + {I_FSUBRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49711, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FTST[] = { + {I_FTST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49715, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FUCOM[] = { + {I_FUCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47832, 38}, + {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47837, 38}, + {I_FUCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49719, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FUCOMI[] = { + {I_FUCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47842, 37}, + {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47847, 37}, + {I_FUCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49723, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FUCOMIP[] = { + {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47852, 37}, + {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47857, 37}, + {I_FUCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49727, 37}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FUCOMP[] = { + {I_FUCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47862, 38}, + {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47867, 38}, + {I_FUCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49731, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FUCOMPP[] = { + {I_FUCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49735, 38}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXAM[] = { + {I_FXAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49739, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXCH[] = { + {I_FXCH, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47872, 36}, + {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47872, 36}, + {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+47877, 36}, + {I_FXCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49743, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXTRACT[] = { + {I_FXTRACT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49747, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FYL2X[] = { + {I_FYL2X, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49751, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FYL2XP1[] = { + {I_FYL2XP1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49755, 36}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HLT[] = { + {I_HLT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50202, 44}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IBTS[] = { + {I_IBTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42939, 45}, + {I_IBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42939, 46}, + {I_IBTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42945, 47}, + {I_IBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42945, 46}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ICEBP[] = { + {I_ICEBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IDIV[] = { + {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49759, 0}, + {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47882, 0}, + {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47887, 5}, + {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47892, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IMUL[] = { + {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49763, 0}, + {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47897, 0}, + {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47902, 5}, + {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47907, 7}, + {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42975, 9}, + {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42975, 5}, + {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42981, 9}, + {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42981, 5}, + {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42987, 10}, + {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42987, 7}, + {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+42993, 48}, + {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,SBYTEWORD,0,0}, NO_DECORATOR, nasm_bytecodes+42993, 49}, + {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+42999, 49}, + {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+42999, 49}, + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+42993, 35}, + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,SBYTEWORD,0,0}, NO_DECORATOR, nasm_bytecodes+42993, 49}, + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+42999, 35}, + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+42999, 49}, + {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43005, 50}, + {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43005, 9}, + {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43011, 9}, + {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43011, 9}, + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43005, 5}, + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43005, 9}, + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43011, 5}, + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43011, 9}, + {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43017, 51}, + {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43017, 10}, + {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43023, 51}, + {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43029, 10}, + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+43017, 7}, + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,SBYTEDWORD,0,0}, NO_DECORATOR, nasm_bytecodes+43017, 10}, + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+43023, 7}, + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+43029, 10}, + {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43035, 35}, + {I_IMUL, 2, {REG_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43035, 49}, + {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43041, 35}, + {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43041, 49}, + {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43047, 5}, + {I_IMUL, 2, {REG_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43047, 9}, + {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43053, 5}, + {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43053, 9}, + {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43059, 7}, + {I_IMUL, 2, {REG_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+43059, 10}, + {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43065, 7}, + {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43065, 10}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IN[] = { + {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49767, 52}, + {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47912, 52}, + {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+47917, 53}, + {I_IN, 2, {REG_AL,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+46092, 0}, + {I_IN, 2, {REG_AX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49771, 0}, + {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49775, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INC[] = { + {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49779, 1}, + {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49783, 19}, + {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47922, 11}, + {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43071, 11}, + {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43077, 12}, + {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43083, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INSB[] = { + {I_INSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50208, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INSD[] = { + {I_INSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49787, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INSW[] = { + {I_INSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49791, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INT[] = { + {I_INT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49795, 52}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INT01[] = { + {I_INT01, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INT1[] = { + {I_INT1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INT03[] = { + {I_INT03, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50211, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INT3[] = { + {I_INT3, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50211, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INTO[] = { + {I_INTO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50214, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVD[] = { + {I_INVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49799, 54}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVPCID[] = { + {I_INVPCID, 2, {REG_GPR|BITS32,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33144, 55}, + {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+33144, 56}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVLPG[] = { + {I_INVLPG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47927, 54}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVLPGA[] = { + {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43089, 57}, + {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43095, 58}, + {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33151, 59}, + {I_INVLPGA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43096, 58}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IRET[] = { + {I_IRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49803, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IRETD[] = { + {I_IRETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49807, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IRETQ[] = { + {I_IRETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49811, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_IRETW[] = { + {I_IRETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49815, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JCXZ[] = { + {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47932, 1}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JECXZ[] = { + {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47937, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JRCXZ[] = { + {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43101, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JMP[] = { + {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47943, 0}, + {I_JMP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47942, 0}, + {I_JMP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47947, 21}, + {I_JMP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47947, 21}, + {I_JMP, 1, {IMMEDIATE|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43107, 1}, + {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47952, 22}, + {I_JMP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47952, 22}, + {I_JMP, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43113, 1}, + {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47957, 23}, + {I_JMP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47957, 23}, + {I_JMP, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43119, 19}, + {I_JMP, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47962, 24}, + {I_JMP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47962, 24}, + {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43125, 1}, + {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43131, 1}, + {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43131, 1}, + {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43137, 19}, + {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43137, 19}, + {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47967, 1}, + {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47972, 7}, + {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47977, 0}, + {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47982, 5}, + {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47972, 7}, + {I_JMP, 1, {MEMORY|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47987, 21}, + {I_JMP, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47992, 22}, + {I_JMP, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47997, 23}, + {I_JMP, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48002, 24}, + {I_JMP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47987, 21}, + {I_JMP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47992, 22}, + {I_JMP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47997, 23}, + {I_JMP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48002, 24}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JMPE[] = { + {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43143, 60}, + {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43149, 60}, + {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43155, 60}, + {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43161, 60}, + {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43167, 60}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LAHF[] = { + {I_LAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50217, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LAR[] = { + {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43173, 61}, + {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43173, 62}, + {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43173, 63}, + {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33158, 64}, + {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43179, 65}, + {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43179, 63}, + {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43179, 63}, + {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33165, 64}, + {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43185, 66}, + {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43185, 64}, + {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43185, 64}, + {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43185, 64}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LDS[] = { + {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48007, 1}, + {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48012, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LEA[] = { + {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48017, 67}, + {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48022, 68}, + {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48027, 69}, + {I_LEA, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48017, 67}, + {I_LEA, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48022, 68}, + {I_LEA, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48027, 69}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LEAVE[] = { + {I_LEAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48279, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LES[] = { + {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48032, 1}, + {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48037, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LFENCE[] = { + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43191, 59}, + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43191, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LFS[] = { + {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43197, 5}, + {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43203, 5}, + {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43209, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LGDT[] = { + {I_LGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48042, 25}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LGS[] = { + {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43215, 5}, + {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43221, 5}, + {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43227, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LIDT[] = { + {I_LIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48047, 25}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LLDT[] = { + {I_LLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48052, 70}, + {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48052, 70}, + {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48052, 70}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LMSW[] = { + {I_LMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48057, 25}, + {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48057, 25}, + {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48057, 25}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOADALL[] = { + {I_LOADALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49819, 46}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOADALL286[] = { + {I_LOADALL286, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49823, 71}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LODSB[] = { + {I_LODSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50220, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LODSD[] = { + {I_LODSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49827, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LODSQ[] = { + {I_LODSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49831, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LODSW[] = { + {I_LODSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49835, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOOP[] = { + {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48062, 0}, + {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48067, 1}, + {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48072, 5}, + {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48077, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOOPE[] = { + {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48082, 0}, + {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48087, 1}, + {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48092, 5}, + {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48097, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOOPNE[] = { + {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48102, 0}, + {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48107, 1}, + {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48112, 5}, + {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48117, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOOPNZ[] = { + {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48102, 0}, + {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48107, 1}, + {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48112, 5}, + {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48117, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LOOPZ[] = { + {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48082, 0}, + {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48087, 1}, + {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48092, 5}, + {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48097, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LSL[] = { + {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43233, 61}, + {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43233, 62}, + {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43233, 63}, + {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33172, 64}, + {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43239, 65}, + {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43239, 63}, + {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43239, 63}, + {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33179, 64}, + {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43245, 66}, + {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43245, 64}, + {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43245, 64}, + {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43245, 64}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LSS[] = { + {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43251, 5}, + {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43257, 5}, + {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43263, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LTR[] = { + {I_LTR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48122, 70}, + {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48122, 70}, + {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48122, 70}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MFENCE[] = { + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43269, 59}, + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43269, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MONITOR[] = { + {I_MONITOR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48127, 72}, + {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48127, 73}, + {I_MONITOR, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48127, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MONITORX[] = { + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48132, 74}, + {I_MONITORX, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48132, 59}, + {I_MONITORX, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48132, 74}, + {I_MONITORX, 3, {REG_AX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+48132, 74}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOV[] = { + {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48153, 75}, + {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48137, 0}, + {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48142, 5}, + {I_MOV, 2, {REG_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48147, 76}, + {I_MOV, 2, {RM_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48152, 7}, + {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 75}, + {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 77}, + {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48173, 78}, + {I_MOV, 2, {REG_SREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48157, 76}, + {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48162, 0}, + {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48167, 5}, + {I_MOV, 2, {REG_SREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48172, 7}, + {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+49839, 8}, + {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48177, 8}, + {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48182, 9}, + {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+48187, 10}, + {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49843, 79}, + {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48192, 79}, + {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48197, 80}, + {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48202, 81}, + {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43275, 82}, + {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43281, 83}, + {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43287, 82}, + {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43293, 83}, + {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43300, 82}, + {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43299, 83}, + {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43306, 82}, + {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43305, 83}, + {I_MOV, 2, {REG_GPR|BITS32,REG_TREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48207, 19}, + {I_MOV, 2, {REG_TREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48212, 19}, + {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48217, 8}, + {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48218, 0}, + {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43311, 8}, + {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43312, 0}, + {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43317, 9}, + {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43318, 5}, + {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43323, 10}, + {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43324, 7}, + {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49847, 8}, + {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+49847, 0}, + {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48222, 8}, + {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48222, 0}, + {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48227, 9}, + {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48227, 5}, + {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48232, 10}, + {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48232, 7}, + {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49851, 8}, + {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48237, 8}, + {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48242, 9}, + {I_MOV, 2, {REG_GPR|BITS64,UDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+48247, 84}, + {I_MOV, 2, {REG_GPR|BITS64,SDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33201, 84}, + {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48252, 10}, + {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43329, 8}, + {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33186, 8}, + {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33193, 9}, + {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33200, 10}, + {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33200, 7}, + {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43329, 8}, + {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33186, 8}, + {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33193, 9}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVD[] = { + {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43335, 85}, + {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43341, 85}, + {I_MOVD, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33207, 86}, + {I_MOVD, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+33214, 86}, + {I_MOVD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34138, 148}, + {I_MOVD, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34145, 148}, + {I_MOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34145, 144}, + {I_MOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34138, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVQ[] = { + {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43347, 87}, + {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+43353, 87}, + {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33207, 88}, + {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+33214, 88}, + {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44985, 144}, + {I_MOVQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44991, 144}, + {I_MOVQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44991, 149}, + {I_MOVQ, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44985, 149}, + {I_MOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34152, 150}, + {I_MOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34159, 150}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSB[] = { + {I_MOVSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12437, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSD[] = { + {I_MOVSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49855, 5}, + {I_MOVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45543, 144}, + {I_MOVSD, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45549, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSQ[] = { + {I_MOVSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49859, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSW[] = { + {I_MOVSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49863, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSX[] = { + {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43359, 53}, + {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43359, 5}, + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43365, 5}, + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43371, 5}, + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43377, 7}, + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43383, 7}, + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48257, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSXD[] = { + {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48257, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVZX[] = { + {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43389, 53}, + {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43389, 5}, + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43395, 5}, + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43401, 5}, + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43407, 7}, + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43413, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MUL[] = { + {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49867, 0}, + {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48262, 0}, + {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48267, 5}, + {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48272, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MWAIT[] = { + {I_MWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48277, 72}, + {I_MWAIT, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48277, 72}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MWAITX[] = { + {I_MWAITX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48282, 74}, + {I_MWAITX, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48282, 74}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_NEG[] = { + {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48287, 11}, + {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43419, 11}, + {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43425, 12}, + {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43431, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_NOP[] = { + {I_NOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48292, 0}, + {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43437, 89}, + {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43443, 89}, + {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43449, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_NOT[] = { + {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48297, 11}, + {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43455, 11}, + {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43461, 12}, + {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43467, 13}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_OR[] = { + {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48302, 3}, + {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48303, 0}, + {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43473, 3}, + {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43474, 0}, + {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43479, 4}, + {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43480, 5}, + {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43485, 6}, + {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43486, 7}, + {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40679, 8}, + {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40679, 0}, + {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48307, 8}, + {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48307, 0}, + {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48312, 9}, + {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48312, 5}, + {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48317, 10}, + {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48317, 7}, + {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33221, 11}, + {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33228, 12}, + {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33235, 13}, + {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+49871, 8}, + {I_OR, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33222, 8}, + {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48322, 8}, + {I_OR, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33229, 9}, + {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48327, 9}, + {I_OR, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33236, 10}, + {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48332, 10}, + {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43491, 3}, + {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33221, 3}, + {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33242, 3}, + {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33228, 4}, + {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33249, 4}, + {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33235, 6}, + {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33256, 6}, + {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43491, 3}, + {I_OR, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33221, 3}, + {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33242, 3}, + {I_OR, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33228, 4}, + {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33249, 4}, + {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43497, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_OUT[] = { + {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49875, 52}, + {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48337, 52}, + {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+48342, 53}, + {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+46074, 0}, + {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49879, 0}, + {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+49883, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_OUTSB[] = { + {I_OUTSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50223, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_OUTSD[] = { + {I_OUTSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49887, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_OUTSW[] = { + {I_OUTSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49891, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PACKSSDW[] = { + {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33263, 87}, + {I_PACKSSDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45009, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PACKSSWB[] = { + {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33270, 87}, + {I_PACKSSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45003, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PACKUSWB[] = { + {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33277, 87}, + {I_PACKUSWB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45015, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDB[] = { + {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33284, 87}, + {I_PADDB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45021, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDD[] = { + {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33291, 87}, + {I_PADDD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45033, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDSB[] = { + {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33298, 87}, + {I_PADDSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45051, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDSIW[] = { + {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43503, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDSW[] = { + {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33305, 87}, + {I_PADDSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45057, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDUSB[] = { + {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33312, 87}, + {I_PADDUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45063, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDUSW[] = { + {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33319, 87}, + {I_PADDUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45069, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDW[] = { + {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33326, 87}, + {I_PADDW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45027, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAND[] = { + {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33333, 87}, + {I_PAND, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45075, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PANDN[] = { + {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33340, 87}, + {I_PANDN, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45081, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAUSE[] = { + {I_PAUSE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49895, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAVEB[] = { + {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43509, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAVGUSB[] = { + {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12376, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPEQB[] = { + {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33347, 87}, + {I_PCMPEQB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45099, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPEQD[] = { + {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33354, 87}, + {I_PCMPEQD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45111, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPEQW[] = { + {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33361, 87}, + {I_PCMPEQW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45105, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPGTB[] = { + {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33368, 87}, + {I_PCMPGTB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45117, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPGTD[] = { + {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33375, 87}, + {I_PCMPGTD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45129, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPGTW[] = { + {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33382, 87}, + {I_PCMPGTW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45123, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PDISTIB[] = { + {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45376, 92}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PF2ID[] = { + {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12384, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFACC[] = { + {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12392, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFADD[] = { + {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12400, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFCMPEQ[] = { + {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12408, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFCMPGE[] = { + {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12416, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFCMPGT[] = { + {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12424, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFMAX[] = { + {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12432, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFMIN[] = { + {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12440, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFMUL[] = { + {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12448, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRCP[] = { + {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12456, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRCPIT1[] = { + {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12464, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRCPIT2[] = { + {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12472, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRSQIT1[] = { + {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12480, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRSQRT[] = { + {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12488, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFSUB[] = { + {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12496, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFSUBR[] = { + {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12504, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PI2FD[] = { + {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12512, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMACHRIW[] = { + {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45472, 92}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMADDWD[] = { + {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33389, 87}, + {I_PMADDWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45135, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAGW[] = { + {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43515, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHRIW[] = { + {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43521, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHRWA[] = { + {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12520, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHRWC[] = { + {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43527, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHW[] = { + {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33396, 87}, + {I_PMULHW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45177, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULLW[] = { + {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33403, 87}, + {I_PMULLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45183, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMVGEZB[] = { + {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45604, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMVLZB[] = { + {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45460, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMVNZB[] = { + {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45442, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMVZB[] = { + {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45364, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POP[] = { + {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49899, 0}, + {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49903, 19}, + {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49907, 7}, + {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48347, 0}, + {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48352, 19}, + {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48357, 7}, + {I_POP, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12813, 1}, + {I_POP, 1, {REG_CS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7495, 93}, + {I_POP, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7621, 1}, + {I_POP, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7765, 1}, + {I_POP, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49911, 5}, + {I_POP, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49915, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPA[] = { + {I_POPA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49919, 18}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPAD[] = { + {I_POPAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49923, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPAW[] = { + {I_POPAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49927, 18}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPF[] = { + {I_POPF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49931, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPFD[] = { + {I_POPFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49935, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPFQ[] = { + {I_POPFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49935, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPFW[] = { + {I_POPFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49939, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POR[] = { + {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33410, 87}, + {I_POR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45195, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCH[] = { + {I_PREFETCH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48362, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHW[] = { + {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48367, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSLLD[] = { + {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33417, 87}, + {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33424, 34}, + {I_PSLLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45213, 145}, + {I_PSLLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34222, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSLLQ[] = { + {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33431, 87}, + {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33438, 34}, + {I_PSLLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45219, 145}, + {I_PSLLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34229, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSLLW[] = { + {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33445, 87}, + {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33452, 34}, + {I_PSLLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45207, 145}, + {I_PSLLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34215, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRAD[] = { + {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33459, 87}, + {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33466, 34}, + {I_PSRAD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45231, 145}, + {I_PSRAD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34243, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRAW[] = { + {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33473, 87}, + {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33480, 34}, + {I_PSRAW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45225, 145}, + {I_PSRAW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34236, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRLD[] = { + {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33487, 87}, + {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33494, 34}, + {I_PSRLD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45243, 145}, + {I_PSRLD, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34264, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRLQ[] = { + {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33501, 87}, + {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33508, 34}, + {I_PSRLQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45249, 145}, + {I_PSRLQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34271, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRLW[] = { + {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33515, 87}, + {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33522, 34}, + {I_PSRLW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45237, 145}, + {I_PSRLW, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34257, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBB[] = { + {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33529, 87}, + {I_PSUBB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45255, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBD[] = { + {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33536, 87}, + {I_PSUBD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45267, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBSB[] = { + {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33543, 87}, + {I_PSUBSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45279, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBSIW[] = { + {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+43533, 90}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBSW[] = { + {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33550, 87}, + {I_PSUBSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45285, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBUSB[] = { + {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33557, 87}, + {I_PSUBUSB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45291, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBUSW[] = { + {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33564, 87}, + {I_PSUBUSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45297, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBW[] = { + {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33571, 87}, + {I_PSUBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45261, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKHBW[] = { + {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33578, 87}, + {I_PUNPCKHBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45303, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKHDQ[] = { + {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33585, 87}, + {I_PUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45315, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKHWD[] = { + {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33592, 87}, + {I_PUNPCKHWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45309, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKLBW[] = { + {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33599, 87}, + {I_PUNPCKLBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45327, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKLDQ[] = { + {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33606, 87}, + {I_PUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45339, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKLWD[] = { + {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33613, 87}, + {I_PUNPCKLWD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45333, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSH[] = { + {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49943, 0}, + {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49947, 19}, + {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49951, 7}, + {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48372, 0}, + {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48377, 19}, + {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48382, 7}, + {I_PUSH, 1, {REG_ES,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12781, 1}, + {I_PUSH, 1, {REG_CS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7477, 1}, + {I_PUSH, 1, {REG_SS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7603, 1}, + {I_PUSH, 1, {REG_DS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+7747, 1}, + {I_PUSH, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49955, 5}, + {I_PUSH, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49959, 5}, + {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48408, 35}, + {I_PUSH, 1, {SBYTEWORD|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48387, 94}, + {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48392, 94}, + {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48397, 95}, + {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48402, 95}, + {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48397, 96}, + {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48402, 96}, + {I_PUSH, 1, {SBYTEDWORD|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48407, 97}, + {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48412, 97}, + {I_PUSH, 1, {SBYTEDWORD|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48407, 97}, + {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48412, 97}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHA[] = { + {I_PUSHA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49963, 18}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHAD[] = { + {I_PUSHAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49967, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHAW[] = { + {I_PUSHAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49971, 18}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHF[] = { + {I_PUSHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49975, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHFD[] = { + {I_PUSHFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49979, 19}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHFQ[] = { + {I_PUSHFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49979, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUSHFW[] = { + {I_PUSHFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49983, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PXOR[] = { + {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+33620, 87}, + {I_PXOR, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45351, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RCL[] = { + {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49987, 0}, + {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49991, 0}, + {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48417, 35}, + {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48422, 0}, + {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48427, 0}, + {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43539, 35}, + {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48432, 5}, + {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48437, 5}, + {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43545, 5}, + {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48442, 7}, + {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48447, 7}, + {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43551, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RCR[] = { + {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+49995, 0}, + {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+49999, 0}, + {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48452, 35}, + {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48457, 0}, + {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48462, 0}, + {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43557, 35}, + {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48467, 5}, + {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48472, 5}, + {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43563, 5}, + {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48477, 7}, + {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48482, 7}, + {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43569, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDSHR[] = { + {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43575, 98}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDMSR[] = { + {I_RDMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50003, 99}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDPMC[] = { + {I_RDPMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50007, 89}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDTSC[] = { + {I_RDTSC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50011, 28}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDTSCP[] = { + {I_RDTSCP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48487, 100}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RET[] = { + {I_RET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50032, 21}, + {I_RET, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48513, 101}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETF[] = { + {I_RETF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50036, 0}, + {I_RETF, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48518, 75}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETN[] = { + {I_RETN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50032, 21}, + {I_RETN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48513, 101}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETW[] = { + {I_RETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50015, 21}, + {I_RETW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48513, 101}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETFW[] = { + {I_RETFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50019, 0}, + {I_RETFW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48492, 75}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETNW[] = { + {I_RETNW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50015, 21}, + {I_RETNW, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48497, 101}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETD[] = { + {I_RETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50023, 22}, + {I_RETD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48502, 102}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETFD[] = { + {I_RETFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50027, 0}, + {I_RETFD, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48507, 75}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETND[] = { + {I_RETND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50023, 22}, + {I_RETND, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48502, 102}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETQ[] = { + {I_RETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50031, 24}, + {I_RETQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48512, 103}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETFQ[] = { + {I_RETFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50035, 7}, + {I_RETFQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48517, 104}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RETNQ[] = { + {I_RETNQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50031, 24}, + {I_RETNQ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48512, 103}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROL[] = { + {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50039, 0}, + {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50043, 0}, + {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48522, 35}, + {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48527, 0}, + {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48532, 0}, + {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43581, 35}, + {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48537, 5}, + {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48542, 5}, + {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43587, 5}, + {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48547, 7}, + {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48552, 7}, + {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43593, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROR[] = { + {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50047, 0}, + {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50051, 0}, + {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48557, 35}, + {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48562, 0}, + {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48567, 0}, + {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43599, 35}, + {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48572, 5}, + {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48577, 5}, + {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43605, 5}, + {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48582, 7}, + {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48587, 7}, + {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43611, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDM[] = { + {I_RDM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49215, 33}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSDC[] = { + {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, NO_DECORATOR, nasm_bytecodes+45742, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSLDT[] = { + {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48592, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSM[] = { + {I_RSM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50055, 106}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSTS[] = { + {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48597, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SAHF[] = { + {I_SAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12405, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SAL[] = { + {I_SAL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50059, 0}, + {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50063, 0}, + {I_SAL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48602, 35}, + {I_SAL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48607, 0}, + {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48612, 0}, + {I_SAL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43617, 35}, + {I_SAL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48617, 5}, + {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48622, 5}, + {I_SAL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43623, 5}, + {I_SAL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48627, 7}, + {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48632, 7}, + {I_SAL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43629, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SALC[] = { + {I_SALC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49174, 107}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SAR[] = { + {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50067, 0}, + {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50071, 0}, + {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48637, 35}, + {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48642, 0}, + {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48647, 0}, + {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43635, 35}, + {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48652, 5}, + {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48657, 5}, + {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43641, 5}, + {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48662, 7}, + {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48667, 7}, + {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43647, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SBB[] = { + {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48672, 3}, + {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48673, 0}, + {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43653, 3}, + {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43654, 0}, + {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43659, 4}, + {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43660, 5}, + {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43665, 6}, + {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43666, 7}, + {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+35268, 8}, + {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+35268, 0}, + {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48677, 8}, + {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48677, 0}, + {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48682, 9}, + {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48682, 5}, + {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48687, 10}, + {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48687, 7}, + {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33627, 11}, + {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33634, 12}, + {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33641, 13}, + {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50075, 8}, + {I_SBB, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33628, 8}, + {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48692, 8}, + {I_SBB, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33635, 9}, + {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48697, 9}, + {I_SBB, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33642, 10}, + {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48702, 10}, + {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43671, 3}, + {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33627, 3}, + {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33648, 3}, + {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33634, 4}, + {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33655, 4}, + {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33641, 6}, + {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33662, 6}, + {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43671, 3}, + {I_SBB, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33627, 3}, + {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33648, 3}, + {I_SBB, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33634, 4}, + {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33655, 4}, + {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43677, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SCASB[] = { + {I_SCASB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50079, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SCASD[] = { + {I_SCASD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48707, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SCASQ[] = { + {I_SCASQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48712, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SCASW[] = { + {I_SCASW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48717, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SFENCE[] = { + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43683, 59}, + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43683, 139}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SGDT[] = { + {I_SGDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48722, 108}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHL[] = { + {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50059, 0}, + {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50063, 0}, + {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48602, 35}, + {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48607, 0}, + {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48612, 0}, + {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43617, 35}, + {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48617, 5}, + {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48622, 5}, + {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43623, 5}, + {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48627, 7}, + {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48632, 7}, + {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43629, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHLD[] = { + {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33669, 109}, + {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33669, 109}, + {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33676, 109}, + {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33676, 109}, + {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33683, 110}, + {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33683, 110}, + {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43689, 9}, + {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43689, 5}, + {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43695, 9}, + {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43695, 5}, + {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43701, 10}, + {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43701, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHR[] = { + {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50083, 0}, + {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+50087, 0}, + {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48727, 35}, + {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48732, 0}, + {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48737, 0}, + {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43707, 35}, + {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48742, 5}, + {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48747, 5}, + {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43713, 5}, + {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48752, 7}, + {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+48757, 7}, + {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43719, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHRD[] = { + {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33690, 109}, + {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33690, 109}, + {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33697, 109}, + {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33697, 109}, + {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33704, 110}, + {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+33704, 110}, + {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43725, 9}, + {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43725, 5}, + {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43731, 9}, + {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43731, 5}, + {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43737, 10}, + {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+43737, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SIDT[] = { + {I_SIDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48762, 108}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SLDT[] = { + {I_SLDT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43762, 108}, + {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43762, 108}, + {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43743, 108}, + {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43749, 5}, + {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43755, 7}, + {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43761, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SKINIT[] = { + {I_SKINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48767, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SMI[] = { + {I_SMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50205, 111}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SMINT[] = { + {I_SMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50091, 33}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SMINTOLD[] = { + {I_SMINTOLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50095, 112}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SMSW[] = { + {I_SMSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43780, 108}, + {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43780, 108}, + {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43767, 108}, + {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43773, 5}, + {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43779, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STC[] = { + {I_STC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48489, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STD[] = { + {I_STD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50226, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STI[] = { + {I_STI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48284, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STOSB[] = { + {I_STOSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12509, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STOSD[] = { + {I_STOSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50099, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STOSQ[] = { + {I_STOSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50103, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STOSW[] = { + {I_STOSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50107, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STR[] = { + {I_STR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43798, 62}, + {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43798, 62}, + {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43785, 62}, + {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43791, 63}, + {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43797, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SUB[] = { + {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48772, 3}, + {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48773, 0}, + {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43803, 3}, + {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43804, 0}, + {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43809, 4}, + {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43810, 5}, + {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43815, 6}, + {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43816, 7}, + {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41036, 8}, + {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41036, 0}, + {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48777, 8}, + {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48777, 0}, + {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48782, 9}, + {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48782, 5}, + {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48787, 10}, + {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48787, 7}, + {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33711, 11}, + {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33718, 12}, + {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33725, 13}, + {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50111, 8}, + {I_SUB, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33712, 8}, + {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48792, 8}, + {I_SUB, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33719, 9}, + {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48797, 9}, + {I_SUB, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33726, 10}, + {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48802, 10}, + {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43821, 3}, + {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33711, 3}, + {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33732, 3}, + {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33718, 4}, + {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33739, 4}, + {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33725, 6}, + {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33746, 6}, + {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43821, 3}, + {I_SUB, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33711, 3}, + {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33732, 3}, + {I_SUB, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33718, 4}, + {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33739, 4}, + {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43827, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SVDC[] = { + {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34357, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SVLDT[] = { + {I_SVLDT, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48807, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SVTS[] = { + {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48812, 105}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SWAPGS[] = { + {I_SWAPGS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48817, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SYSCALL[] = { + {I_SYSCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49823, 113}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SYSENTER[] = { + {I_SYSENTER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50115, 89}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SYSEXIT[] = { + {I_SYSEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50119, 114}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SYSRET[] = { + {I_SYSRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49819, 115}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TEST[] = { + {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50123, 8}, + {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+50123, 0}, + {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48822, 8}, + {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48822, 0}, + {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48827, 9}, + {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48827, 5}, + {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48832, 10}, + {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48832, 7}, + {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+50127, 8}, + {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48837, 8}, + {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48842, 9}, + {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48847, 10}, + {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50131, 8}, + {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48852, 8}, + {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48857, 9}, + {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48862, 10}, + {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48867, 8}, + {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43833, 8}, + {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43839, 9}, + {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43845, 10}, + {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48867, 8}, + {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43833, 8}, + {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43839, 9}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UD0[] = { + {I_UD0, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50135, 116}, + {I_UD0, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43851, 35}, + {I_UD0, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43857, 35}, + {I_UD0, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43863, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UD1[] = { + {I_UD1, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43869, 35}, + {I_UD1, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43875, 35}, + {I_UD1, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43881, 35}, + {I_UD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50139, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UD2B[] = { + {I_UD2B, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50139, 35}, + {I_UD2B, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43869, 35}, + {I_UD2B, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43875, 35}, + {I_UD2B, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43881, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UD2[] = { + {I_UD2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50143, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UD2A[] = { + {I_UD2A, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50143, 35}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UMOV[] = { + {I_UMOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43887, 117}, + {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43887, 111}, + {I_UMOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33753, 117}, + {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33753, 111}, + {I_UMOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33760, 117}, + {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33760, 111}, + {I_UMOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43893, 117}, + {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43893, 111}, + {I_UMOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33767, 117}, + {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33767, 111}, + {I_UMOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33774, 117}, + {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33774, 111}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VERR[] = { + {I_VERR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48872, 62}, + {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48872, 62}, + {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48872, 62}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VERW[] = { + {I_VERW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48877, 62}, + {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48877, 62}, + {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48877, 62}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FWAIT[] = { + {I_FWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49721, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WBINVD[] = { + {I_WBINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49183, 54}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRSHR[] = { + {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43899, 98}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRMSR[] = { + {I_WRMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50147, 99}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XADD[] = { + {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43905, 118}, + {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43906, 20}, + {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33781, 118}, + {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33782, 20}, + {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33788, 118}, + {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33789, 20}, + {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33795, 6}, + {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33796, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XBTS[] = { + {I_XBTS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43911, 119}, + {I_XBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43911, 111}, + {I_XBTS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43917, 120}, + {I_XBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43917, 111}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCHG[] = { + {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+50151, 0}, + {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, NO_DECORATOR, nasm_bytecodes+50155, 5}, + {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+50159, 7}, + {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50163, 0}, + {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50167, 5}, + {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50171, 7}, + {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+50175, 19}, + {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48882, 3}, + {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48883, 0}, + {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43923, 3}, + {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43924, 0}, + {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43929, 4}, + {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43930, 5}, + {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43935, 6}, + {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43936, 7}, + {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48887, 3}, + {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48888, 0}, + {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43941, 3}, + {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43942, 0}, + {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43947, 4}, + {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43948, 5}, + {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43953, 6}, + {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43954, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XLATB[] = { + {I_XLATB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46014, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XLAT[] = { + {I_XLAT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46014, 0}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XOR[] = { + {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48892, 3}, + {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+48893, 0}, + {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43959, 3}, + {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43960, 0}, + {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43965, 4}, + {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+43966, 5}, + {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43971, 6}, + {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43972, 7}, + {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+40476, 8}, + {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+40476, 0}, + {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48897, 8}, + {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+48897, 0}, + {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48902, 9}, + {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+48902, 5}, + {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+48907, 10}, + {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+48907, 7}, + {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33802, 11}, + {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33809, 12}, + {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+33816, 13}, + {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+50179, 8}, + {I_XOR, 2, {REG_AX,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33803, 8}, + {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48912, 8}, + {I_XOR, 2, {REG_EAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33810, 9}, + {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48917, 9}, + {I_XOR, 2, {REG_RAX,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33817, 10}, + {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+48922, 10}, + {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43977, 3}, + {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33802, 3}, + {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33823, 3}, + {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33809, 4}, + {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33830, 4}, + {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD,0,0,0}, NO_DECORATOR, nasm_bytecodes+33816, 6}, + {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+33837, 6}, + {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+43977, 3}, + {I_XOR, 2, {MEMORY,SBYTEWORD|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33802, 3}, + {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33823, 3}, + {I_XOR, 2, {MEMORY,SBYTEDWORD|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33809, 4}, + {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33830, 4}, + {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+43983, 14}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVA[] = { + {I_CMOVA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43989, 121}, + {I_CMOVA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43989, 89}, + {I_CMOVA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44085, 121}, + {I_CMOVA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44085, 89}, + {I_CMOVA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44181, 10}, + {I_CMOVA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44181, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVAE[] = { + {I_CMOVAE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 121}, + {I_CMOVAE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 89}, + {I_CMOVAE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 121}, + {I_CMOVAE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 89}, + {I_CMOVAE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 10}, + {I_CMOVAE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVB[] = { + {I_CMOVB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 121}, + {I_CMOVB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 89}, + {I_CMOVB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 121}, + {I_CMOVB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 89}, + {I_CMOVB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 10}, + {I_CMOVB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVBE[] = { + {I_CMOVBE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44007, 121}, + {I_CMOVBE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44007, 89}, + {I_CMOVBE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44103, 121}, + {I_CMOVBE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44103, 89}, + {I_CMOVBE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44199, 10}, + {I_CMOVBE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44199, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVC[] = { + {I_CMOVC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 121}, + {I_CMOVC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 89}, + {I_CMOVC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 121}, + {I_CMOVC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 89}, + {I_CMOVC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 10}, + {I_CMOVC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVE[] = { + {I_CMOVE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44013, 121}, + {I_CMOVE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44013, 89}, + {I_CMOVE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44109, 121}, + {I_CMOVE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44109, 89}, + {I_CMOVE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44205, 10}, + {I_CMOVE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44205, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVG[] = { + {I_CMOVG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44019, 121}, + {I_CMOVG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44019, 89}, + {I_CMOVG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44115, 121}, + {I_CMOVG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44115, 89}, + {I_CMOVG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44211, 10}, + {I_CMOVG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44211, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVGE[] = { + {I_CMOVGE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44025, 121}, + {I_CMOVGE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44025, 89}, + {I_CMOVGE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44121, 121}, + {I_CMOVGE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44121, 89}, + {I_CMOVGE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44217, 10}, + {I_CMOVGE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44217, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVL[] = { + {I_CMOVL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44031, 121}, + {I_CMOVL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44031, 89}, + {I_CMOVL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44127, 121}, + {I_CMOVL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44127, 89}, + {I_CMOVL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44223, 10}, + {I_CMOVL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44223, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVLE[] = { + {I_CMOVLE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44037, 121}, + {I_CMOVLE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44037, 89}, + {I_CMOVLE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44133, 121}, + {I_CMOVLE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44133, 89}, + {I_CMOVLE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44229, 10}, + {I_CMOVLE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44229, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNA[] = { + {I_CMOVNA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44007, 121}, + {I_CMOVNA, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44007, 89}, + {I_CMOVNA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44103, 121}, + {I_CMOVNA, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44103, 89}, + {I_CMOVNA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44199, 10}, + {I_CMOVNA, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44199, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNAE[] = { + {I_CMOVNAE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 121}, + {I_CMOVNAE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44001, 89}, + {I_CMOVNAE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 121}, + {I_CMOVNAE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44097, 89}, + {I_CMOVNAE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 10}, + {I_CMOVNAE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44193, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNB[] = { + {I_CMOVNB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 121}, + {I_CMOVNB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 89}, + {I_CMOVNB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 121}, + {I_CMOVNB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 89}, + {I_CMOVNB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 10}, + {I_CMOVNB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNBE[] = { + {I_CMOVNBE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43989, 121}, + {I_CMOVNBE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43989, 89}, + {I_CMOVNBE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44085, 121}, + {I_CMOVNBE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44085, 89}, + {I_CMOVNBE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44181, 10}, + {I_CMOVNBE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44181, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNC[] = { + {I_CMOVNC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 121}, + {I_CMOVNC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43995, 89}, + {I_CMOVNC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 121}, + {I_CMOVNC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44091, 89}, + {I_CMOVNC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 10}, + {I_CMOVNC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44187, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNE[] = { + {I_CMOVNE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44043, 121}, + {I_CMOVNE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44043, 89}, + {I_CMOVNE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44139, 121}, + {I_CMOVNE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44139, 89}, + {I_CMOVNE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44235, 10}, + {I_CMOVNE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44235, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNG[] = { + {I_CMOVNG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44037, 121}, + {I_CMOVNG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44037, 89}, + {I_CMOVNG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44133, 121}, + {I_CMOVNG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44133, 89}, + {I_CMOVNG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44229, 10}, + {I_CMOVNG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44229, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNGE[] = { + {I_CMOVNGE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44031, 121}, + {I_CMOVNGE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44031, 89}, + {I_CMOVNGE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44127, 121}, + {I_CMOVNGE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44127, 89}, + {I_CMOVNGE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44223, 10}, + {I_CMOVNGE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44223, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNL[] = { + {I_CMOVNL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44025, 121}, + {I_CMOVNL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44025, 89}, + {I_CMOVNL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44121, 121}, + {I_CMOVNL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44121, 89}, + {I_CMOVNL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44217, 10}, + {I_CMOVNL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44217, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNLE[] = { + {I_CMOVNLE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44019, 121}, + {I_CMOVNLE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44019, 89}, + {I_CMOVNLE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44115, 121}, + {I_CMOVNLE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44115, 89}, + {I_CMOVNLE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44211, 10}, + {I_CMOVNLE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44211, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNO[] = { + {I_CMOVNO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44049, 121}, + {I_CMOVNO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44049, 89}, + {I_CMOVNO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44145, 121}, + {I_CMOVNO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44145, 89}, + {I_CMOVNO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44241, 10}, + {I_CMOVNO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44241, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNP[] = { + {I_CMOVNP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44055, 121}, + {I_CMOVNP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44055, 89}, + {I_CMOVNP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44151, 121}, + {I_CMOVNP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44151, 89}, + {I_CMOVNP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44247, 10}, + {I_CMOVNP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44247, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNS[] = { + {I_CMOVNS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44061, 121}, + {I_CMOVNS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44061, 89}, + {I_CMOVNS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44157, 121}, + {I_CMOVNS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44157, 89}, + {I_CMOVNS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44253, 10}, + {I_CMOVNS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44253, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVNZ[] = { + {I_CMOVNZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44043, 121}, + {I_CMOVNZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44043, 89}, + {I_CMOVNZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44139, 121}, + {I_CMOVNZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44139, 89}, + {I_CMOVNZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44235, 10}, + {I_CMOVNZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44235, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVO[] = { + {I_CMOVO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44067, 121}, + {I_CMOVO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44067, 89}, + {I_CMOVO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44163, 121}, + {I_CMOVO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44163, 89}, + {I_CMOVO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44259, 10}, + {I_CMOVO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44259, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVP[] = { + {I_CMOVP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44073, 121}, + {I_CMOVP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44073, 89}, + {I_CMOVP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44169, 121}, + {I_CMOVP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44169, 89}, + {I_CMOVP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44265, 10}, + {I_CMOVP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44265, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVPE[] = { + {I_CMOVPE, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44073, 121}, + {I_CMOVPE, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44073, 89}, + {I_CMOVPE, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44169, 121}, + {I_CMOVPE, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44169, 89}, + {I_CMOVPE, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44265, 10}, + {I_CMOVPE, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44265, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVPO[] = { + {I_CMOVPO, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44055, 121}, + {I_CMOVPO, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44055, 89}, + {I_CMOVPO, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44151, 121}, + {I_CMOVPO, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44151, 89}, + {I_CMOVPO, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44247, 10}, + {I_CMOVPO, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44247, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVS[] = { + {I_CMOVS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44079, 121}, + {I_CMOVS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44079, 89}, + {I_CMOVS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44175, 121}, + {I_CMOVS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44175, 89}, + {I_CMOVS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44271, 10}, + {I_CMOVS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44271, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMOVZ[] = { + {I_CMOVZ, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44013, 121}, + {I_CMOVZ, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44013, 89}, + {I_CMOVZ, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44109, 121}, + {I_CMOVZ, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44109, 89}, + {I_CMOVZ, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+44205, 10}, + {I_CMOVZ, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44205, 7}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JA[] = { + {I_JA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44277, 122}, + {I_JA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44373, 23}, + {I_JA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44469, 23}, + {I_JA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44565, 24}, + {I_JA, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 21}, + {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48927, 21}, + {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44566, 122}, + {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33844, 21}, + {I_JA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JAE[] = { + {I_JAE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44283, 122}, + {I_JAE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44379, 23}, + {I_JAE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44475, 23}, + {I_JAE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44571, 24}, + {I_JAE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48932, 21}, + {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44572, 122}, + {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33851, 21}, + {I_JAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JB[] = { + {I_JB, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44289, 122}, + {I_JB, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44385, 23}, + {I_JB, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44481, 23}, + {I_JB, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44577, 24}, + {I_JB, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48937, 21}, + {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44578, 122}, + {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33858, 21}, + {I_JB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JBE[] = { + {I_JBE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44295, 122}, + {I_JBE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44391, 23}, + {I_JBE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44487, 23}, + {I_JBE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44583, 24}, + {I_JBE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 21}, + {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48942, 21}, + {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44584, 122}, + {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33865, 21}, + {I_JBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JC[] = { + {I_JC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44289, 122}, + {I_JC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44385, 23}, + {I_JC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44481, 23}, + {I_JC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44577, 24}, + {I_JC, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48937, 21}, + {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44578, 122}, + {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33858, 21}, + {I_JC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JE[] = { + {I_JE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44301, 122}, + {I_JE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44397, 23}, + {I_JE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44493, 23}, + {I_JE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44589, 24}, + {I_JE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 21}, + {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48947, 21}, + {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44590, 122}, + {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33872, 21}, + {I_JE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JG[] = { + {I_JG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44307, 122}, + {I_JG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44403, 23}, + {I_JG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44499, 23}, + {I_JG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44595, 24}, + {I_JG, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 21}, + {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48952, 21}, + {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44596, 122}, + {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33879, 21}, + {I_JG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JGE[] = { + {I_JGE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44313, 122}, + {I_JGE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44409, 23}, + {I_JGE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44505, 23}, + {I_JGE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44601, 24}, + {I_JGE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 21}, + {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48957, 21}, + {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44602, 122}, + {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33886, 21}, + {I_JGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JL[] = { + {I_JL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44319, 122}, + {I_JL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44415, 23}, + {I_JL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44511, 23}, + {I_JL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44607, 24}, + {I_JL, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 21}, + {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48962, 21}, + {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44608, 122}, + {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33893, 21}, + {I_JL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JLE[] = { + {I_JLE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44325, 122}, + {I_JLE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44421, 23}, + {I_JLE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44517, 23}, + {I_JLE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44613, 24}, + {I_JLE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 21}, + {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48967, 21}, + {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44614, 122}, + {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33900, 21}, + {I_JLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNA[] = { + {I_JNA, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44295, 122}, + {I_JNA, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44391, 23}, + {I_JNA, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44487, 23}, + {I_JNA, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44583, 24}, + {I_JNA, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 21}, + {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48942, 21}, + {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44584, 122}, + {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33865, 21}, + {I_JNA, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48943, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNAE[] = { + {I_JNAE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44289, 122}, + {I_JNAE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44385, 23}, + {I_JNAE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44481, 23}, + {I_JNAE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44577, 24}, + {I_JNAE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48937, 21}, + {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44578, 122}, + {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33858, 21}, + {I_JNAE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48938, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNB[] = { + {I_JNB, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44283, 122}, + {I_JNB, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44379, 23}, + {I_JNB, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44475, 23}, + {I_JNB, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44571, 24}, + {I_JNB, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48932, 21}, + {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44572, 122}, + {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33851, 21}, + {I_JNB, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNBE[] = { + {I_JNBE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44277, 122}, + {I_JNBE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44373, 23}, + {I_JNBE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44469, 23}, + {I_JNBE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44565, 24}, + {I_JNBE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 21}, + {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48927, 21}, + {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44566, 122}, + {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33844, 21}, + {I_JNBE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48928, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNC[] = { + {I_JNC, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44283, 122}, + {I_JNC, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44379, 23}, + {I_JNC, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44475, 23}, + {I_JNC, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44571, 24}, + {I_JNC, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48932, 21}, + {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44572, 122}, + {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33851, 21}, + {I_JNC, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48933, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNE[] = { + {I_JNE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44331, 122}, + {I_JNE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44427, 23}, + {I_JNE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44523, 23}, + {I_JNE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44619, 24}, + {I_JNE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 21}, + {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48972, 21}, + {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44620, 122}, + {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33907, 21}, + {I_JNE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNG[] = { + {I_JNG, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44325, 122}, + {I_JNG, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44421, 23}, + {I_JNG, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44517, 23}, + {I_JNG, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44613, 24}, + {I_JNG, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 21}, + {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48967, 21}, + {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44614, 122}, + {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33900, 21}, + {I_JNG, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48968, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNGE[] = { + {I_JNGE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44319, 122}, + {I_JNGE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44415, 23}, + {I_JNGE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44511, 23}, + {I_JNGE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44607, 24}, + {I_JNGE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 21}, + {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48962, 21}, + {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44608, 122}, + {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33893, 21}, + {I_JNGE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48963, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNL[] = { + {I_JNL, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44313, 122}, + {I_JNL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44409, 23}, + {I_JNL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44505, 23}, + {I_JNL, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44601, 24}, + {I_JNL, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 21}, + {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48957, 21}, + {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44602, 122}, + {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33886, 21}, + {I_JNL, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48958, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNLE[] = { + {I_JNLE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44307, 122}, + {I_JNLE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44403, 23}, + {I_JNLE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44499, 23}, + {I_JNLE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44595, 24}, + {I_JNLE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 21}, + {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48952, 21}, + {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44596, 122}, + {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33879, 21}, + {I_JNLE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48953, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNO[] = { + {I_JNO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44337, 122}, + {I_JNO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44433, 23}, + {I_JNO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44529, 23}, + {I_JNO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44625, 24}, + {I_JNO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48978, 21}, + {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48977, 21}, + {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44626, 122}, + {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33914, 21}, + {I_JNO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48978, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNP[] = { + {I_JNP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44343, 122}, + {I_JNP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44439, 23}, + {I_JNP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44535, 23}, + {I_JNP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44631, 24}, + {I_JNP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 21}, + {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48982, 21}, + {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44632, 122}, + {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33921, 21}, + {I_JNP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNS[] = { + {I_JNS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44349, 122}, + {I_JNS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44445, 23}, + {I_JNS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44541, 23}, + {I_JNS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44637, 24}, + {I_JNS, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 21}, + {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48987, 21}, + {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44638, 122}, + {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33928, 21}, + {I_JNS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48988, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JNZ[] = { + {I_JNZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44331, 122}, + {I_JNZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44427, 23}, + {I_JNZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44523, 23}, + {I_JNZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44619, 24}, + {I_JNZ, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 21}, + {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48972, 21}, + {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44620, 122}, + {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33907, 21}, + {I_JNZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48973, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JO[] = { + {I_JO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44355, 122}, + {I_JO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44451, 23}, + {I_JO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44547, 23}, + {I_JO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44643, 24}, + {I_JO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 21}, + {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48992, 21}, + {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44644, 122}, + {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33935, 21}, + {I_JO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48993, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JP[] = { + {I_JP, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44361, 122}, + {I_JP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44457, 23}, + {I_JP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44553, 23}, + {I_JP, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44649, 24}, + {I_JP, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 21}, + {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48997, 21}, + {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44650, 122}, + {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33942, 21}, + {I_JP, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JPE[] = { + {I_JPE, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44361, 122}, + {I_JPE, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44457, 23}, + {I_JPE, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44553, 23}, + {I_JPE, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44649, 24}, + {I_JPE, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 21}, + {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48997, 21}, + {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44650, 122}, + {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33942, 21}, + {I_JPE, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48998, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JPO[] = { + {I_JPO, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44343, 122}, + {I_JPO, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44439, 23}, + {I_JPO, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44535, 23}, + {I_JPO, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44631, 24}, + {I_JPO, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 21}, + {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48982, 21}, + {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44632, 122}, + {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33921, 21}, + {I_JPO, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48983, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JS[] = { + {I_JS, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44367, 122}, + {I_JS, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44463, 23}, + {I_JS, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44559, 23}, + {I_JS, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44655, 24}, + {I_JS, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49003, 21}, + {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49002, 21}, + {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44656, 122}, + {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33949, 21}, + {I_JS, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49003, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_JZ[] = { + {I_JZ, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44301, 122}, + {I_JZ, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44397, 23}, + {I_JZ, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44493, 23}, + {I_JZ, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44589, 24}, + {I_JZ, 1, {IMMEDIATE|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 21}, + {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48947, 21}, + {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44590, 122}, + {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+33872, 21}, + {I_JZ, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+48948, 21}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETA[] = { + {I_SETA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49007, 53}, + {I_SETA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49007, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETAE[] = { + {I_SETAE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 53}, + {I_SETAE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETB[] = { + {I_SETB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 53}, + {I_SETB, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETBE[] = { + {I_SETBE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49022, 53}, + {I_SETBE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49022, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETC[] = { + {I_SETC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 53}, + {I_SETC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETE[] = { + {I_SETE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49027, 53}, + {I_SETE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49027, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETG[] = { + {I_SETG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49032, 53}, + {I_SETG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49032, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETGE[] = { + {I_SETGE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49037, 53}, + {I_SETGE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49037, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETL[] = { + {I_SETL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49042, 53}, + {I_SETL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49042, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETLE[] = { + {I_SETLE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49047, 53}, + {I_SETLE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49047, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNA[] = { + {I_SETNA, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49022, 53}, + {I_SETNA, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49022, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNAE[] = { + {I_SETNAE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 53}, + {I_SETNAE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49017, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNB[] = { + {I_SETNB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 53}, + {I_SETNB, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNBE[] = { + {I_SETNBE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49007, 53}, + {I_SETNBE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49007, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNC[] = { + {I_SETNC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 53}, + {I_SETNC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49012, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNE[] = { + {I_SETNE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49052, 53}, + {I_SETNE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49052, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNG[] = { + {I_SETNG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49047, 53}, + {I_SETNG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49047, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNGE[] = { + {I_SETNGE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49042, 53}, + {I_SETNGE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49042, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNL[] = { + {I_SETNL, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49037, 53}, + {I_SETNL, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49037, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNLE[] = { + {I_SETNLE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49032, 53}, + {I_SETNLE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49032, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNO[] = { + {I_SETNO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49057, 53}, + {I_SETNO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49057, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNP[] = { + {I_SETNP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49062, 53}, + {I_SETNP, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49062, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNS[] = { + {I_SETNS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49067, 53}, + {I_SETNS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49067, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETNZ[] = { + {I_SETNZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49052, 53}, + {I_SETNZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49052, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETO[] = { + {I_SETO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49072, 53}, + {I_SETO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49072, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETP[] = { + {I_SETP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49077, 53}, + {I_SETP, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49077, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETPE[] = { + {I_SETPE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49077, 53}, + {I_SETPE, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49077, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETPO[] = { + {I_SETPO, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49062, 53}, + {I_SETPO, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49062, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETS[] = { + {I_SETS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49082, 53}, + {I_SETS, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49082, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETZ[] = { + {I_SETZ, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49027, 53}, + {I_SETZ, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49027, 5}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDPS[] = { + {I_ADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44661, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDSS[] = { + {I_ADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44667, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ANDNPS[] = { + {I_ANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44673, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ANDPS[] = { + {I_ANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44679, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPEQPS[] = { + {I_CMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12528, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPEQSS[] = { + {I_CMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12536, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLEPS[] = { + {I_CMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12544, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLESS[] = { + {I_CMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12552, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLTPS[] = { + {I_CMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12560, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLTSS[] = { + {I_CMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12568, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNEQPS[] = { + {I_CMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12576, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNEQSS[] = { + {I_CMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12584, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLEPS[] = { + {I_CMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12592, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLESS[] = { + {I_CMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12600, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLTPS[] = { + {I_CMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12608, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLTSS[] = { + {I_CMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12616, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPORDPS[] = { + {I_CMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12624, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPORDSS[] = { + {I_CMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12632, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPUNORDPS[] = { + {I_CMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+12640, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPUNORDSS[] = { + {I_CMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12648, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPPS[] = { + {I_CMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33956, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSS[] = { + {I_CMPSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33963, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_COMISS[] = { + {I_COMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44685, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPI2PS[] = { + {I_CVTPI2PS, 2, {XMM_L16,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44691, 124}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPS2PI[] = { + {I_CVTPS2PI, 2, {MMXREG,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44697, 124}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSI2SS[] = { + {I_CVTSI2SS, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33971, 125}, + {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+33971, 125}, + {I_CVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+33970, 126}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSS2SI[] = { + {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33978, 125}, + {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33978, 125}, + {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33977, 127}, + {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+33977, 127}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTPS2PI[] = { + {I_CVTTPS2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44703, 128}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTSS2SI[] = { + {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33985, 125}, + {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33984, 127}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DIVPS[] = { + {I_DIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44709, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DIVSS[] = { + {I_DIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44715, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LDMXCSR[] = { + {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44721, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MAXPS[] = { + {I_MAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44727, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MAXSS[] = { + {I_MAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44733, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MINPS[] = { + {I_MINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44739, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MINSS[] = { + {I_MINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44745, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVAPS[] = { + {I_MOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44751, 123}, + {I_MOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44757, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVHPS[] = { + {I_MOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44763, 123}, + {I_MOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44769, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVLHPS[] = { + {I_MOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44763, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVLPS[] = { + {I_MOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+43893, 123}, + {I_MOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44775, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVHLPS[] = { + {I_MOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+43893, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVMSKPS[] = { + {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44781, 123}, + {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+33991, 129}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTPS[] = { + {I_MOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44787, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSS[] = { + {I_MOVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44793, 123}, + {I_MOVSS, 2, {RM_XMM_L16|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44799, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVUPS[] = { + {I_MOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44805, 123}, + {I_MOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44811, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MULPS[] = { + {I_MULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44817, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MULSS[] = { + {I_MULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44823, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ORPS[] = { + {I_ORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44829, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RCPPS[] = { + {I_RCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44835, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RCPSS[] = { + {I_RCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44841, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSQRTPS[] = { + {I_RSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44847, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSQRTSS[] = { + {I_RSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44853, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHUFPS[] = { + {I_SHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+33998, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SQRTPS[] = { + {I_SQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44859, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SQRTSS[] = { + {I_SQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44865, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STMXCSR[] = { + {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44871, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SUBPS[] = { + {I_SUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44877, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SUBSS[] = { + {I_SUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44883, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UCOMISS[] = { + {I_UCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44889, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UNPCKHPS[] = { + {I_UNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44895, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UNPCKLPS[] = { + {I_UNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44901, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XORPS[] = { + {I_XORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44907, 123}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXRSTOR[] = { + {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34006, 130}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXRSTOR64[] = { + {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34005, 131}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXSAVE[] = { + {I_FXSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34013, 130}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_FXSAVE64[] = { + {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34012, 131}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XGETBV[] = { + {I_XGETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49087, 132}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSETBV[] = { + {I_XSETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49092, 133}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVE[] = { + {I_XSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34020, 132}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVE64[] = { + {I_XSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34019, 134}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVEC[] = { + {I_XSAVEC, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34027, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVEC64[] = { + {I_XSAVEC64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34026, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVEOPT[] = { + {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34034, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVEOPT64[] = { + {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34033, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVES[] = { + {I_XSAVES, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34041, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSAVES64[] = { + {I_XSAVES64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34040, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XRSTOR[] = { + {I_XRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34048, 132}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XRSTOR64[] = { + {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34047, 134}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XRSTORS[] = { + {I_XRSTORS, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34055, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XRSTORS64[] = { + {I_XRSTORS64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34054, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHNTA[] = { + {I_PREFETCHNTA, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46126, 137}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHT0[] = { + {I_PREFETCHT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46144, 137}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHT1[] = { + {I_PREFETCHT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46162, 137}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHT2[] = { + {I_PREFETCHT2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46180, 137}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHIT0[] = { + {I_PREFETCHIT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46252, 138}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHIT1[] = { + {I_PREFETCHIT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46234, 138}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MASKMOVQ[] = { + {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+44913, 140}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTQ[] = { + {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+44919, 141}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAVGB[] = { + {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34061, 141}, + {I_PAVGB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45087, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PAVGW[] = { + {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34068, 141}, + {I_PAVGW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45093, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PEXTRW[] = { + {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34075, 142}, + {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34166, 152}, + {I_PEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34166, 153}, + {I_PEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 173}, + {I_PEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4277, 173}, + {I_PEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4276, 174}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PINSRW[] = { + {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34082, 142}, + {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34082, 142}, + {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34082, 142}, + {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34173, 152}, + {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34173, 152}, + {I_PINSRW, 3, {XMM_L16,REG_GPR|BITS64,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34173, 153}, + {I_PINSRW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34173, 152}, + {I_PINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34173, 152}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXSW[] = { + {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34089, 141}, + {I_PMAXSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45141, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXUB[] = { + {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34096, 141}, + {I_PMAXUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45147, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINSW[] = { + {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34103, 141}, + {I_PMINSW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45153, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINUB[] = { + {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34110, 141}, + {I_PMINUB, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45159, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVMSKB[] = { + {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+44925, 140}, + {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45165, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHUW[] = { + {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34117, 141}, + {I_PMULHUW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45171, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSADBW[] = { + {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34124, 141}, + {I_PSADBW, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45201, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSHUFW[] = { + {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12656, 143}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PF2IW[] = { + {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12664, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFNACC[] = { + {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12672, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFPNACC[] = { + {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12680, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PI2FW[] = { + {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12688, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSWAPD[] = { + {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12696, 91}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MASKMOVDQU[] = { + {I_MASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44931, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLFLUSH[] = { + {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+44937, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTDQ[] = { + {I_MOVNTDQ, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44943, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTI[] = { + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34132, 146}, + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34131, 147}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTPD[] = { + {I_MOVNTPD, 2, {MEMORY,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44949, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDQA[] = { + {I_MOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44955, 145}, + {I_MOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44961, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDQU[] = { + {I_MOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+44967, 145}, + {I_MOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44973, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDQ2Q[] = { + {I_MOVDQ2Q, 2, {MMXREG,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+44979, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVQ2DQ[] = { + {I_MOVQ2DQ, 2, {XMM_L16,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+44997, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PADDQ[] = { + {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45039, 151}, + {I_PADDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45045, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULUDQ[] = { + {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34180, 145}, + {I_PMULUDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45189, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSHUFD[] = { + {I_PSHUFD, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34187, 152}, + {I_PSHUFD, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34187, 154}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSHUFHW[] = { + {I_PSHUFHW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34194, 152}, + {I_PSHUFHW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34194, 154}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSHUFLW[] = { + {I_PSHUFLW, 3, {XMM_L16,XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34201, 152}, + {I_PSHUFLW, 3, {XMM_L16,MEMORY,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+34201, 154}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSLLDQ[] = { + {I_PSLLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34208, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSRLDQ[] = { + {I_PSRLDQ, 2, {XMM_L16,IMMEDIATE,0,0,0}, NO_DECORATOR, nasm_bytecodes+34250, 155}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSUBQ[] = { + {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34278, 145}, + {I_PSUBQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45273, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKHQDQ[] = { + {I_PUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45321, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PUNPCKLQDQ[] = { + {I_PUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45345, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDPD[] = { + {I_ADDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45357, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDSD[] = { + {I_ADDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45363, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ANDNPD[] = { + {I_ANDNPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45369, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ANDPD[] = { + {I_ANDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45375, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPEQPD[] = { + {I_CMPEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12704, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPEQSD[] = { + {I_CMPEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12712, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLEPD[] = { + {I_CMPLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12720, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLESD[] = { + {I_CMPLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12728, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLTPD[] = { + {I_CMPLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12736, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLTSD[] = { + {I_CMPLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12744, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNEQPD[] = { + {I_CMPNEQPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12752, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNEQSD[] = { + {I_CMPNEQSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12760, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLEPD[] = { + {I_CMPNLEPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12768, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLESD[] = { + {I_CMPNLESD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12776, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLTPD[] = { + {I_CMPNLTPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12784, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLTSD[] = { + {I_CMPNLTSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12792, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPORDPD[] = { + {I_CMPORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12800, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPORDSD[] = { + {I_CMPORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12808, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPUNORDPD[] = { + {I_CMPUNORDPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12816, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPUNORDSD[] = { + {I_CMPUNORDSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12824, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPPD[] = { + {I_CMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34285, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_COMISD[] = { + {I_COMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45381, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTDQ2PD[] = { + {I_CVTDQ2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45387, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTDQ2PS[] = { + {I_CVTDQ2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45393, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPD2DQ[] = { + {I_CVTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45399, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPD2PI[] = { + {I_CVTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45405, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPD2PS[] = { + {I_CVTPD2PS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45411, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPI2PD[] = { + {I_CVTPI2PD, 2, {XMM_L16,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+45417, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPS2DQ[] = { + {I_CVTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45423, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTPS2PD[] = { + {I_CVTPS2PD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45429, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSD2SI[] = { + {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34299, 156}, + {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34299, 156}, + {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34306, 157}, + {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34306, 157}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSD2SS[] = { + {I_CVTSD2SS, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45435, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSI2SD[] = { + {I_CVTSI2SD, 2, {XMM_L16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34321, 158}, + {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34313, 158}, + {I_CVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34320, 157}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTSS2SD[] = { + {I_CVTSS2SD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45441, 148}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTPD2PI[] = { + {I_CVTTPD2PI, 2, {MMXREG,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45447, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTPD2DQ[] = { + {I_CVTTPD2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45453, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTPS2DQ[] = { + {I_CVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45459, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CVTTSD2SI[] = { + {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34327, 156}, + {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34327, 156}, + {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34334, 157}, + {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+34334, 157}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DIVPD[] = { + {I_DIVPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45465, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DIVSD[] = { + {I_DIVSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45471, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MAXPD[] = { + {I_MAXPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45477, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MAXSD[] = { + {I_MAXSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45483, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MINPD[] = { + {I_MINPD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45489, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MINSD[] = { + {I_MINSD, 2, {XMM_L16,RM_XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45495, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVAPD[] = { + {I_MOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45501, 144}, + {I_MOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45507, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVHPD[] = { + {I_MOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45513, 144}, + {I_MOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45519, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVLPD[] = { + {I_MOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45525, 144}, + {I_MOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45531, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVMSKPD[] = { + {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45537, 144}, + {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34341, 150}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVUPD[] = { + {I_MOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45555, 144}, + {I_MOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45561, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MULPD[] = { + {I_MULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45567, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MULSD[] = { + {I_MULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45573, 149}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ORPD[] = { + {I_ORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45579, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHUFPD[] = { + {I_SHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+34348, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SQRTPD[] = { + {I_SQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45585, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SQRTSD[] = { + {I_SQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45591, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SUBPD[] = { + {I_SUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45597, 145}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SUBSD[] = { + {I_SUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45603, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UCOMISD[] = { + {I_UCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45609, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UNPCKHPD[] = { + {I_UNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45615, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UNPCKLPD[] = { + {I_UNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45621, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XORPD[] = { + {I_XORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45627, 144}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDSUBPD[] = { + {I_ADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45633, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADDSUBPS[] = { + {I_ADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45639, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HADDPD[] = { + {I_HADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45645, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HADDPS[] = { + {I_HADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45651, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HSUBPD[] = { + {I_HSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45657, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HSUBPS[] = { + {I_HSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45663, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LDDQU[] = { + {I_LDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45669, 159}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDDUP[] = { + {I_MOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45675, 160}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSHDUP[] = { + {I_MOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45681, 161}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVSLDUP[] = { + {I_MOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45687, 161}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLGI[] = { + {I_CLGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49097, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STGI[] = { + {I_STGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49102, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMCALL[] = { + {I_VMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45730, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMCLEAR[] = { + {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45693, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMFUNC[] = { + {I_VMFUNC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49107, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMLAUNCH[] = { + {I_VMLAUNCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49112, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMLOAD[] = { + {I_VMLOAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49117, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMMCALL[] = { + {I_VMMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49122, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMPTRLD[] = { + {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45699, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMPTRST[] = { + {I_VMPTRST, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45705, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMREAD[] = { + {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34356, 164}, + {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34355, 165}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMRESUME[] = { + {I_VMRESUME, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49127, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMRUN[] = { + {I_VMRUN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49132, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMSAVE[] = { + {I_VMSAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49137, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMWRITE[] = { + {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34363, 164}, + {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34362, 165}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMXOFF[] = { + {I_VMXOFF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49142, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMXON[] = { + {I_VMXON, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42511, 163}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVEPT[] = { + {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12833, 166}, + {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12832, 167}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INVVPID[] = { + {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12841, 166}, + {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+12840, 167}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PVALIDATE[] = { + {I_PVALIDATE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45711, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RMPADJUST[] = { + {I_RMPADJUST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45717, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMGEXIT[] = { + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45723, 162}, + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45729, 162}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PABSB[] = { + {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34369, 168}, + {I_PABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34376, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PABSW[] = { + {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34383, 168}, + {I_PABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34390, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PABSD[] = { + {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34397, 168}, + {I_PABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34404, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PALIGNR[] = { + {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12848, 168}, + {I_PALIGNR, 3, {XMM_L16,RM_XMM_L16,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12856, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHADDW[] = { + {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34411, 168}, + {I_PHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34418, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHADDD[] = { + {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34425, 168}, + {I_PHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34432, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHADDSW[] = { + {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34439, 168}, + {I_PHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34446, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHSUBW[] = { + {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34453, 168}, + {I_PHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34460, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHSUBD[] = { + {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34467, 168}, + {I_PHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34474, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHSUBSW[] = { + {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34481, 168}, + {I_PHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34488, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMADDUBSW[] = { + {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34495, 168}, + {I_PMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34502, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULHRSW[] = { + {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34509, 168}, + {I_PMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34516, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSHUFB[] = { + {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34523, 168}, + {I_PSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34530, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSIGNB[] = { + {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34537, 168}, + {I_PSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34544, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSIGNW[] = { + {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34551, 168}, + {I_PSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34558, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PSIGND[] = { + {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+34565, 168}, + {I_PSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34572, 169}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_EXTRQ[] = { + {I_EXTRQ, 3, {XMM_L16,IMMEDIATE,IMMEDIATE,0,0}, NO_DECORATOR, nasm_bytecodes+12864, 170}, + {I_EXTRQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45735, 170}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INSERTQ[] = { + {I_INSERTQ, 4, {XMM_L16,XMM_L16,IMMEDIATE,IMMEDIATE,0}, NO_DECORATOR, nasm_bytecodes+12872, 170}, + {I_INSERTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45741, 170}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTSD[] = { + {I_MOVNTSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45747, 171}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTSS[] = { + {I_MOVNTSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+45753, 172}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LZCNT[] = { + {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34579, 113}, + {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34586, 113}, + {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34593, 59}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLENDPD[] = { + {I_BLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12880, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLENDPS[] = { + {I_BLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12888, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLENDVPD[] = { + {I_BLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34600, 173}, + {I_BLENDVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34600, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLENDVPS[] = { + {I_BLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34607, 173}, + {I_BLENDVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34607, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DPPD[] = { + {I_DPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12896, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_DPPS[] = { + {I_DPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12904, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_EXTRACTPS[] = { + {I_EXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4241, 173}, + {I_EXTRACTPS, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4240, 174}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INSERTPS[] = { + {I_INSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12912, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVNTDQA[] = { + {I_MOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34614, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MPSADBW[] = { + {I_MPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12920, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PACKUSDW[] = { + {I_PACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34621, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PBLENDVB[] = { + {I_PBLENDVB, 3, {XMM_L16,RM_XMM_L16,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+34628, 173}, + {I_PBLENDVB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34628, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PBLENDW[] = { + {I_PBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12928, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPEQQ[] = { + {I_PCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34635, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PEXTRB[] = { + {I_PEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 173}, + {I_PEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4250, 173}, + {I_PEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4249, 174}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PEXTRD[] = { + {I_PEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4258, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PEXTRQ[] = { + {I_PEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4267, 174}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PHMINPOSUW[] = { + {I_PHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34642, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PINSRB[] = { + {I_PINSRB, 3, {XMM_L16,MEMORY,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 175}, + {I_PINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4285, 175}, + {I_PINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4286, 175}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PINSRD[] = { + {I_PINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4294, 175}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PINSRQ[] = { + {I_PINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 176}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXSB[] = { + {I_PMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34649, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXSD[] = { + {I_PMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34656, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXUD[] = { + {I_PMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34663, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMAXUW[] = { + {I_PMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34670, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINSB[] = { + {I_PMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34677, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINSD[] = { + {I_PMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34684, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINUD[] = { + {I_PMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34691, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMINUW[] = { + {I_PMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34698, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXBW[] = { + {I_PMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34705, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXBD[] = { + {I_PMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34712, 178}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXBQ[] = { + {I_PMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34719, 179}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXWD[] = { + {I_PMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34726, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXWQ[] = { + {I_PMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34733, 178}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVSXDQ[] = { + {I_PMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34740, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXBW[] = { + {I_PMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34747, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXBD[] = { + {I_PMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34754, 178}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXBQ[] = { + {I_PMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34761, 179}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXWD[] = { + {I_PMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34768, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXWQ[] = { + {I_PMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34775, 178}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMOVZXDQ[] = { + {I_PMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34782, 177}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULDQ[] = { + {I_PMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34789, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PMULLD[] = { + {I_PMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34796, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PTEST[] = { + {I_PTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34803, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROUNDPD[] = { + {I_ROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12936, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROUNDPS[] = { + {I_ROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12944, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROUNDSD[] = { + {I_ROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12952, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ROUNDSS[] = { + {I_ROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12960, 173}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CRC32[] = { + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12985, 180}, + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12968, 180}, + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12976, 180}, + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12984, 181}, + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12992, 181}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPESTRI[] = { + {I_PCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13000, 180}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPESTRM[] = { + {I_PCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13008, 180}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPISTRI[] = { + {I_PCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13016, 180}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPISTRM[] = { + {I_PCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13024, 180}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCMPGTQ[] = { + {I_PCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34810, 180}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_POPCNT[] = { + {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+34817, 182}, + {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34824, 183}, + {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34831, 184}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_GETSEC[] = { + {I_GETSEC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+50183, 139}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRCPV[] = { + {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13032, 185}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PFRSQRTV[] = { + {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+13040, 185}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVBE[] = { + {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13048, 186}, + {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13056, 186}, + {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13064, 186}, + {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+13072, 186}, + {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13080, 186}, + {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13088, 186}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESENC[] = { + {I_AESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34838, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESENCLAST[] = { + {I_AESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34845, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESDEC[] = { + {I_AESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34852, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESDECLAST[] = { + {I_AESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34859, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESIMC[] = { + {I_AESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34866, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AESKEYGENASSIST[] = { + {I_AESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13096, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESENC[] = { + {I_VAESENC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34873, 188}, + {I_VAESENC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34880, 188}, + {I_VAESENC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34936, 189}, + {I_VAESENC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34943, 189}, + {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13112, 190}, + {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13120, 190}, + {I_VAESENC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13128, 190}, + {I_VAESENC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13136, 190}, + {I_VAESENC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13240, 191}, + {I_VAESENC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13248, 191}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESENCLAST[] = { + {I_VAESENCLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34887, 188}, + {I_VAESENCLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34894, 188}, + {I_VAESENCLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34950, 189}, + {I_VAESENCLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34957, 189}, + {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13144, 190}, + {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13152, 190}, + {I_VAESENCLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13160, 190}, + {I_VAESENCLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13168, 190}, + {I_VAESENCLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13256, 191}, + {I_VAESENCLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13264, 191}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESDEC[] = { + {I_VAESDEC, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34901, 188}, + {I_VAESDEC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34908, 188}, + {I_VAESDEC, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34964, 189}, + {I_VAESDEC, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34971, 189}, + {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13176, 190}, + {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13184, 190}, + {I_VAESDEC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13192, 190}, + {I_VAESDEC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13200, 190}, + {I_VAESDEC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13272, 191}, + {I_VAESDEC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13280, 191}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESDECLAST[] = { + {I_VAESDECLAST, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34915, 188}, + {I_VAESDECLAST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34922, 188}, + {I_VAESDECLAST, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+34978, 189}, + {I_VAESDECLAST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34985, 189}, + {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+13208, 190}, + {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+13216, 190}, + {I_VAESDECLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+13224, 190}, + {I_VAESDECLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+13232, 190}, + {I_VAESDECLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+13288, 191}, + {I_VAESDECLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+13296, 191}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESIMC[] = { + {I_VAESIMC, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34929, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VAESKEYGENASSIST[] = { + {I_VAESKEYGENASSIST, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13104, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDPD[] = { + {I_VADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+34992, 188}, + {I_VADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34999, 188}, + {I_VADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35006, 188}, + {I_VADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35013, 188}, + {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16376, 240}, + {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16384, 240}, + {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16392, 240}, + {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16400, 240}, + {I_VADDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+16408, 241}, + {I_VADDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+16416, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDPS[] = { + {I_VADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35020, 188}, + {I_VADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35027, 188}, + {I_VADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35034, 188}, + {I_VADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35041, 188}, + {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16424, 240}, + {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16432, 240}, + {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16440, 240}, + {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16448, 240}, + {I_VADDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+16456, 241}, + {I_VADDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+16464, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDSD[] = { + {I_VADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35048, 188}, + {I_VADDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35055, 188}, + {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16472, 241}, + {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16480, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDSS[] = { + {I_VADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35062, 188}, + {I_VADDSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35069, 188}, + {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+16488, 241}, + {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+16496, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDSUBPD[] = { + {I_VADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35076, 188}, + {I_VADDSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35083, 188}, + {I_VADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35090, 188}, + {I_VADDSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35097, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDSUBPS[] = { + {I_VADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35104, 188}, + {I_VADDSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35111, 188}, + {I_VADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35118, 188}, + {I_VADDSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35125, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VANDPD[] = { + {I_VANDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35132, 188}, + {I_VANDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35139, 188}, + {I_VANDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35146, 188}, + {I_VANDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35153, 188}, + {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16600, 242}, + {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16608, 242}, + {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16616, 242}, + {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16624, 242}, + {I_VANDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16632, 243}, + {I_VANDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16640, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VANDPS[] = { + {I_VANDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35160, 188}, + {I_VANDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35167, 188}, + {I_VANDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35174, 188}, + {I_VANDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35181, 188}, + {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16648, 242}, + {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16656, 242}, + {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16664, 242}, + {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16672, 242}, + {I_VANDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16680, 243}, + {I_VANDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16688, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VANDNPD[] = { + {I_VANDNPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35188, 188}, + {I_VANDNPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35195, 188}, + {I_VANDNPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35202, 188}, + {I_VANDNPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35209, 188}, + {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16504, 242}, + {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16512, 242}, + {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16520, 242}, + {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16528, 242}, + {I_VANDNPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16536, 243}, + {I_VANDNPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+16544, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VANDNPS[] = { + {I_VANDNPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35216, 188}, + {I_VANDNPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35223, 188}, + {I_VANDNPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35230, 188}, + {I_VANDNPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35237, 188}, + {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16552, 242}, + {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16560, 242}, + {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16568, 242}, + {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16576, 242}, + {I_VANDNPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16584, 243}, + {I_VANDNPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+16592, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDPD[] = { + {I_VBLENDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13304, 188}, + {I_VBLENDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13312, 188}, + {I_VBLENDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13320, 188}, + {I_VBLENDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13328, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDPS[] = { + {I_VBLENDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13336, 188}, + {I_VBLENDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13344, 188}, + {I_VBLENDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13352, 188}, + {I_VBLENDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13360, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDVPD[] = { + {I_VBLENDVPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13368, 188}, + {I_VBLENDVPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13376, 188}, + {I_VBLENDVPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13384, 188}, + {I_VBLENDVPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13392, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDVPS[] = { + {I_VBLENDVPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13400, 188}, + {I_VBLENDVPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13408, 188}, + {I_VBLENDVPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13416, 188}, + {I_VBLENDVPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13424, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTSS[] = { + {I_VBROADCASTSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35244, 188}, + {I_VBROADCASTSS, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35251, 188}, + {I_VBROADCASTSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35244, 207}, + {I_VBROADCASTSS, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35251, 207}, + {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16912, 240}, + {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16920, 240}, + {I_VBROADCASTSS, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16928, 241}, + {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16936, 240}, + {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16944, 240}, + {I_VBROADCASTSS, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16952, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTSD[] = { + {I_VBROADCASTSD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35258, 188}, + {I_VBROADCASTSD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35258, 207}, + {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16880, 240}, + {I_VBROADCASTSD, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16888, 241}, + {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16896, 240}, + {I_VBROADCASTSD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF128[] = { + {I_VBROADCASTF128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35265, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OSPD[] = { + {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 188}, + {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 188}, + {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 188}, + {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 188}, + {I_VCMPEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4312, 188}, + {I_VCMPEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4321, 188}, + {I_VCMPEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4330, 188}, + {I_VCMPEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4339, 188}, + {I_VCMPEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1520, 240}, + {I_VCMPEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1530, 240}, + {I_VCMPEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1540, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQPD[] = { + {I_VCMPEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4348, 188}, + {I_VCMPEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4357, 188}, + {I_VCMPEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4366, 188}, + {I_VCMPEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4375, 188}, + {I_VCMPEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 240}, + {I_VCMPEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 240}, + {I_VCMPEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OSPD[] = { + {I_VCMPLT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 188}, + {I_VCMPLT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 188}, + {I_VCMPLT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 188}, + {I_VCMPLT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 188}, + {I_VCMPLT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 240}, + {I_VCMPLT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 240}, + {I_VCMPLT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLTPD[] = { + {I_VCMPLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4384, 188}, + {I_VCMPLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4393, 188}, + {I_VCMPLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 188}, + {I_VCMPLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4411, 188}, + {I_VCMPLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+320, 240}, + {I_VCMPLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+330, 240}, + {I_VCMPLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+340, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OSPD[] = { + {I_VCMPLE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 188}, + {I_VCMPLE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 188}, + {I_VCMPLE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 188}, + {I_VCMPLE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 188}, + {I_VCMPLE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 240}, + {I_VCMPLE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 240}, + {I_VCMPLE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLEPD[] = { + {I_VCMPLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4420, 188}, + {I_VCMPLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4429, 188}, + {I_VCMPLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4438, 188}, + {I_VCMPLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4447, 188}, + {I_VCMPLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+400, 240}, + {I_VCMPLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+410, 240}, + {I_VCMPLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_QPD[] = { + {I_VCMPUNORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 188}, + {I_VCMPUNORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 188}, + {I_VCMPUNORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 188}, + {I_VCMPUNORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 188}, + {I_VCMPUNORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 240}, + {I_VCMPUNORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 240}, + {I_VCMPUNORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORDPD[] = { + {I_VCMPUNORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4456, 188}, + {I_VCMPUNORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4465, 188}, + {I_VCMPUNORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4474, 188}, + {I_VCMPUNORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4483, 188}, + {I_VCMPUNORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+480, 240}, + {I_VCMPUNORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+490, 240}, + {I_VCMPUNORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+500, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_UQPD[] = { + {I_VCMPNEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 188}, + {I_VCMPNEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 188}, + {I_VCMPNEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 188}, + {I_VCMPNEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 188}, + {I_VCMPNEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 240}, + {I_VCMPNEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 240}, + {I_VCMPNEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQPD[] = { + {I_VCMPNEQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4492, 188}, + {I_VCMPNEQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 188}, + {I_VCMPNEQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4510, 188}, + {I_VCMPNEQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4519, 188}, + {I_VCMPNEQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+560, 240}, + {I_VCMPNEQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+570, 240}, + {I_VCMPNEQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+580, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_USPD[] = { + {I_VCMPNLT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 188}, + {I_VCMPNLT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 188}, + {I_VCMPNLT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 188}, + {I_VCMPNLT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 188}, + {I_VCMPNLT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 240}, + {I_VCMPNLT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 240}, + {I_VCMPNLT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLTPD[] = { + {I_VCMPNLTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4528, 188}, + {I_VCMPNLTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4537, 188}, + {I_VCMPNLTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4546, 188}, + {I_VCMPNLTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4555, 188}, + {I_VCMPNLTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+640, 240}, + {I_VCMPNLTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+650, 240}, + {I_VCMPNLTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_USPD[] = { + {I_VCMPNLE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 188}, + {I_VCMPNLE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 188}, + {I_VCMPNLE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 188}, + {I_VCMPNLE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 188}, + {I_VCMPNLE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 240}, + {I_VCMPNLE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 240}, + {I_VCMPNLE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLEPD[] = { + {I_VCMPNLEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4564, 188}, + {I_VCMPNLEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4573, 188}, + {I_VCMPNLEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4582, 188}, + {I_VCMPNLEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4591, 188}, + {I_VCMPNLEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+720, 240}, + {I_VCMPNLEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+730, 240}, + {I_VCMPNLEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+740, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_QPD[] = { + {I_VCMPORD_QPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 188}, + {I_VCMPORD_QPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 188}, + {I_VCMPORD_QPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 188}, + {I_VCMPORD_QPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 188}, + {I_VCMPORD_QPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 240}, + {I_VCMPORD_QPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 240}, + {I_VCMPORD_QPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORDPD[] = { + {I_VCMPORDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 188}, + {I_VCMPORDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4609, 188}, + {I_VCMPORDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4618, 188}, + {I_VCMPORDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4627, 188}, + {I_VCMPORDPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+800, 240}, + {I_VCMPORDPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+810, 240}, + {I_VCMPORDPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+820, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_UQPD[] = { + {I_VCMPEQ_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4636, 188}, + {I_VCMPEQ_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4645, 188}, + {I_VCMPEQ_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4654, 188}, + {I_VCMPEQ_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4663, 188}, + {I_VCMPEQ_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+880, 240}, + {I_VCMPEQ_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+890, 240}, + {I_VCMPEQ_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+900, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_USPD[] = { + {I_VCMPNGE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 188}, + {I_VCMPNGE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 188}, + {I_VCMPNGE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 188}, + {I_VCMPNGE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 188}, + {I_VCMPNGE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 240}, + {I_VCMPNGE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 240}, + {I_VCMPNGE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGEPD[] = { + {I_VCMPNGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4672, 188}, + {I_VCMPNGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4681, 188}, + {I_VCMPNGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4690, 188}, + {I_VCMPNGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 188}, + {I_VCMPNGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+960, 240}, + {I_VCMPNGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+970, 240}, + {I_VCMPNGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+980, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_USPD[] = { + {I_VCMPNGT_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 188}, + {I_VCMPNGT_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 188}, + {I_VCMPNGT_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 188}, + {I_VCMPNGT_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 188}, + {I_VCMPNGT_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 240}, + {I_VCMPNGT_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 240}, + {I_VCMPNGT_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGTPD[] = { + {I_VCMPNGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4708, 188}, + {I_VCMPNGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4717, 188}, + {I_VCMPNGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4726, 188}, + {I_VCMPNGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4735, 188}, + {I_VCMPNGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1040, 240}, + {I_VCMPNGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1050, 240}, + {I_VCMPNGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1060, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OQPD[] = { + {I_VCMPFALSE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 188}, + {I_VCMPFALSE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 188}, + {I_VCMPFALSE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 188}, + {I_VCMPFALSE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 188}, + {I_VCMPFALSE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 240}, + {I_VCMPFALSE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 240}, + {I_VCMPFALSE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSEPD[] = { + {I_VCMPFALSEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4744, 188}, + {I_VCMPFALSEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4753, 188}, + {I_VCMPFALSEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4762, 188}, + {I_VCMPFALSEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4771, 188}, + {I_VCMPFALSEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1120, 240}, + {I_VCMPFALSEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1130, 240}, + {I_VCMPFALSEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1140, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OQPD[] = { + {I_VCMPNEQ_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4780, 188}, + {I_VCMPNEQ_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4789, 188}, + {I_VCMPNEQ_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4798, 188}, + {I_VCMPNEQ_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4807, 188}, + {I_VCMPNEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1200, 240}, + {I_VCMPNEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1210, 240}, + {I_VCMPNEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1220, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OSPD[] = { + {I_VCMPGE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 188}, + {I_VCMPGE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 188}, + {I_VCMPGE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 188}, + {I_VCMPGE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 188}, + {I_VCMPGE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 240}, + {I_VCMPGE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 240}, + {I_VCMPGE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGEPD[] = { + {I_VCMPGEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4816, 188}, + {I_VCMPGEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4825, 188}, + {I_VCMPGEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4834, 188}, + {I_VCMPGEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4843, 188}, + {I_VCMPGEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1280, 240}, + {I_VCMPGEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1290, 240}, + {I_VCMPGEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1300, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OSPD[] = { + {I_VCMPGT_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 188}, + {I_VCMPGT_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 188}, + {I_VCMPGT_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 188}, + {I_VCMPGT_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 188}, + {I_VCMPGT_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 240}, + {I_VCMPGT_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 240}, + {I_VCMPGT_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGTPD[] = { + {I_VCMPGTPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4852, 188}, + {I_VCMPGTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4861, 188}, + {I_VCMPGTPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4870, 188}, + {I_VCMPGTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4879, 188}, + {I_VCMPGTPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1360, 240}, + {I_VCMPGTPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1370, 240}, + {I_VCMPGTPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1380, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_UQPD[] = { + {I_VCMPTRUE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 188}, + {I_VCMPTRUE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 188}, + {I_VCMPTRUE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 188}, + {I_VCMPTRUE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 188}, + {I_VCMPTRUE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 240}, + {I_VCMPTRUE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 240}, + {I_VCMPTRUE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUEPD[] = { + {I_VCMPTRUEPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4888, 188}, + {I_VCMPTRUEPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4897, 188}, + {I_VCMPTRUEPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4906, 188}, + {I_VCMPTRUEPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4915, 188}, + {I_VCMPTRUEPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1440, 240}, + {I_VCMPTRUEPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1450, 240}, + {I_VCMPTRUEPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1460, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OQPD[] = { + {I_VCMPLT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4924, 188}, + {I_VCMPLT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4933, 188}, + {I_VCMPLT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4942, 188}, + {I_VCMPLT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4951, 188}, + {I_VCMPLT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1600, 240}, + {I_VCMPLT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1610, 240}, + {I_VCMPLT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1620, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OQPD[] = { + {I_VCMPLE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4960, 188}, + {I_VCMPLE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4969, 188}, + {I_VCMPLE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4978, 188}, + {I_VCMPLE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4987, 188}, + {I_VCMPLE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1680, 240}, + {I_VCMPLE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1690, 240}, + {I_VCMPLE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1700, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_SPD[] = { + {I_VCMPUNORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4996, 188}, + {I_VCMPUNORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5005, 188}, + {I_VCMPUNORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5014, 188}, + {I_VCMPUNORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5023, 188}, + {I_VCMPUNORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1760, 240}, + {I_VCMPUNORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1770, 240}, + {I_VCMPUNORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1780, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_USPD[] = { + {I_VCMPNEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5032, 188}, + {I_VCMPNEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5041, 188}, + {I_VCMPNEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5050, 188}, + {I_VCMPNEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5059, 188}, + {I_VCMPNEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1840, 240}, + {I_VCMPNEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1850, 240}, + {I_VCMPNEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1860, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_UQPD[] = { + {I_VCMPNLT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5068, 188}, + {I_VCMPNLT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5077, 188}, + {I_VCMPNLT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5086, 188}, + {I_VCMPNLT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5095, 188}, + {I_VCMPNLT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1920, 240}, + {I_VCMPNLT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+1930, 240}, + {I_VCMPNLT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+1940, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_UQPD[] = { + {I_VCMPNLE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5104, 188}, + {I_VCMPNLE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5113, 188}, + {I_VCMPNLE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5122, 188}, + {I_VCMPNLE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5131, 188}, + {I_VCMPNLE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2000, 240}, + {I_VCMPNLE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2010, 240}, + {I_VCMPNLE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2020, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_SPD[] = { + {I_VCMPORD_SPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5140, 188}, + {I_VCMPORD_SPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5149, 188}, + {I_VCMPORD_SPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5158, 188}, + {I_VCMPORD_SPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5167, 188}, + {I_VCMPORD_SPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2080, 240}, + {I_VCMPORD_SPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2090, 240}, + {I_VCMPORD_SPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2100, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_USPD[] = { + {I_VCMPEQ_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5176, 188}, + {I_VCMPEQ_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5185, 188}, + {I_VCMPEQ_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5194, 188}, + {I_VCMPEQ_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5203, 188}, + {I_VCMPEQ_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2160, 240}, + {I_VCMPEQ_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2170, 240}, + {I_VCMPEQ_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2180, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_UQPD[] = { + {I_VCMPNGE_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5212, 188}, + {I_VCMPNGE_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5221, 188}, + {I_VCMPNGE_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5230, 188}, + {I_VCMPNGE_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5239, 188}, + {I_VCMPNGE_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2240, 240}, + {I_VCMPNGE_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2250, 240}, + {I_VCMPNGE_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2260, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_UQPD[] = { + {I_VCMPNGT_UQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5248, 188}, + {I_VCMPNGT_UQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5257, 188}, + {I_VCMPNGT_UQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5266, 188}, + {I_VCMPNGT_UQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5275, 188}, + {I_VCMPNGT_UQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2320, 240}, + {I_VCMPNGT_UQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2330, 240}, + {I_VCMPNGT_UQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2340, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OSPD[] = { + {I_VCMPFALSE_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5284, 188}, + {I_VCMPFALSE_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5293, 188}, + {I_VCMPFALSE_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5302, 188}, + {I_VCMPFALSE_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5311, 188}, + {I_VCMPFALSE_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2400, 240}, + {I_VCMPFALSE_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2410, 240}, + {I_VCMPFALSE_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OSPD[] = { + {I_VCMPNEQ_OSPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5320, 188}, + {I_VCMPNEQ_OSPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5329, 188}, + {I_VCMPNEQ_OSPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5338, 188}, + {I_VCMPNEQ_OSPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5347, 188}, + {I_VCMPNEQ_OSPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2480, 240}, + {I_VCMPNEQ_OSPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2490, 240}, + {I_VCMPNEQ_OSPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2500, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OQPD[] = { + {I_VCMPGE_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5356, 188}, + {I_VCMPGE_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5365, 188}, + {I_VCMPGE_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5374, 188}, + {I_VCMPGE_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5383, 188}, + {I_VCMPGE_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2560, 240}, + {I_VCMPGE_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2570, 240}, + {I_VCMPGE_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2580, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OQPD[] = { + {I_VCMPGT_OQPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5392, 188}, + {I_VCMPGT_OQPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5401, 188}, + {I_VCMPGT_OQPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5410, 188}, + {I_VCMPGT_OQPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5419, 188}, + {I_VCMPGT_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2640, 240}, + {I_VCMPGT_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2650, 240}, + {I_VCMPGT_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_USPD[] = { + {I_VCMPTRUE_USPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5428, 188}, + {I_VCMPTRUE_USPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5437, 188}, + {I_VCMPTRUE_USPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5446, 188}, + {I_VCMPTRUE_USPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5455, 188}, + {I_VCMPTRUE_USPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2720, 240}, + {I_VCMPTRUE_USPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2730, 240}, + {I_VCMPTRUE_USPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+2740, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPPD[] = { + {I_VCMPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13432, 188}, + {I_VCMPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13440, 188}, + {I_VCMPPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13448, 188}, + {I_VCMPPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13456, 188}, + {I_VCMPPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8110, 240}, + {I_VCMPPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8119, 240}, + {I_VCMPPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+8128, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OSPS[] = { + {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 188}, + {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 188}, + {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 188}, + {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 188}, + {I_VCMPEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5464, 188}, + {I_VCMPEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5473, 188}, + {I_VCMPEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5482, 188}, + {I_VCMPEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5491, 188}, + {I_VCMPEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1550, 240}, + {I_VCMPEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1560, 240}, + {I_VCMPEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1570, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQPS[] = { + {I_VCMPEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5500, 188}, + {I_VCMPEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5509, 188}, + {I_VCMPEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5518, 188}, + {I_VCMPEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5527, 188}, + {I_VCMPEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 240}, + {I_VCMPEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 240}, + {I_VCMPEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OSPS[] = { + {I_VCMPLT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 188}, + {I_VCMPLT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 188}, + {I_VCMPLT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 188}, + {I_VCMPLT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 188}, + {I_VCMPLT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 240}, + {I_VCMPLT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 240}, + {I_VCMPLT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLTPS[] = { + {I_VCMPLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5536, 188}, + {I_VCMPLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5545, 188}, + {I_VCMPLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5554, 188}, + {I_VCMPLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5563, 188}, + {I_VCMPLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+350, 240}, + {I_VCMPLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+360, 240}, + {I_VCMPLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+370, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OSPS[] = { + {I_VCMPLE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 188}, + {I_VCMPLE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 188}, + {I_VCMPLE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 188}, + {I_VCMPLE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 188}, + {I_VCMPLE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 240}, + {I_VCMPLE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 240}, + {I_VCMPLE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLEPS[] = { + {I_VCMPLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5572, 188}, + {I_VCMPLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5581, 188}, + {I_VCMPLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5590, 188}, + {I_VCMPLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5599, 188}, + {I_VCMPLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+430, 240}, + {I_VCMPLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+440, 240}, + {I_VCMPLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+450, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_QPS[] = { + {I_VCMPUNORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 188}, + {I_VCMPUNORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 188}, + {I_VCMPUNORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 188}, + {I_VCMPUNORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 188}, + {I_VCMPUNORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 240}, + {I_VCMPUNORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 240}, + {I_VCMPUNORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORDPS[] = { + {I_VCMPUNORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5608, 188}, + {I_VCMPUNORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5617, 188}, + {I_VCMPUNORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5626, 188}, + {I_VCMPUNORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5635, 188}, + {I_VCMPUNORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+510, 240}, + {I_VCMPUNORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+520, 240}, + {I_VCMPUNORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+530, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_UQPS[] = { + {I_VCMPNEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 188}, + {I_VCMPNEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 188}, + {I_VCMPNEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 188}, + {I_VCMPNEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 188}, + {I_VCMPNEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 240}, + {I_VCMPNEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 240}, + {I_VCMPNEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQPS[] = { + {I_VCMPNEQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5644, 188}, + {I_VCMPNEQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5653, 188}, + {I_VCMPNEQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5662, 188}, + {I_VCMPNEQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5671, 188}, + {I_VCMPNEQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+590, 240}, + {I_VCMPNEQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+600, 240}, + {I_VCMPNEQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+610, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_USPS[] = { + {I_VCMPNLT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 188}, + {I_VCMPNLT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 188}, + {I_VCMPNLT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 188}, + {I_VCMPNLT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 188}, + {I_VCMPNLT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 240}, + {I_VCMPNLT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 240}, + {I_VCMPNLT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLTPS[] = { + {I_VCMPNLTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5680, 188}, + {I_VCMPNLTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5689, 188}, + {I_VCMPNLTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5698, 188}, + {I_VCMPNLTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5707, 188}, + {I_VCMPNLTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+670, 240}, + {I_VCMPNLTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+680, 240}, + {I_VCMPNLTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+690, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_USPS[] = { + {I_VCMPNLE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 188}, + {I_VCMPNLE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 188}, + {I_VCMPNLE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 188}, + {I_VCMPNLE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 188}, + {I_VCMPNLE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 240}, + {I_VCMPNLE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 240}, + {I_VCMPNLE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLEPS[] = { + {I_VCMPNLEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5716, 188}, + {I_VCMPNLEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5725, 188}, + {I_VCMPNLEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5734, 188}, + {I_VCMPNLEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5743, 188}, + {I_VCMPNLEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+750, 240}, + {I_VCMPNLEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+760, 240}, + {I_VCMPNLEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+770, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_QPS[] = { + {I_VCMPORD_QPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 188}, + {I_VCMPORD_QPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 188}, + {I_VCMPORD_QPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 188}, + {I_VCMPORD_QPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 188}, + {I_VCMPORD_QPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 240}, + {I_VCMPORD_QPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 240}, + {I_VCMPORD_QPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORDPS[] = { + {I_VCMPORDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5752, 188}, + {I_VCMPORDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5761, 188}, + {I_VCMPORDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5770, 188}, + {I_VCMPORDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5779, 188}, + {I_VCMPORDPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+830, 240}, + {I_VCMPORDPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+840, 240}, + {I_VCMPORDPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+850, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_UQPS[] = { + {I_VCMPEQ_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5788, 188}, + {I_VCMPEQ_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5797, 188}, + {I_VCMPEQ_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5806, 188}, + {I_VCMPEQ_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5815, 188}, + {I_VCMPEQ_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+910, 240}, + {I_VCMPEQ_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+920, 240}, + {I_VCMPEQ_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+930, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_USPS[] = { + {I_VCMPNGE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 188}, + {I_VCMPNGE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 188}, + {I_VCMPNGE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 188}, + {I_VCMPNGE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 188}, + {I_VCMPNGE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 240}, + {I_VCMPNGE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 240}, + {I_VCMPNGE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGEPS[] = { + {I_VCMPNGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5824, 188}, + {I_VCMPNGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5833, 188}, + {I_VCMPNGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5842, 188}, + {I_VCMPNGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5851, 188}, + {I_VCMPNGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+990, 240}, + {I_VCMPNGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1000, 240}, + {I_VCMPNGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1010, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_USPS[] = { + {I_VCMPNGT_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 188}, + {I_VCMPNGT_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 188}, + {I_VCMPNGT_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 188}, + {I_VCMPNGT_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 188}, + {I_VCMPNGT_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 240}, + {I_VCMPNGT_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 240}, + {I_VCMPNGT_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGTPS[] = { + {I_VCMPNGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5860, 188}, + {I_VCMPNGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5869, 188}, + {I_VCMPNGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5878, 188}, + {I_VCMPNGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5887, 188}, + {I_VCMPNGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1070, 240}, + {I_VCMPNGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1080, 240}, + {I_VCMPNGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1090, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OQPS[] = { + {I_VCMPFALSE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 188}, + {I_VCMPFALSE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 188}, + {I_VCMPFALSE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 188}, + {I_VCMPFALSE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 188}, + {I_VCMPFALSE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 240}, + {I_VCMPFALSE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 240}, + {I_VCMPFALSE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSEPS[] = { + {I_VCMPFALSEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5896, 188}, + {I_VCMPFALSEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5905, 188}, + {I_VCMPFALSEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5914, 188}, + {I_VCMPFALSEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5923, 188}, + {I_VCMPFALSEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1150, 240}, + {I_VCMPFALSEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1160, 240}, + {I_VCMPFALSEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1170, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OQPS[] = { + {I_VCMPNEQ_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5932, 188}, + {I_VCMPNEQ_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5941, 188}, + {I_VCMPNEQ_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5950, 188}, + {I_VCMPNEQ_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5959, 188}, + {I_VCMPNEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1230, 240}, + {I_VCMPNEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1240, 240}, + {I_VCMPNEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1250, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OSPS[] = { + {I_VCMPGE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 188}, + {I_VCMPGE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 188}, + {I_VCMPGE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 188}, + {I_VCMPGE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 188}, + {I_VCMPGE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 240}, + {I_VCMPGE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 240}, + {I_VCMPGE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGEPS[] = { + {I_VCMPGEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+5968, 188}, + {I_VCMPGEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+5977, 188}, + {I_VCMPGEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+5986, 188}, + {I_VCMPGEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+5995, 188}, + {I_VCMPGEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1310, 240}, + {I_VCMPGEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1320, 240}, + {I_VCMPGEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1330, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OSPS[] = { + {I_VCMPGT_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 188}, + {I_VCMPGT_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 188}, + {I_VCMPGT_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 188}, + {I_VCMPGT_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 188}, + {I_VCMPGT_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 240}, + {I_VCMPGT_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 240}, + {I_VCMPGT_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGTPS[] = { + {I_VCMPGTPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6004, 188}, + {I_VCMPGTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6013, 188}, + {I_VCMPGTPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6022, 188}, + {I_VCMPGTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6031, 188}, + {I_VCMPGTPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1390, 240}, + {I_VCMPGTPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1400, 240}, + {I_VCMPGTPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1410, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_UQPS[] = { + {I_VCMPTRUE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 188}, + {I_VCMPTRUE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 188}, + {I_VCMPTRUE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 188}, + {I_VCMPTRUE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 188}, + {I_VCMPTRUE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 240}, + {I_VCMPTRUE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 240}, + {I_VCMPTRUE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUEPS[] = { + {I_VCMPTRUEPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6040, 188}, + {I_VCMPTRUEPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6049, 188}, + {I_VCMPTRUEPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6058, 188}, + {I_VCMPTRUEPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6067, 188}, + {I_VCMPTRUEPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1470, 240}, + {I_VCMPTRUEPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1480, 240}, + {I_VCMPTRUEPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1490, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OQPS[] = { + {I_VCMPLT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6076, 188}, + {I_VCMPLT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6085, 188}, + {I_VCMPLT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6094, 188}, + {I_VCMPLT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6103, 188}, + {I_VCMPLT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1630, 240}, + {I_VCMPLT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1640, 240}, + {I_VCMPLT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1650, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OQPS[] = { + {I_VCMPLE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6112, 188}, + {I_VCMPLE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6121, 188}, + {I_VCMPLE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6130, 188}, + {I_VCMPLE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6139, 188}, + {I_VCMPLE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1710, 240}, + {I_VCMPLE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1720, 240}, + {I_VCMPLE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1730, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_SPS[] = { + {I_VCMPUNORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6148, 188}, + {I_VCMPUNORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6157, 188}, + {I_VCMPUNORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6166, 188}, + {I_VCMPUNORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6175, 188}, + {I_VCMPUNORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1790, 240}, + {I_VCMPUNORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1800, 240}, + {I_VCMPUNORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1810, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_USPS[] = { + {I_VCMPNEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6184, 188}, + {I_VCMPNEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6193, 188}, + {I_VCMPNEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6202, 188}, + {I_VCMPNEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6211, 188}, + {I_VCMPNEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1870, 240}, + {I_VCMPNEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1880, 240}, + {I_VCMPNEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1890, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_UQPS[] = { + {I_VCMPNLT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6220, 188}, + {I_VCMPNLT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6229, 188}, + {I_VCMPNLT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6238, 188}, + {I_VCMPNLT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6247, 188}, + {I_VCMPNLT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1950, 240}, + {I_VCMPNLT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+1960, 240}, + {I_VCMPNLT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+1970, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_UQPS[] = { + {I_VCMPNLE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6256, 188}, + {I_VCMPNLE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6265, 188}, + {I_VCMPNLE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6274, 188}, + {I_VCMPNLE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6283, 188}, + {I_VCMPNLE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2030, 240}, + {I_VCMPNLE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2040, 240}, + {I_VCMPNLE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2050, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_SPS[] = { + {I_VCMPORD_SPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6292, 188}, + {I_VCMPORD_SPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6301, 188}, + {I_VCMPORD_SPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6310, 188}, + {I_VCMPORD_SPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6319, 188}, + {I_VCMPORD_SPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2110, 240}, + {I_VCMPORD_SPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2120, 240}, + {I_VCMPORD_SPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2130, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_USPS[] = { + {I_VCMPEQ_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6328, 188}, + {I_VCMPEQ_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6337, 188}, + {I_VCMPEQ_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6346, 188}, + {I_VCMPEQ_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6355, 188}, + {I_VCMPEQ_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2190, 240}, + {I_VCMPEQ_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2200, 240}, + {I_VCMPEQ_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2210, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_UQPS[] = { + {I_VCMPNGE_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6364, 188}, + {I_VCMPNGE_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6373, 188}, + {I_VCMPNGE_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6382, 188}, + {I_VCMPNGE_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6391, 188}, + {I_VCMPNGE_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2270, 240}, + {I_VCMPNGE_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2280, 240}, + {I_VCMPNGE_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2290, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_UQPS[] = { + {I_VCMPNGT_UQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6400, 188}, + {I_VCMPNGT_UQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6409, 188}, + {I_VCMPNGT_UQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6418, 188}, + {I_VCMPNGT_UQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6427, 188}, + {I_VCMPNGT_UQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2350, 240}, + {I_VCMPNGT_UQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2360, 240}, + {I_VCMPNGT_UQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2370, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OSPS[] = { + {I_VCMPFALSE_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6436, 188}, + {I_VCMPFALSE_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6445, 188}, + {I_VCMPFALSE_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6454, 188}, + {I_VCMPFALSE_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6463, 188}, + {I_VCMPFALSE_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2430, 240}, + {I_VCMPFALSE_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2440, 240}, + {I_VCMPFALSE_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2450, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OSPS[] = { + {I_VCMPNEQ_OSPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6472, 188}, + {I_VCMPNEQ_OSPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6481, 188}, + {I_VCMPNEQ_OSPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6490, 188}, + {I_VCMPNEQ_OSPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6499, 188}, + {I_VCMPNEQ_OSPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2510, 240}, + {I_VCMPNEQ_OSPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2520, 240}, + {I_VCMPNEQ_OSPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2530, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OQPS[] = { + {I_VCMPGE_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6508, 188}, + {I_VCMPGE_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6517, 188}, + {I_VCMPGE_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6526, 188}, + {I_VCMPGE_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6535, 188}, + {I_VCMPGE_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2590, 240}, + {I_VCMPGE_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2600, 240}, + {I_VCMPGE_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2610, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OQPS[] = { + {I_VCMPGT_OQPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6544, 188}, + {I_VCMPGT_OQPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6553, 188}, + {I_VCMPGT_OQPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6562, 188}, + {I_VCMPGT_OQPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6571, 188}, + {I_VCMPGT_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2670, 240}, + {I_VCMPGT_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2680, 240}, + {I_VCMPGT_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2690, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_USPS[] = { + {I_VCMPTRUE_USPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+6580, 188}, + {I_VCMPTRUE_USPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+6589, 188}, + {I_VCMPTRUE_USPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+6598, 188}, + {I_VCMPTRUE_USPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+6607, 188}, + {I_VCMPTRUE_USPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2750, 240}, + {I_VCMPTRUE_USPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2760, 240}, + {I_VCMPTRUE_USPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+2770, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPPS[] = { + {I_VCMPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13464, 188}, + {I_VCMPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13472, 188}, + {I_VCMPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13480, 188}, + {I_VCMPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13488, 188}, + {I_VCMPPS, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8137, 240}, + {I_VCMPPS, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8146, 240}, + {I_VCMPPS, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+8155, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OSSD[] = { + {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 188}, + {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 188}, + {I_VCMPEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6616, 188}, + {I_VCMPEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6625, 188}, + {I_VCMPEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1580, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQSD[] = { + {I_VCMPEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6634, 188}, + {I_VCMPEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6643, 188}, + {I_VCMPEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OSSD[] = { + {I_VCMPLT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 188}, + {I_VCMPLT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 188}, + {I_VCMPLT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLTSD[] = { + {I_VCMPLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6652, 188}, + {I_VCMPLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6661, 188}, + {I_VCMPLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+380, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OSSD[] = { + {I_VCMPLE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 188}, + {I_VCMPLE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 188}, + {I_VCMPLE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLESD[] = { + {I_VCMPLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6670, 188}, + {I_VCMPLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6679, 188}, + {I_VCMPLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+460, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_QSD[] = { + {I_VCMPUNORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 188}, + {I_VCMPUNORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 188}, + {I_VCMPUNORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORDSD[] = { + {I_VCMPUNORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6688, 188}, + {I_VCMPUNORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6697, 188}, + {I_VCMPUNORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+540, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_UQSD[] = { + {I_VCMPNEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 188}, + {I_VCMPNEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 188}, + {I_VCMPNEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQSD[] = { + {I_VCMPNEQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6706, 188}, + {I_VCMPNEQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6715, 188}, + {I_VCMPNEQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+620, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_USSD[] = { + {I_VCMPNLT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 188}, + {I_VCMPNLT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 188}, + {I_VCMPNLT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLTSD[] = { + {I_VCMPNLTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6724, 188}, + {I_VCMPNLTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6733, 188}, + {I_VCMPNLTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+700, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_USSD[] = { + {I_VCMPNLE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 188}, + {I_VCMPNLE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 188}, + {I_VCMPNLE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLESD[] = { + {I_VCMPNLESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6742, 188}, + {I_VCMPNLESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6751, 188}, + {I_VCMPNLESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+780, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_QSD[] = { + {I_VCMPORD_QSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 188}, + {I_VCMPORD_QSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 188}, + {I_VCMPORD_QSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORDSD[] = { + {I_VCMPORDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6760, 188}, + {I_VCMPORDSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6769, 188}, + {I_VCMPORDSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+860, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_UQSD[] = { + {I_VCMPEQ_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6778, 188}, + {I_VCMPEQ_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6787, 188}, + {I_VCMPEQ_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+940, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_USSD[] = { + {I_VCMPNGE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 188}, + {I_VCMPNGE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 188}, + {I_VCMPNGE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGESD[] = { + {I_VCMPNGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6796, 188}, + {I_VCMPNGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6805, 188}, + {I_VCMPNGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1020, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_USSD[] = { + {I_VCMPNGT_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 188}, + {I_VCMPNGT_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 188}, + {I_VCMPNGT_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGTSD[] = { + {I_VCMPNGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6814, 188}, + {I_VCMPNGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6823, 188}, + {I_VCMPNGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1100, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OQSD[] = { + {I_VCMPFALSE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 188}, + {I_VCMPFALSE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 188}, + {I_VCMPFALSE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSESD[] = { + {I_VCMPFALSESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6832, 188}, + {I_VCMPFALSESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6841, 188}, + {I_VCMPFALSESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1180, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OQSD[] = { + {I_VCMPNEQ_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6850, 188}, + {I_VCMPNEQ_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6859, 188}, + {I_VCMPNEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1260, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OSSD[] = { + {I_VCMPGE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 188}, + {I_VCMPGE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 188}, + {I_VCMPGE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGESD[] = { + {I_VCMPGESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6868, 188}, + {I_VCMPGESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6877, 188}, + {I_VCMPGESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1340, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OSSD[] = { + {I_VCMPGT_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 188}, + {I_VCMPGT_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 188}, + {I_VCMPGT_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGTSD[] = { + {I_VCMPGTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6886, 188}, + {I_VCMPGTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6895, 188}, + {I_VCMPGTSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_UQSD[] = { + {I_VCMPTRUE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 188}, + {I_VCMPTRUE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 188}, + {I_VCMPTRUE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUESD[] = { + {I_VCMPTRUESD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6904, 188}, + {I_VCMPTRUESD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6913, 188}, + {I_VCMPTRUESD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1500, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OQSD[] = { + {I_VCMPLT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6922, 188}, + {I_VCMPLT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6931, 188}, + {I_VCMPLT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OQSD[] = { + {I_VCMPLE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6940, 188}, + {I_VCMPLE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6949, 188}, + {I_VCMPLE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1740, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_SSD[] = { + {I_VCMPUNORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6958, 188}, + {I_VCMPUNORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6967, 188}, + {I_VCMPUNORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1820, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_USSD[] = { + {I_VCMPNEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6976, 188}, + {I_VCMPNEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+6985, 188}, + {I_VCMPNEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1900, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_UQSD[] = { + {I_VCMPNLT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+6994, 188}, + {I_VCMPNLT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7003, 188}, + {I_VCMPNLT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1980, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_UQSD[] = { + {I_VCMPNLE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7012, 188}, + {I_VCMPNLE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7021, 188}, + {I_VCMPNLE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2060, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_SSD[] = { + {I_VCMPORD_SSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7030, 188}, + {I_VCMPORD_SSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7039, 188}, + {I_VCMPORD_SSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2140, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_USSD[] = { + {I_VCMPEQ_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7048, 188}, + {I_VCMPEQ_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7057, 188}, + {I_VCMPEQ_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2220, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_UQSD[] = { + {I_VCMPNGE_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7066, 188}, + {I_VCMPNGE_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7075, 188}, + {I_VCMPNGE_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2300, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_UQSD[] = { + {I_VCMPNGT_UQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7084, 188}, + {I_VCMPNGT_UQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7093, 188}, + {I_VCMPNGT_UQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2380, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OSSD[] = { + {I_VCMPFALSE_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7102, 188}, + {I_VCMPFALSE_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7111, 188}, + {I_VCMPFALSE_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2460, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OSSD[] = { + {I_VCMPNEQ_OSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7120, 188}, + {I_VCMPNEQ_OSSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7129, 188}, + {I_VCMPNEQ_OSSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2540, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OQSD[] = { + {I_VCMPGE_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7138, 188}, + {I_VCMPGE_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7147, 188}, + {I_VCMPGE_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2620, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OQSD[] = { + {I_VCMPGT_OQSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7156, 188}, + {I_VCMPGT_OQSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7165, 188}, + {I_VCMPGT_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2700, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_USSD[] = { + {I_VCMPTRUE_USSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7174, 188}, + {I_VCMPTRUE_USSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7183, 188}, + {I_VCMPTRUE_USSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2780, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPSD[] = { + {I_VCMPSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13496, 188}, + {I_VCMPSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13504, 188}, + {I_VCMPSD, 4, {KREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8164, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OSSS[] = { + {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 188}, + {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 188}, + {I_VCMPEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7192, 188}, + {I_VCMPEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7201, 188}, + {I_VCMPEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1590, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQSS[] = { + {I_VCMPEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7210, 188}, + {I_VCMPEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7219, 188}, + {I_VCMPEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OSSS[] = { + {I_VCMPLT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 188}, + {I_VCMPLT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 188}, + {I_VCMPLT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLTSS[] = { + {I_VCMPLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7228, 188}, + {I_VCMPLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7237, 188}, + {I_VCMPLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+390, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OSSS[] = { + {I_VCMPLE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 188}, + {I_VCMPLE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 188}, + {I_VCMPLE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLESS[] = { + {I_VCMPLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7246, 188}, + {I_VCMPLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7255, 188}, + {I_VCMPLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+470, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_QSS[] = { + {I_VCMPUNORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 188}, + {I_VCMPUNORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 188}, + {I_VCMPUNORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORDSS[] = { + {I_VCMPUNORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7264, 188}, + {I_VCMPUNORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7273, 188}, + {I_VCMPUNORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+550, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_UQSS[] = { + {I_VCMPNEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 188}, + {I_VCMPNEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 188}, + {I_VCMPNEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQSS[] = { + {I_VCMPNEQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7282, 188}, + {I_VCMPNEQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7291, 188}, + {I_VCMPNEQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+630, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_USSS[] = { + {I_VCMPNLT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 188}, + {I_VCMPNLT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 188}, + {I_VCMPNLT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLTSS[] = { + {I_VCMPNLTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7300, 188}, + {I_VCMPNLTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7309, 188}, + {I_VCMPNLTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+710, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_USSS[] = { + {I_VCMPNLE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 188}, + {I_VCMPNLE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 188}, + {I_VCMPNLE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLESS[] = { + {I_VCMPNLESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7318, 188}, + {I_VCMPNLESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7327, 188}, + {I_VCMPNLESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+790, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_QSS[] = { + {I_VCMPORD_QSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 188}, + {I_VCMPORD_QSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 188}, + {I_VCMPORD_QSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORDSS[] = { + {I_VCMPORDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7336, 188}, + {I_VCMPORDSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7345, 188}, + {I_VCMPORDSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+870, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_UQSS[] = { + {I_VCMPEQ_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7354, 188}, + {I_VCMPEQ_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7363, 188}, + {I_VCMPEQ_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+950, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_USSS[] = { + {I_VCMPNGE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 188}, + {I_VCMPNGE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 188}, + {I_VCMPNGE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGESS[] = { + {I_VCMPNGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7372, 188}, + {I_VCMPNGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7381, 188}, + {I_VCMPNGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1030, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_USSS[] = { + {I_VCMPNGT_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 188}, + {I_VCMPNGT_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 188}, + {I_VCMPNGT_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGTSS[] = { + {I_VCMPNGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7390, 188}, + {I_VCMPNGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7399, 188}, + {I_VCMPNGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1110, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OQSS[] = { + {I_VCMPFALSE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 188}, + {I_VCMPFALSE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 188}, + {I_VCMPFALSE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSESS[] = { + {I_VCMPFALSESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7408, 188}, + {I_VCMPFALSESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7417, 188}, + {I_VCMPFALSESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1190, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OQSS[] = { + {I_VCMPNEQ_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7426, 188}, + {I_VCMPNEQ_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7435, 188}, + {I_VCMPNEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1270, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OSSS[] = { + {I_VCMPGE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 188}, + {I_VCMPGE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 188}, + {I_VCMPGE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGESS[] = { + {I_VCMPGESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7444, 188}, + {I_VCMPGESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7453, 188}, + {I_VCMPGESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1350, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OSSS[] = { + {I_VCMPGT_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 188}, + {I_VCMPGT_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 188}, + {I_VCMPGT_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGTSS[] = { + {I_VCMPGTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7462, 188}, + {I_VCMPGTSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7471, 188}, + {I_VCMPGTSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1430, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_UQSS[] = { + {I_VCMPTRUE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 188}, + {I_VCMPTRUE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 188}, + {I_VCMPTRUE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUESS[] = { + {I_VCMPTRUESS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7480, 188}, + {I_VCMPTRUESS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7489, 188}, + {I_VCMPTRUESS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1510, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLT_OQSS[] = { + {I_VCMPLT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7498, 188}, + {I_VCMPLT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7507, 188}, + {I_VCMPLT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1670, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPLE_OQSS[] = { + {I_VCMPLE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7516, 188}, + {I_VCMPLE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7525, 188}, + {I_VCMPLE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1750, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPUNORD_SSS[] = { + {I_VCMPUNORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7534, 188}, + {I_VCMPUNORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7543, 188}, + {I_VCMPUNORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1830, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_USSS[] = { + {I_VCMPNEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7552, 188}, + {I_VCMPNEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7561, 188}, + {I_VCMPNEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1910, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLT_UQSS[] = { + {I_VCMPNLT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7570, 188}, + {I_VCMPNLT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7579, 188}, + {I_VCMPNLT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+1990, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNLE_UQSS[] = { + {I_VCMPNLE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7588, 188}, + {I_VCMPNLE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7597, 188}, + {I_VCMPNLE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2070, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPORD_SSS[] = { + {I_VCMPORD_SSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7606, 188}, + {I_VCMPORD_SSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7615, 188}, + {I_VCMPORD_SSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2150, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_USSS[] = { + {I_VCMPEQ_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7624, 188}, + {I_VCMPEQ_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7633, 188}, + {I_VCMPEQ_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2230, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGE_UQSS[] = { + {I_VCMPNGE_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7642, 188}, + {I_VCMPNGE_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7651, 188}, + {I_VCMPNGE_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2310, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNGT_UQSS[] = { + {I_VCMPNGT_UQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7660, 188}, + {I_VCMPNGT_UQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7669, 188}, + {I_VCMPNGT_UQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2390, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPFALSE_OSSS[] = { + {I_VCMPFALSE_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7678, 188}, + {I_VCMPFALSE_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7687, 188}, + {I_VCMPFALSE_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2470, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPNEQ_OSSS[] = { + {I_VCMPNEQ_OSSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7696, 188}, + {I_VCMPNEQ_OSSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7705, 188}, + {I_VCMPNEQ_OSSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2550, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGE_OQSS[] = { + {I_VCMPGE_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7714, 188}, + {I_VCMPGE_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7723, 188}, + {I_VCMPGE_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2630, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPGT_OQSS[] = { + {I_VCMPGT_OQSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7732, 188}, + {I_VCMPGT_OQSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7741, 188}, + {I_VCMPGT_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2710, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPTRUE_USSS[] = { + {I_VCMPTRUE_USSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+7750, 188}, + {I_VCMPTRUE_USSS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+7759, 188}, + {I_VCMPTRUE_USSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+2790, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPSS[] = { + {I_VCMPSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13512, 188}, + {I_VCMPSS, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13520, 188}, + {I_VCMPSS, 4, {KREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+8173, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCOMISD[] = { + {I_VCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35272, 188}, + {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16960, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCOMISS[] = { + {I_VCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35279, 188}, + {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+16968, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTDQ2PD[] = { + {I_VCVTDQ2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35286, 188}, + {I_VCVTDQ2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35293, 188}, + {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17072, 240}, + {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17080, 240}, + {I_VCVTDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17088, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTDQ2PS[] = { + {I_VCVTDQ2PS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35300, 188}, + {I_VCVTDQ2PS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35307, 188}, + {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17096, 240}, + {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17104, 240}, + {I_VCVTDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17112, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2DQ[] = { + {I_VCVTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35314, 188}, + {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35314, 192}, + {I_VCVTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35321, 188}, + {I_VCVTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35321, 193}, + {I_VCVTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17120, 240}, + {I_VCVTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17128, 240}, + {I_VCVTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17136, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2PS[] = { + {I_VCVTPD2PS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35328, 188}, + {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35328, 192}, + {I_VCVTPD2PS, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35335, 188}, + {I_VCVTPD2PS, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35335, 193}, + {I_VCVTPD2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17144, 240}, + {I_VCVTPD2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17152, 240}, + {I_VCVTPD2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17160, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2DQ[] = { + {I_VCVTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35342, 188}, + {I_VCVTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35349, 188}, + {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17264, 240}, + {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17272, 240}, + {I_VCVTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17280, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2PD[] = { + {I_VCVTPS2PD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35356, 188}, + {I_VCVTPS2PD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35363, 188}, + {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17288, 240}, + {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17296, 240}, + {I_VCVTPS2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17304, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSD2SI[] = { + {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35370, 188}, + {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35377, 194}, + {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17432, 241}, + {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17440, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSD2SS[] = { + {I_VCVTSD2SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35384, 188}, + {I_VCVTSD2SS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35391, 188}, + {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+17448, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSI2SD[] = { + {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35398, 195}, + {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35405, 195}, + {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,MEMORY|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35398, 195}, + {I_VCVTSI2SD, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35405, 195}, + {I_VCVTSI2SD, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35412, 196}, + {I_VCVTSI2SD, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35419, 196}, + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17472, 241}, + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17480, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSI2SS[] = { + {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35426, 195}, + {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35433, 195}, + {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,MEMORY|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35426, 195}, + {I_VCVTSI2SS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35433, 195}, + {I_VCVTSI2SS, 3, {XMM_L16,XMM_L16,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35440, 196}, + {I_VCVTSI2SS, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35447, 196}, + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17488, 241}, + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17496, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSS2SD[] = { + {I_VCVTSS2SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35454, 188}, + {I_VCVTSS2SD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35461, 188}, + {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+17504, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSS2SI[] = { + {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35468, 188}, + {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35475, 194}, + {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17512, 241}, + {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17520, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPD2DQ[] = { + {I_VCVTTPD2DQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35482, 188}, + {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35482, 192}, + {I_VCVTTPD2DQ, 2, {XMM_L16,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35489, 188}, + {I_VCVTTPD2DQ, 2, {XMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35489, 193}, + {I_VCVTTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17544, 240}, + {I_VCVTTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17552, 240}, + {I_VCVTTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17560, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPS2DQ[] = { + {I_VCVTTPS2DQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35496, 188}, + {I_VCVTTPS2DQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35503, 188}, + {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17640, 240}, + {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17648, 240}, + {I_VCVTTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17656, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSD2SI[] = { + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35510, 188}, + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35517, 194}, + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17736, 241}, + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17744, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSS2SI[] = { + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35524, 188}, + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35531, 194}, + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17768, 241}, + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17776, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVPD[] = { + {I_VDIVPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35538, 188}, + {I_VDIVPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35545, 188}, + {I_VDIVPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35552, 188}, + {I_VDIVPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35559, 188}, + {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17928, 240}, + {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17936, 240}, + {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+17944, 240}, + {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17952, 240}, + {I_VDIVPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+17960, 241}, + {I_VDIVPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17968, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVPS[] = { + {I_VDIVPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35566, 188}, + {I_VDIVPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35573, 188}, + {I_VDIVPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35580, 188}, + {I_VDIVPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35587, 188}, + {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+17976, 240}, + {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17984, 240}, + {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+17992, 240}, + {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18000, 240}, + {I_VDIVPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18008, 241}, + {I_VDIVPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+18016, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVSD[] = { + {I_VDIVSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35594, 188}, + {I_VDIVSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35601, 188}, + {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18024, 241}, + {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18032, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVSS[] = { + {I_VDIVSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35608, 188}, + {I_VDIVSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35615, 188}, + {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18040, 241}, + {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+18048, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDPPD[] = { + {I_VDPPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13528, 188}, + {I_VDPPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13536, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDPPS[] = { + {I_VDPPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13544, 188}, + {I_VDPPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13552, 188}, + {I_VDPPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13560, 188}, + {I_VDPPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13568, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTF128[] = { + {I_VEXTRACTF128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13576, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTPS[] = { + {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13584, 188}, + {I_VEXTRACTPS, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 241}, + {I_VEXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 241}, + {I_VEXTRACTPS, 3, {MEMORY|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+8479, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VHADDPD[] = { + {I_VHADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35622, 188}, + {I_VHADDPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35629, 188}, + {I_VHADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35636, 188}, + {I_VHADDPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35643, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VHADDPS[] = { + {I_VHADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35650, 188}, + {I_VHADDPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35657, 188}, + {I_VHADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35664, 188}, + {I_VHADDPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35671, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VHSUBPD[] = { + {I_VHSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35678, 188}, + {I_VHSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35685, 188}, + {I_VHSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35692, 188}, + {I_VHSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35699, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VHSUBPS[] = { + {I_VHSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35706, 188}, + {I_VHSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35713, 188}, + {I_VHSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35720, 188}, + {I_VHSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35727, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTF128[] = { + {I_VINSERTF128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13592, 188}, + {I_VINSERTF128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13600, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTPS[] = { + {I_VINSERTPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13608, 188}, + {I_VINSERTPS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13616, 188}, + {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9172, 241}, + {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9181, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VLDDQU[] = { + {I_VLDDQU, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35734, 188}, + {I_VLDDQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35741, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VLDQQU[] = { + {I_VLDQQU, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35741, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VLDMXCSR[] = { + {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+35748, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMASKMOVDQU[] = { + {I_VMASKMOVDQU, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35755, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMASKMOVPS[] = { + {I_VMASKMOVPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35762, 188}, + {I_VMASKMOVPS, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35769, 188}, + {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35776, 192}, + {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35783, 193}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMASKMOVPD[] = { + {I_VMASKMOVPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35790, 188}, + {I_VMASKMOVPD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35797, 188}, + {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35804, 188}, + {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+35811, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMAXPD[] = { + {I_VMAXPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35818, 188}, + {I_VMAXPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35825, 188}, + {I_VMAXPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35832, 188}, + {I_VMAXPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35839, 188}, + {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19240, 240}, + {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19248, 240}, + {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19256, 240}, + {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19264, 240}, + {I_VMAXPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19272, 241}, + {I_VMAXPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19280, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMAXPS[] = { + {I_VMAXPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35846, 188}, + {I_VMAXPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35853, 188}, + {I_VMAXPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35860, 188}, + {I_VMAXPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35867, 188}, + {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19288, 240}, + {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19296, 240}, + {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19304, 240}, + {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19312, 240}, + {I_VMAXPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19320, 241}, + {I_VMAXPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19328, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMAXSD[] = { + {I_VMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35874, 188}, + {I_VMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35881, 188}, + {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19336, 241}, + {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19344, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMAXSS[] = { + {I_VMAXSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35888, 188}, + {I_VMAXSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35895, 188}, + {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19352, 241}, + {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19360, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMINPD[] = { + {I_VMINPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35902, 188}, + {I_VMINPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35909, 188}, + {I_VMINPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35916, 188}, + {I_VMINPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35923, 188}, + {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19368, 240}, + {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19376, 240}, + {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19384, 240}, + {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19392, 240}, + {I_VMINPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+19400, 241}, + {I_VMINPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19408, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMINPS[] = { + {I_VMINPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+35930, 188}, + {I_VMINPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35937, 188}, + {I_VMINPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+35944, 188}, + {I_VMINPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+35951, 188}, + {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19416, 240}, + {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19424, 240}, + {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19432, 240}, + {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19440, 240}, + {I_VMINPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+19448, 241}, + {I_VMINPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19456, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMINSD[] = { + {I_VMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+35958, 188}, + {I_VMINSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+35965, 188}, + {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19464, 241}, + {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19472, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMINSS[] = { + {I_VMINSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+35972, 188}, + {I_VMINSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+35979, 188}, + {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19480, 241}, + {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+19488, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVAPD[] = { + {I_VMOVAPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+35986, 188}, + {I_VMOVAPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+35993, 188}, + {I_VMOVAPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36000, 188}, + {I_VMOVAPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36007, 188}, + {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19496, 240}, + {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19504, 240}, + {I_VMOVAPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19512, 241}, + {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19520, 240}, + {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19528, 240}, + {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19536, 241}, + {I_VMOVAPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19544, 240}, + {I_VMOVAPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19552, 240}, + {I_VMOVAPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19560, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVAPS[] = { + {I_VMOVAPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36014, 188}, + {I_VMOVAPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36021, 188}, + {I_VMOVAPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36028, 188}, + {I_VMOVAPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36035, 188}, + {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19568, 240}, + {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19576, 240}, + {I_VMOVAPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19584, 241}, + {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19592, 240}, + {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19600, 240}, + {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19608, 241}, + {I_VMOVAPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19616, 240}, + {I_VMOVAPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19624, 240}, + {I_VMOVAPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19632, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVD[] = { + {I_VMOVD, 2, {XMM_L16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36042, 188}, + {I_VMOVD, 2, {RM_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36049, 188}, + {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+19640, 241}, + {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19648, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVQ[] = { + {I_VMOVQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36056, 197}, + {I_VMOVQ, 2, {RM_XMM_L16|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36063, 197}, + {I_VMOVQ, 2, {XMM_L16,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36070, 196}, + {I_VMOVQ, 2, {RM_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36077, 196}, + {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20192, 241}, + {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20200, 241}, + {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20208, 241}, + {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20216, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDDUP[] = { + {I_VMOVDDUP, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36084, 188}, + {I_VMOVDDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36091, 188}, + {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19656, 240}, + {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19664, 240}, + {I_VMOVDDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19672, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQA[] = { + {I_VMOVDQA, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36098, 188}, + {I_VMOVDQA, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36105, 188}, + {I_VMOVDQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36112, 188}, + {I_VMOVDQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36119, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVQQA[] = { + {I_VMOVQQA, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36112, 188}, + {I_VMOVQQA, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36119, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQU[] = { + {I_VMOVDQU, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36126, 188}, + {I_VMOVDQU, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36133, 188}, + {I_VMOVDQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36140, 188}, + {I_VMOVDQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36147, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVQQU[] = { + {I_VMOVQQU, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36140, 188}, + {I_VMOVQQU, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36147, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVHLPS[] = { + {I_VMOVHLPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36154, 188}, + {I_VMOVHLPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36161, 188}, + {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+19968, 241}, + {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+19976, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVHPD[] = { + {I_VMOVHPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36168, 188}, + {I_VMOVHPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36175, 188}, + {I_VMOVHPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36182, 188}, + {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+19984, 241}, + {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+19992, 241}, + {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20000, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVHPS[] = { + {I_VMOVHPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36189, 188}, + {I_VMOVHPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36196, 188}, + {I_VMOVHPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36203, 188}, + {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20008, 241}, + {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20016, 241}, + {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20024, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVLHPS[] = { + {I_VMOVLHPS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36189, 188}, + {I_VMOVLHPS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36196, 188}, + {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+20032, 241}, + {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20040, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVLPD[] = { + {I_VMOVLPD, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36210, 188}, + {I_VMOVLPD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36217, 188}, + {I_VMOVLPD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36224, 188}, + {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20048, 241}, + {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20056, 241}, + {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20064, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVLPS[] = { + {I_VMOVLPS, 3, {XMM_L16,XMM_L16,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36154, 188}, + {I_VMOVLPS, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36161, 188}, + {I_VMOVLPS, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36231, 188}, + {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+20072, 241}, + {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+20080, 241}, + {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20088, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVMSKPD[] = { + {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36238, 194}, + {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36238, 188}, + {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36245, 194}, + {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36245, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVMSKPS[] = { + {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36252, 194}, + {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36252, 188}, + {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36259, 194}, + {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36259, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVNTDQ[] = { + {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36266, 188}, + {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36273, 188}, + {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20096, 240}, + {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20104, 240}, + {I_VMOVNTDQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20112, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVNTQQ[] = { + {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36273, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVNTDQA[] = { + {I_VMOVNTDQA, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36280, 188}, + {I_VMOVNTDQA, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41033, 207}, + {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+20120, 240}, + {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+20128, 240}, + {I_VMOVNTDQA, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+20136, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVNTPD[] = { + {I_VMOVNTPD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36287, 188}, + {I_VMOVNTPD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36294, 188}, + {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20144, 240}, + {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20152, 240}, + {I_VMOVNTPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20160, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVNTPS[] = { + {I_VMOVNTPS, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36301, 188}, + {I_VMOVNTPS, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36308, 188}, + {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20168, 240}, + {I_VMOVNTPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20176, 240}, + {I_VMOVNTPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+20184, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVSD[] = { + {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36315, 188}, + {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36322, 188}, + {I_VMOVSD, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36329, 188}, + {I_VMOVSD, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36336, 188}, + {I_VMOVSD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36343, 188}, + {I_VMOVSD, 2, {MEMORY|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36350, 188}, + {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20224, 241}, + {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20232, 241}, + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20240, 241}, + {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20248, 241}, + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20256, 241}, + {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20264, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVSHDUP[] = { + {I_VMOVSHDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36357, 188}, + {I_VMOVSHDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36364, 188}, + {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20272, 240}, + {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20280, 240}, + {I_VMOVSHDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20288, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVSLDUP[] = { + {I_VMOVSLDUP, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36371, 188}, + {I_VMOVSLDUP, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36378, 188}, + {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20296, 240}, + {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20304, 240}, + {I_VMOVSLDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20312, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVSS[] = { + {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36385, 188}, + {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36392, 188}, + {I_VMOVSS, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36399, 188}, + {I_VMOVSS, 3, {XMM_L16,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+36406, 188}, + {I_VMOVSS, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36413, 188}, + {I_VMOVSS, 2, {MEMORY|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36420, 188}, + {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20320, 241}, + {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20328, 241}, + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20336, 241}, + {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20344, 241}, + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20352, 241}, + {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20360, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVUPD[] = { + {I_VMOVUPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36427, 188}, + {I_VMOVUPD, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36434, 188}, + {I_VMOVUPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36441, 188}, + {I_VMOVUPD, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36448, 188}, + {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20368, 240}, + {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20376, 240}, + {I_VMOVUPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20384, 241}, + {I_VMOVUPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20392, 240}, + {I_VMOVUPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20400, 240}, + {I_VMOVUPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20408, 241}, + {I_VMOVUPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20416, 240}, + {I_VMOVUPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20424, 240}, + {I_VMOVUPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20432, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVUPS[] = { + {I_VMOVUPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36455, 188}, + {I_VMOVUPS, 2, {RM_XMM_L16|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36462, 188}, + {I_VMOVUPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36469, 188}, + {I_VMOVUPS, 2, {RM_YMM_L16|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+36476, 188}, + {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20440, 240}, + {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20448, 240}, + {I_VMOVUPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20456, 241}, + {I_VMOVUPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20464, 240}, + {I_VMOVUPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20472, 240}, + {I_VMOVUPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20480, 241}, + {I_VMOVUPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20488, 240}, + {I_VMOVUPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20496, 240}, + {I_VMOVUPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20504, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMPSADBW[] = { + {I_VMPSADBW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13624, 188}, + {I_VMPSADBW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13632, 188}, + {I_VMPSADBW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15808, 207}, + {I_VMPSADBW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15816, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULPD[] = { + {I_VMULPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36483, 188}, + {I_VMULPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36490, 188}, + {I_VMULPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36497, 188}, + {I_VMULPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36504, 188}, + {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20512, 240}, + {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20520, 240}, + {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20528, 240}, + {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20536, 240}, + {I_VMULPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+20544, 241}, + {I_VMULPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+20552, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULPS[] = { + {I_VMULPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36511, 188}, + {I_VMULPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36518, 188}, + {I_VMULPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36525, 188}, + {I_VMULPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36532, 188}, + {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20560, 240}, + {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20568, 240}, + {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20576, 240}, + {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20584, 240}, + {I_VMULPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+20592, 241}, + {I_VMULPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+20600, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULSD[] = { + {I_VMULSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+36539, 188}, + {I_VMULSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+36546, 188}, + {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20608, 241}, + {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20616, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULSS[] = { + {I_VMULSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+36553, 188}, + {I_VMULSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+36560, 188}, + {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+20624, 241}, + {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+20632, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VORPD[] = { + {I_VORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36567, 188}, + {I_VORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36574, 188}, + {I_VORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36581, 188}, + {I_VORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36588, 188}, + {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20640, 242}, + {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20648, 242}, + {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20656, 242}, + {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20664, 242}, + {I_VORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+20672, 243}, + {I_VORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20680, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VORPS[] = { + {I_VORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36595, 188}, + {I_VORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36602, 188}, + {I_VORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36609, 188}, + {I_VORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+36616, 188}, + {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20688, 242}, + {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20696, 242}, + {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20704, 242}, + {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20712, 242}, + {I_VORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20720, 243}, + {I_VORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20728, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPABSB[] = { + {I_VPABSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36623, 188}, + {I_VPABSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39773, 207}, + {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20736, 244}, + {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20744, 244}, + {I_VPABSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20752, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPABSW[] = { + {I_VPABSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36630, 188}, + {I_VPABSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39780, 207}, + {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20808, 244}, + {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20816, 244}, + {I_VPABSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20824, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPABSD[] = { + {I_VPABSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36637, 188}, + {I_VPABSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39787, 207}, + {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20760, 240}, + {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20768, 240}, + {I_VPABSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20776, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPACKSSWB[] = { + {I_VPACKSSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36644, 188}, + {I_VPACKSSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36651, 188}, + {I_VPACKSSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39794, 207}, + {I_VPACKSSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39801, 207}, + {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20880, 244}, + {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20888, 244}, + {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20896, 244}, + {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20904, 244}, + {I_VPACKSSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20912, 245}, + {I_VPACKSSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20920, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPACKSSDW[] = { + {I_VPACKSSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36658, 188}, + {I_VPACKSSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36665, 188}, + {I_VPACKSSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39808, 207}, + {I_VPACKSSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39815, 207}, + {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20832, 244}, + {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20840, 244}, + {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20848, 244}, + {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20856, 244}, + {I_VPACKSSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20864, 245}, + {I_VPACKSSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20872, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPACKUSWB[] = { + {I_VPACKUSWB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36672, 188}, + {I_VPACKUSWB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36679, 188}, + {I_VPACKUSWB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39836, 207}, + {I_VPACKUSWB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39843, 207}, + {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20976, 244}, + {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20984, 244}, + {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20992, 244}, + {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21000, 244}, + {I_VPACKUSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21008, 245}, + {I_VPACKUSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21016, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPACKUSDW[] = { + {I_VPACKUSDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36686, 188}, + {I_VPACKUSDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36693, 188}, + {I_VPACKUSDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39822, 207}, + {I_VPACKUSDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39829, 207}, + {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20928, 244}, + {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20936, 244}, + {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20944, 244}, + {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20952, 244}, + {I_VPACKUSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+20960, 245}, + {I_VPACKUSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20968, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDB[] = { + {I_VPADDB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36700, 188}, + {I_VPADDB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36707, 188}, + {I_VPADDB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39850, 207}, + {I_VPADDB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39857, 207}, + {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21024, 244}, + {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21032, 244}, + {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21040, 244}, + {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21048, 244}, + {I_VPADDB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21056, 245}, + {I_VPADDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21064, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDW[] = { + {I_VPADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36714, 188}, + {I_VPADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36721, 188}, + {I_VPADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39864, 207}, + {I_VPADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39871, 207}, + {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21360, 244}, + {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21368, 244}, + {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21376, 244}, + {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21384, 244}, + {I_VPADDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21392, 245}, + {I_VPADDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21400, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDD[] = { + {I_VPADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36728, 188}, + {I_VPADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36735, 188}, + {I_VPADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39878, 207}, + {I_VPADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39885, 207}, + {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21072, 240}, + {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21080, 240}, + {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21088, 240}, + {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21096, 240}, + {I_VPADDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21104, 241}, + {I_VPADDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21112, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDQ[] = { + {I_VPADDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36742, 188}, + {I_VPADDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36749, 188}, + {I_VPADDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39892, 207}, + {I_VPADDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39899, 207}, + {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21120, 240}, + {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21128, 240}, + {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21136, 240}, + {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21144, 240}, + {I_VPADDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21152, 241}, + {I_VPADDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21160, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDSB[] = { + {I_VPADDSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36756, 188}, + {I_VPADDSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36763, 188}, + {I_VPADDSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39906, 207}, + {I_VPADDSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39913, 207}, + {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21168, 244}, + {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21176, 244}, + {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21184, 244}, + {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21192, 244}, + {I_VPADDSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21200, 245}, + {I_VPADDSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21208, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDSW[] = { + {I_VPADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36770, 188}, + {I_VPADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36777, 188}, + {I_VPADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39920, 207}, + {I_VPADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39927, 207}, + {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21216, 244}, + {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21224, 244}, + {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21232, 244}, + {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21240, 244}, + {I_VPADDSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21248, 245}, + {I_VPADDSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21256, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDUSB[] = { + {I_VPADDUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36784, 188}, + {I_VPADDUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36791, 188}, + {I_VPADDUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39934, 207}, + {I_VPADDUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39941, 207}, + {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21264, 244}, + {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21272, 244}, + {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21280, 244}, + {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21288, 244}, + {I_VPADDUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21296, 245}, + {I_VPADDUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21304, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPADDUSW[] = { + {I_VPADDUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36798, 188}, + {I_VPADDUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36805, 188}, + {I_VPADDUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39948, 207}, + {I_VPADDUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39955, 207}, + {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21312, 244}, + {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21320, 244}, + {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21328, 244}, + {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21336, 244}, + {I_VPADDUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21344, 245}, + {I_VPADDUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21352, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPALIGNR[] = { + {I_VPALIGNR, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13640, 188}, + {I_VPALIGNR, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13648, 188}, + {I_VPALIGNR, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15824, 207}, + {I_VPALIGNR, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15832, 207}, + {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9190, 244}, + {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9199, 244}, + {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9208, 244}, + {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9217, 244}, + {I_VPALIGNR, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9226, 245}, + {I_VPALIGNR, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9235, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPAND[] = { + {I_VPAND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36812, 188}, + {I_VPAND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36819, 188}, + {I_VPAND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39962, 207}, + {I_VPAND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39969, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPANDN[] = { + {I_VPANDN, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36826, 188}, + {I_VPANDN, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36833, 188}, + {I_VPANDN, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39976, 207}, + {I_VPANDN, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39983, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPAVGB[] = { + {I_VPAVGB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36840, 188}, + {I_VPAVGB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36847, 188}, + {I_VPAVGB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+39990, 207}, + {I_VPAVGB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39997, 207}, + {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21600, 244}, + {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21608, 244}, + {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21616, 244}, + {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21624, 244}, + {I_VPAVGB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21632, 245}, + {I_VPAVGB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21640, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPAVGW[] = { + {I_VPAVGW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36854, 188}, + {I_VPAVGW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36861, 188}, + {I_VPAVGW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40004, 207}, + {I_VPAVGW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40011, 207}, + {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21648, 244}, + {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21656, 244}, + {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21664, 244}, + {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21672, 244}, + {I_VPAVGW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21680, 245}, + {I_VPAVGW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21688, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDVB[] = { + {I_VPBLENDVB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+13656, 188}, + {I_VPBLENDVB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+13664, 188}, + {I_VPBLENDVB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15840, 207}, + {I_VPBLENDVB, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15848, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDW[] = { + {I_VPBLENDW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13672, 188}, + {I_VPBLENDW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13680, 188}, + {I_VPBLENDW, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15856, 207}, + {I_VPBLENDW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15864, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPESTRI[] = { + {I_VPCMPESTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13688, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPESTRM[] = { + {I_VPCMPESTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13696, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPISTRI[] = { + {I_VPCMPISTRI, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13704, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPISTRM[] = { + {I_VPCMPISTRM, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13712, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQB[] = { + {I_VPCMPEQB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36868, 188}, + {I_VPCMPEQB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36875, 188}, + {I_VPCMPEQB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40018, 207}, + {I_VPCMPEQB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40025, 207}, + {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22080, 244}, + {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22088, 244}, + {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22096, 245}, + {I_VPCMPEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2800, 244}, + {I_VPCMPEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2810, 244}, + {I_VPCMPEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2820, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQW[] = { + {I_VPCMPEQW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36882, 188}, + {I_VPCMPEQW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36889, 188}, + {I_VPCMPEQW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40032, 207}, + {I_VPCMPEQW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40039, 207}, + {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22152, 244}, + {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22160, 244}, + {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22168, 245}, + {I_VPCMPEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3010, 244}, + {I_VPCMPEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3020, 244}, + {I_VPCMPEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3030, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQD[] = { + {I_VPCMPEQD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36896, 188}, + {I_VPCMPEQD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36903, 188}, + {I_VPCMPEQD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40046, 207}, + {I_VPCMPEQD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40053, 207}, + {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22104, 240}, + {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22112, 240}, + {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22120, 241}, + {I_VPCMPEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2830, 240}, + {I_VPCMPEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2840, 240}, + {I_VPCMPEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2850, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQQ[] = { + {I_VPCMPEQQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36910, 188}, + {I_VPCMPEQQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36917, 188}, + {I_VPCMPEQQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40060, 207}, + {I_VPCMPEQQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40067, 207}, + {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22128, 240}, + {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22136, 240}, + {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22144, 241}, + {I_VPCMPEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2860, 240}, + {I_VPCMPEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2870, 240}, + {I_VPCMPEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2880, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTB[] = { + {I_VPCMPGTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36924, 188}, + {I_VPCMPGTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36931, 188}, + {I_VPCMPGTB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40074, 207}, + {I_VPCMPGTB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40081, 207}, + {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22176, 244}, + {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22184, 244}, + {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22192, 245}, + {I_VPCMPGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 244}, + {I_VPCMPGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 244}, + {I_VPCMPGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTW[] = { + {I_VPCMPGTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36938, 188}, + {I_VPCMPGTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36945, 188}, + {I_VPCMPGTW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40088, 207}, + {I_VPCMPGTW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40095, 207}, + {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22248, 244}, + {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22256, 244}, + {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22264, 245}, + {I_VPCMPGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 244}, + {I_VPCMPGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 244}, + {I_VPCMPGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTD[] = { + {I_VPCMPGTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36952, 188}, + {I_VPCMPGTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36959, 188}, + {I_VPCMPGTD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40102, 207}, + {I_VPCMPGTD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40109, 207}, + {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22200, 240}, + {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22208, 240}, + {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+22216, 241}, + {I_VPCMPGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 240}, + {I_VPCMPGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 240}, + {I_VPCMPGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTQ[] = { + {I_VPCMPGTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36966, 188}, + {I_VPCMPGTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36973, 188}, + {I_VPCMPGTQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40116, 207}, + {I_VPCMPGTQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40123, 207}, + {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22224, 240}, + {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22232, 240}, + {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+22240, 241}, + {I_VPCMPGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 240}, + {I_VPCMPGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 240}, + {I_VPCMPGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMILPD[] = { + {I_VPERMILPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+36980, 188}, + {I_VPERMILPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+36987, 188}, + {I_VPERMILPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+36994, 188}, + {I_VPERMILPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37001, 188}, + {I_VPERMILPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13720, 188}, + {I_VPERMILPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13728, 188}, + {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9460, 240}, + {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9469, 240}, + {I_VPERMILPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9478, 241}, + {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22640, 240}, + {I_VPERMILPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22648, 240}, + {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22656, 240}, + {I_VPERMILPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22664, 240}, + {I_VPERMILPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22672, 241}, + {I_VPERMILPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22680, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMILPS[] = { + {I_VPERMILPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37008, 188}, + {I_VPERMILPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37015, 188}, + {I_VPERMILPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+37022, 188}, + {I_VPERMILPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37029, 188}, + {I_VPERMILPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13736, 188}, + {I_VPERMILPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13744, 188}, + {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9487, 240}, + {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9496, 240}, + {I_VPERMILPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9505, 241}, + {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22688, 240}, + {I_VPERMILPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22696, 240}, + {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22704, 240}, + {I_VPERMILPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22712, 240}, + {I_VPERMILPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22720, 241}, + {I_VPERMILPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22728, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERM2F128[] = { + {I_VPERM2F128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13752, 188}, + {I_VPERM2F128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13760, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXTRB[] = { + {I_VPEXTRB, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 194}, + {I_VPEXTRB, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 188}, + {I_VPEXTRB, 3, {MEMORY|BITS8,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13768, 188}, + {I_VPEXTRB, 3, {REG_GPR|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 245}, + {I_VPEXTRB, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 245}, + {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 245}, + {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 245}, + {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9550, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXTRW[] = { + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 194}, + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13776, 188}, + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 194}, + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 188}, + {I_VPEXTRW, 3, {MEMORY|BITS16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13784, 188}, + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 245}, + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 245}, + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 245}, + {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9577, 245}, + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 245}, + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 245}, + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9586, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXTRD[] = { + {I_VPEXTRD, 3, {REG_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 194}, + {I_VPEXTRD, 3, {RM_GPR|BITS32,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13792, 188}, + {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9559, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXTRQ[] = { + {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13800, 194}, + {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9568, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDW[] = { + {I_VPHADDW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37036, 188}, + {I_VPHADDW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37043, 188}, + {I_VPHADDW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40130, 207}, + {I_VPHADDW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40137, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDD[] = { + {I_VPHADDD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37050, 188}, + {I_VPHADDD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37057, 188}, + {I_VPHADDD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40144, 207}, + {I_VPHADDD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40151, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDSW[] = { + {I_VPHADDSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37064, 188}, + {I_VPHADDSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37071, 188}, + {I_VPHADDSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40158, 207}, + {I_VPHADDSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40165, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHMINPOSUW[] = { + {I_VPHMINPOSUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37078, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBW[] = { + {I_VPHSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37085, 188}, + {I_VPHSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37092, 188}, + {I_VPHSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40172, 207}, + {I_VPHSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40179, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBD[] = { + {I_VPHSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37099, 188}, + {I_VPHSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37106, 188}, + {I_VPHSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40186, 207}, + {I_VPHSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40193, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBSW[] = { + {I_VPHSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37113, 188}, + {I_VPHSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37120, 188}, + {I_VPHSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40200, 207}, + {I_VPHSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40207, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPINSRB[] = { + {I_VPINSRB, 4, {XMM_L16,XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 188}, + {I_VPINSRB, 3, {XMM_L16,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 188}, + {I_VPINSRB, 4, {XMM_L16,XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 188}, + {I_VPINSRB, 3, {XMM_L16,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 188}, + {I_VPINSRB, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13808, 188}, + {I_VPINSRB, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13816, 188}, + {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 245}, + {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 245}, + {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9703, 245}, + {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9712, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPINSRW[] = { + {I_VPINSRW, 4, {XMM_L16,XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 188}, + {I_VPINSRW, 3, {XMM_L16,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 188}, + {I_VPINSRW, 4, {XMM_L16,XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 188}, + {I_VPINSRW, 3, {XMM_L16,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 188}, + {I_VPINSRW, 4, {XMM_L16,XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13824, 188}, + {I_VPINSRW, 3, {XMM_L16,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13832, 188}, + {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 245}, + {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 245}, + {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9757, 245}, + {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9766, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPINSRD[] = { + {I_VPINSRD, 4, {XMM_L16,XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 188}, + {I_VPINSRD, 3, {XMM_L16,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 188}, + {I_VPINSRD, 4, {XMM_L16,XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13840, 188}, + {I_VPINSRD, 3, {XMM_L16,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13848, 188}, + {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9721, 243}, + {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9730, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPINSRQ[] = { + {I_VPINSRQ, 4, {XMM_L16,XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 194}, + {I_VPINSRQ, 3, {XMM_L16,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 194}, + {I_VPINSRQ, 4, {XMM_L16,XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+13856, 194}, + {I_VPINSRQ, 3, {XMM_L16,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13864, 194}, + {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+9739, 243}, + {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9748, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADDWD[] = { + {I_VPMADDWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37127, 188}, + {I_VPMADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37134, 188}, + {I_VPMADDWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40228, 207}, + {I_VPMADDWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40235, 207}, + {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23216, 244}, + {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23224, 244}, + {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23232, 244}, + {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23240, 244}, + {I_VPMADDWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23248, 245}, + {I_VPMADDWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23256, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADDUBSW[] = { + {I_VPMADDUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37141, 188}, + {I_VPMADDUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37148, 188}, + {I_VPMADDUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40214, 207}, + {I_VPMADDUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40221, 207}, + {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23168, 244}, + {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23176, 244}, + {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23184, 244}, + {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23192, 244}, + {I_VPMADDUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23200, 245}, + {I_VPMADDUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23208, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXSB[] = { + {I_VPMAXSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37155, 188}, + {I_VPMAXSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37162, 188}, + {I_VPMAXSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40242, 207}, + {I_VPMAXSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40249, 207}, + {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23264, 244}, + {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23272, 244}, + {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23280, 244}, + {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23288, 244}, + {I_VPMAXSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23296, 245}, + {I_VPMAXSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23304, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXSW[] = { + {I_VPMAXSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37169, 188}, + {I_VPMAXSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37176, 188}, + {I_VPMAXSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40256, 207}, + {I_VPMAXSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40263, 207}, + {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23408, 244}, + {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23416, 244}, + {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23424, 244}, + {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23432, 244}, + {I_VPMAXSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23440, 245}, + {I_VPMAXSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23448, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXSD[] = { + {I_VPMAXSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37183, 188}, + {I_VPMAXSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37190, 188}, + {I_VPMAXSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40270, 207}, + {I_VPMAXSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40277, 207}, + {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23312, 240}, + {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23320, 240}, + {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23328, 240}, + {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23336, 240}, + {I_VPMAXSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23344, 241}, + {I_VPMAXSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23352, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXUB[] = { + {I_VPMAXUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37197, 188}, + {I_VPMAXUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37204, 188}, + {I_VPMAXUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40284, 207}, + {I_VPMAXUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40291, 207}, + {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23456, 244}, + {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23464, 244}, + {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23472, 244}, + {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23480, 244}, + {I_VPMAXUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23488, 245}, + {I_VPMAXUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23496, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXUW[] = { + {I_VPMAXUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37211, 188}, + {I_VPMAXUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37218, 188}, + {I_VPMAXUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40298, 207}, + {I_VPMAXUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40305, 207}, + {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23600, 244}, + {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23608, 244}, + {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23616, 244}, + {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23624, 244}, + {I_VPMAXUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23632, 245}, + {I_VPMAXUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23640, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXUD[] = { + {I_VPMAXUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37225, 188}, + {I_VPMAXUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37232, 188}, + {I_VPMAXUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40312, 207}, + {I_VPMAXUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40319, 207}, + {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23504, 240}, + {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23512, 240}, + {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23520, 240}, + {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23528, 240}, + {I_VPMAXUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23536, 241}, + {I_VPMAXUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23544, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINSB[] = { + {I_VPMINSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37239, 188}, + {I_VPMINSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37246, 188}, + {I_VPMINSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40326, 207}, + {I_VPMINSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40333, 207}, + {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23648, 244}, + {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23656, 244}, + {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23664, 244}, + {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23672, 244}, + {I_VPMINSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23680, 245}, + {I_VPMINSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23688, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINSW[] = { + {I_VPMINSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37253, 188}, + {I_VPMINSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37260, 188}, + {I_VPMINSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40340, 207}, + {I_VPMINSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40347, 207}, + {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23792, 244}, + {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23800, 244}, + {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23808, 244}, + {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23816, 244}, + {I_VPMINSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23824, 245}, + {I_VPMINSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23832, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINSD[] = { + {I_VPMINSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37267, 188}, + {I_VPMINSD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37274, 188}, + {I_VPMINSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40354, 207}, + {I_VPMINSD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40361, 207}, + {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23696, 240}, + {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23704, 240}, + {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23712, 240}, + {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23720, 240}, + {I_VPMINSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23728, 241}, + {I_VPMINSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23736, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINUB[] = { + {I_VPMINUB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37281, 188}, + {I_VPMINUB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37288, 188}, + {I_VPMINUB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40368, 207}, + {I_VPMINUB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40375, 207}, + {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23840, 244}, + {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23848, 244}, + {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23856, 244}, + {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23864, 244}, + {I_VPMINUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23872, 245}, + {I_VPMINUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23880, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINUW[] = { + {I_VPMINUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37295, 188}, + {I_VPMINUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37302, 188}, + {I_VPMINUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40382, 207}, + {I_VPMINUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40389, 207}, + {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23984, 244}, + {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23992, 244}, + {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24000, 244}, + {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24008, 244}, + {I_VPMINUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24016, 245}, + {I_VPMINUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24024, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINUD[] = { + {I_VPMINUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37309, 188}, + {I_VPMINUD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37316, 188}, + {I_VPMINUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40396, 207}, + {I_VPMINUD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40403, 207}, + {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23888, 240}, + {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23896, 240}, + {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23904, 240}, + {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23912, 240}, + {I_VPMINUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23920, 241}, + {I_VPMINUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23928, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVMSKB[] = { + {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37323, 194}, + {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37323, 188}, + {I_VPMOVMSKB, 2, {REG_GPR|BITS32,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40410, 207}, + {I_VPMOVMSKB, 2, {REG_GPR|BITS64,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40410, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXBW[] = { + {I_VPMOVSXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37330, 188}, + {I_VPMOVSXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40417, 207}, + {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24776, 244}, + {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24784, 244}, + {I_VPMOVSXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24792, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXBD[] = { + {I_VPMOVSXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37337, 188}, + {I_VPMOVSXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40424, 207}, + {I_VPMOVSXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40424, 207}, + {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24728, 240}, + {I_VPMOVSXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24736, 240}, + {I_VPMOVSXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24744, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXBQ[] = { + {I_VPMOVSXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37344, 188}, + {I_VPMOVSXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40431, 207}, + {I_VPMOVSXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40431, 207}, + {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24752, 240}, + {I_VPMOVSXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24760, 240}, + {I_VPMOVSXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24768, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXWD[] = { + {I_VPMOVSXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37351, 188}, + {I_VPMOVSXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40438, 207}, + {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24824, 240}, + {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24832, 240}, + {I_VPMOVSXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24840, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXWQ[] = { + {I_VPMOVSXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37358, 188}, + {I_VPMOVSXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40445, 207}, + {I_VPMOVSXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40445, 207}, + {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24848, 240}, + {I_VPMOVSXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24856, 240}, + {I_VPMOVSXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24864, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSXDQ[] = { + {I_VPMOVSXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37365, 188}, + {I_VPMOVSXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40452, 207}, + {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24800, 240}, + {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24808, 240}, + {I_VPMOVSXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24816, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXBW[] = { + {I_VPMOVZXBW, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37372, 188}, + {I_VPMOVZXBW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40459, 207}, + {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25280, 244}, + {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25288, 244}, + {I_VPMOVZXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25296, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXBD[] = { + {I_VPMOVZXBD, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37379, 188}, + {I_VPMOVZXBD, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40466, 207}, + {I_VPMOVZXBD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40466, 207}, + {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25232, 240}, + {I_VPMOVZXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25240, 240}, + {I_VPMOVZXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25248, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXBQ[] = { + {I_VPMOVZXBQ, 2, {XMM_L16,RM_XMM_L16|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+37386, 188}, + {I_VPMOVZXBQ, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+40473, 207}, + {I_VPMOVZXBQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40473, 207}, + {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25256, 240}, + {I_VPMOVZXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25264, 240}, + {I_VPMOVZXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25272, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXWD[] = { + {I_VPMOVZXWD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37393, 188}, + {I_VPMOVZXWD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40480, 207}, + {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25328, 240}, + {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25336, 240}, + {I_VPMOVZXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25344, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXWQ[] = { + {I_VPMOVZXWQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37400, 188}, + {I_VPMOVZXWQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+40487, 207}, + {I_VPMOVZXWQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+40487, 207}, + {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25352, 240}, + {I_VPMOVZXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25360, 240}, + {I_VPMOVZXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25368, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVZXDQ[] = { + {I_VPMOVZXDQ, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+37407, 188}, + {I_VPMOVZXDQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40494, 207}, + {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25304, 240}, + {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25312, 240}, + {I_VPMOVZXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25320, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULHUW[] = { + {I_VPMULHUW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37414, 188}, + {I_VPMULHUW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37421, 188}, + {I_VPMULHUW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40529, 207}, + {I_VPMULHUW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40536, 207}, + {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25472, 244}, + {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25480, 244}, + {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25488, 244}, + {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25496, 244}, + {I_VPMULHUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25504, 245}, + {I_VPMULHUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25512, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULHRSW[] = { + {I_VPMULHRSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37428, 188}, + {I_VPMULHRSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37435, 188}, + {I_VPMULHRSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40515, 207}, + {I_VPMULHRSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40522, 207}, + {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25424, 244}, + {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25432, 244}, + {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25440, 244}, + {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25448, 244}, + {I_VPMULHRSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25456, 245}, + {I_VPMULHRSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25464, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULHW[] = { + {I_VPMULHW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37442, 188}, + {I_VPMULHW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37449, 188}, + {I_VPMULHW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40543, 207}, + {I_VPMULHW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40550, 207}, + {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25520, 244}, + {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25528, 244}, + {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25536, 244}, + {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25544, 244}, + {I_VPMULHW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25552, 245}, + {I_VPMULHW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25560, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULLW[] = { + {I_VPMULLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37456, 188}, + {I_VPMULLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37463, 188}, + {I_VPMULLW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40557, 207}, + {I_VPMULLW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40564, 207}, + {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25664, 244}, + {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25672, 244}, + {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25680, 244}, + {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25688, 244}, + {I_VPMULLW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25696, 245}, + {I_VPMULLW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25704, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULLD[] = { + {I_VPMULLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37470, 188}, + {I_VPMULLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37477, 188}, + {I_VPMULLD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40571, 207}, + {I_VPMULLD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40578, 207}, + {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25568, 240}, + {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25576, 240}, + {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25584, 240}, + {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25592, 240}, + {I_VPMULLD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25600, 241}, + {I_VPMULLD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25608, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULUDQ[] = { + {I_VPMULUDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37484, 188}, + {I_VPMULUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37491, 188}, + {I_VPMULUDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40585, 207}, + {I_VPMULUDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40592, 207}, + {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25760, 240}, + {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25768, 240}, + {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25776, 240}, + {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25784, 240}, + {I_VPMULUDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25792, 241}, + {I_VPMULUDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25800, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULDQ[] = { + {I_VPMULDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37498, 188}, + {I_VPMULDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37505, 188}, + {I_VPMULDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40501, 207}, + {I_VPMULDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40508, 207}, + {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25376, 240}, + {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25384, 240}, + {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25392, 240}, + {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25400, 240}, + {I_VPMULDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25408, 241}, + {I_VPMULDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25416, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPOR[] = { + {I_VPOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37512, 188}, + {I_VPOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37519, 188}, + {I_VPOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40599, 207}, + {I_VPOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40606, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSADBW[] = { + {I_VPSADBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37526, 188}, + {I_VPSADBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37533, 188}, + {I_VPSADBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40613, 207}, + {I_VPSADBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40620, 207}, + {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+26096, 244}, + {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 244}, + {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+26112, 244}, + {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+26120, 244}, + {I_VPSADBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+26128, 245}, + {I_VPSADBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+26136, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHUFB[] = { + {I_VPSHUFB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37540, 188}, + {I_VPSHUFB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37547, 188}, + {I_VPSHUFB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40627, 207}, + {I_VPSHUFB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40634, 207}, + {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26144, 244}, + {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26152, 244}, + {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26160, 244}, + {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26168, 244}, + {I_VPSHUFB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26176, 245}, + {I_VPSHUFB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26184, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHUFD[] = { + {I_VPSHUFD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13872, 188}, + {I_VPSHUFD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15872, 207}, + {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10099, 240}, + {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10108, 240}, + {I_VPSHUFD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10117, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHUFHW[] = { + {I_VPSHUFHW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13880, 188}, + {I_VPSHUFHW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15880, 207}, + {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10126, 244}, + {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10135, 244}, + {I_VPSHUFHW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10144, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHUFLW[] = { + {I_VPSHUFLW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13888, 188}, + {I_VPSHUFLW, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15888, 207}, + {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10153, 244}, + {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10162, 244}, + {I_VPSHUFLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10171, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSIGNB[] = { + {I_VPSIGNB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37554, 188}, + {I_VPSIGNB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37561, 188}, + {I_VPSIGNB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40641, 207}, + {I_VPSIGNB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40648, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSIGNW[] = { + {I_VPSIGNW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37568, 188}, + {I_VPSIGNW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37575, 188}, + {I_VPSIGNW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40655, 207}, + {I_VPSIGNW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40662, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSIGND[] = { + {I_VPSIGND, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37582, 188}, + {I_VPSIGND, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37589, 188}, + {I_VPSIGND, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40669, 207}, + {I_VPSIGND, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40676, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLDQ[] = { + {I_VPSLLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13896, 188}, + {I_VPSLLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13904, 188}, + {I_VPSLLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15896, 207}, + {I_VPSLLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15904, 207}, + {I_VPSLLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10234, 244}, + {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10243, 244}, + {I_VPSLLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10252, 244}, + {I_VPSLLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10261, 244}, + {I_VPSLLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10270, 245}, + {I_VPSLLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10279, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLDQ[] = { + {I_VPSRLDQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13912, 188}, + {I_VPSRLDQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13920, 188}, + {I_VPSRLDQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15992, 207}, + {I_VPSRLDQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16000, 207}, + {I_VPSRLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10612, 244}, + {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10621, 244}, + {I_VPSRLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10630, 244}, + {I_VPSRLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10639, 244}, + {I_VPSRLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10648, 245}, + {I_VPSRLDQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10657, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLW[] = { + {I_VPSLLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37596, 188}, + {I_VPSLLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37603, 188}, + {I_VPSLLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13928, 188}, + {I_VPSLLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13936, 188}, + {I_VPSLLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40683, 207}, + {I_VPSLLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40690, 207}, + {I_VPSLLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15912, 207}, + {I_VPSLLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15920, 207}, + {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26432, 244}, + {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26440, 244}, + {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26448, 244}, + {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26456, 244}, + {I_VPSLLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26464, 245}, + {I_VPSLLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26472, 245}, + {I_VPSLLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10342, 244}, + {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10351, 244}, + {I_VPSLLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10360, 244}, + {I_VPSLLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10369, 244}, + {I_VPSLLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10378, 245}, + {I_VPSLLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10387, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLD[] = { + {I_VPSLLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37610, 188}, + {I_VPSLLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37617, 188}, + {I_VPSLLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13944, 188}, + {I_VPSLLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13952, 188}, + {I_VPSLLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40697, 207}, + {I_VPSLLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40704, 207}, + {I_VPSLLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15928, 207}, + {I_VPSLLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15936, 207}, + {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26192, 240}, + {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26200, 240}, + {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26208, 240}, + {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26216, 240}, + {I_VPSLLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26224, 241}, + {I_VPSLLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26232, 241}, + {I_VPSLLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10180, 240}, + {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10189, 240}, + {I_VPSLLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10198, 240}, + {I_VPSLLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10207, 240}, + {I_VPSLLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10216, 241}, + {I_VPSLLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10225, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLQ[] = { + {I_VPSLLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37624, 188}, + {I_VPSLLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37631, 188}, + {I_VPSLLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13960, 188}, + {I_VPSLLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13968, 188}, + {I_VPSLLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40711, 207}, + {I_VPSLLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40718, 207}, + {I_VPSLLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15944, 207}, + {I_VPSLLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15952, 207}, + {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26240, 240}, + {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26248, 240}, + {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26256, 240}, + {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26264, 240}, + {I_VPSLLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26272, 241}, + {I_VPSLLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26280, 241}, + {I_VPSLLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10288, 240}, + {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10297, 240}, + {I_VPSLLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10306, 240}, + {I_VPSLLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10315, 240}, + {I_VPSLLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10324, 241}, + {I_VPSLLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10333, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAW[] = { + {I_VPSRAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37638, 188}, + {I_VPSRAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37645, 188}, + {I_VPSRAW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13976, 188}, + {I_VPSRAW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+13984, 188}, + {I_VPSRAW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40725, 207}, + {I_VPSRAW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40732, 207}, + {I_VPSRAW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15960, 207}, + {I_VPSRAW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15968, 207}, + {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26720, 244}, + {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26728, 244}, + {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26736, 244}, + {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26744, 244}, + {I_VPSRAW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26752, 245}, + {I_VPSRAW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26760, 245}, + {I_VPSRAW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10504, 244}, + {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10513, 244}, + {I_VPSRAW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10522, 244}, + {I_VPSRAW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10531, 244}, + {I_VPSRAW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10540, 245}, + {I_VPSRAW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10549, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAD[] = { + {I_VPSRAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37652, 188}, + {I_VPSRAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37659, 188}, + {I_VPSRAD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+13992, 188}, + {I_VPSRAD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14000, 188}, + {I_VPSRAD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40739, 207}, + {I_VPSRAD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40746, 207}, + {I_VPSRAD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15976, 207}, + {I_VPSRAD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15984, 207}, + {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26480, 240}, + {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26488, 240}, + {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26496, 240}, + {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26504, 240}, + {I_VPSRAD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26512, 241}, + {I_VPSRAD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26520, 241}, + {I_VPSRAD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10396, 240}, + {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10405, 240}, + {I_VPSRAD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10414, 240}, + {I_VPSRAD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10423, 240}, + {I_VPSRAD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10432, 241}, + {I_VPSRAD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10441, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLW[] = { + {I_VPSRLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37666, 188}, + {I_VPSRLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37673, 188}, + {I_VPSRLW, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14008, 188}, + {I_VPSRLW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14016, 188}, + {I_VPSRLW, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40753, 207}, + {I_VPSRLW, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40760, 207}, + {I_VPSRLW, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16008, 207}, + {I_VPSRLW, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16016, 207}, + {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27008, 244}, + {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27016, 244}, + {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27024, 244}, + {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27032, 244}, + {I_VPSRLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27040, 245}, + {I_VPSRLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27048, 245}, + {I_VPSRLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10720, 244}, + {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10729, 244}, + {I_VPSRLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10738, 244}, + {I_VPSRLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10747, 244}, + {I_VPSRLW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10756, 245}, + {I_VPSRLW, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10765, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLD[] = { + {I_VPSRLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37680, 188}, + {I_VPSRLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37687, 188}, + {I_VPSRLD, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14024, 188}, + {I_VPSRLD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14032, 188}, + {I_VPSRLD, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40767, 207}, + {I_VPSRLD, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40774, 207}, + {I_VPSRLD, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16024, 207}, + {I_VPSRLD, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16032, 207}, + {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26768, 240}, + {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26776, 240}, + {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26784, 240}, + {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26792, 240}, + {I_VPSRLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26800, 241}, + {I_VPSRLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26808, 241}, + {I_VPSRLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10558, 240}, + {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10567, 240}, + {I_VPSRLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10576, 240}, + {I_VPSRLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10585, 240}, + {I_VPSRLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10594, 241}, + {I_VPSRLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10603, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLQ[] = { + {I_VPSRLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37694, 188}, + {I_VPSRLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37701, 188}, + {I_VPSRLQ, 3, {XMM_L16,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14040, 188}, + {I_VPSRLQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+14048, 188}, + {I_VPSRLQ, 3, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40781, 207}, + {I_VPSRLQ, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+40788, 207}, + {I_VPSRLQ, 3, {YMM_L16,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16040, 207}, + {I_VPSRLQ, 2, {YMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16048, 207}, + {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26816, 240}, + {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26824, 240}, + {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26832, 240}, + {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26840, 240}, + {I_VPSRLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26848, 241}, + {I_VPSRLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26856, 241}, + {I_VPSRLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10666, 240}, + {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10675, 240}, + {I_VPSRLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10684, 240}, + {I_VPSRLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10693, 240}, + {I_VPSRLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10702, 241}, + {I_VPSRLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10711, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTEST[] = { + {I_VPTEST, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37708, 188}, + {I_VPTEST, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37715, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBB[] = { + {I_VPSUBB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37722, 188}, + {I_VPSUBB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37729, 188}, + {I_VPSUBB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40795, 207}, + {I_VPSUBB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40802, 207}, + {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27056, 244}, + {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27064, 244}, + {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27072, 244}, + {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27080, 244}, + {I_VPSUBB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27088, 245}, + {I_VPSUBB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27096, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBW[] = { + {I_VPSUBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37736, 188}, + {I_VPSUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37743, 188}, + {I_VPSUBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40809, 207}, + {I_VPSUBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40816, 207}, + {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27392, 244}, + {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27400, 244}, + {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27408, 244}, + {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27416, 244}, + {I_VPSUBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27424, 245}, + {I_VPSUBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27432, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBD[] = { + {I_VPSUBD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37750, 188}, + {I_VPSUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37757, 188}, + {I_VPSUBD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40823, 207}, + {I_VPSUBD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40830, 207}, + {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27104, 240}, + {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27112, 240}, + {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27120, 240}, + {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27128, 240}, + {I_VPSUBD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27136, 241}, + {I_VPSUBD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27144, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBQ[] = { + {I_VPSUBQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37764, 188}, + {I_VPSUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37771, 188}, + {I_VPSUBQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40837, 207}, + {I_VPSUBQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40844, 207}, + {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27152, 240}, + {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27160, 240}, + {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27168, 240}, + {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27176, 240}, + {I_VPSUBQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27184, 241}, + {I_VPSUBQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27192, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBSB[] = { + {I_VPSUBSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37778, 188}, + {I_VPSUBSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37785, 188}, + {I_VPSUBSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40851, 207}, + {I_VPSUBSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40858, 207}, + {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27200, 244}, + {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27208, 244}, + {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27216, 244}, + {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27224, 244}, + {I_VPSUBSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27232, 245}, + {I_VPSUBSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27240, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBSW[] = { + {I_VPSUBSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37792, 188}, + {I_VPSUBSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37799, 188}, + {I_VPSUBSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40865, 207}, + {I_VPSUBSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40872, 207}, + {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27248, 244}, + {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27256, 244}, + {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27264, 244}, + {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27272, 244}, + {I_VPSUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27280, 245}, + {I_VPSUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27288, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBUSB[] = { + {I_VPSUBUSB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37806, 188}, + {I_VPSUBUSB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37813, 188}, + {I_VPSUBUSB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40879, 207}, + {I_VPSUBUSB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40886, 207}, + {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27296, 244}, + {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27304, 244}, + {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27312, 244}, + {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27320, 244}, + {I_VPSUBUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27328, 245}, + {I_VPSUBUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27336, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSUBUSW[] = { + {I_VPSUBUSW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37820, 188}, + {I_VPSUBUSW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37827, 188}, + {I_VPSUBUSW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40893, 207}, + {I_VPSUBUSW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40900, 207}, + {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27344, 244}, + {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27352, 244}, + {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27360, 244}, + {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27368, 244}, + {I_VPSUBUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27376, 245}, + {I_VPSUBUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27384, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKHBW[] = { + {I_VPUNPCKHBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37834, 188}, + {I_VPUNPCKHBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37841, 188}, + {I_VPUNPCKHBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40907, 207}, + {I_VPUNPCKHBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40914, 207}, + {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27632, 244}, + {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27640, 244}, + {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27648, 244}, + {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27656, 244}, + {I_VPUNPCKHBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27664, 245}, + {I_VPUNPCKHBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27672, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKHWD[] = { + {I_VPUNPCKHWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37848, 188}, + {I_VPUNPCKHWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37855, 188}, + {I_VPUNPCKHWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40921, 207}, + {I_VPUNPCKHWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40928, 207}, + {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27776, 244}, + {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27784, 244}, + {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27792, 244}, + {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27800, 244}, + {I_VPUNPCKHWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27808, 245}, + {I_VPUNPCKHWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27816, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKHDQ[] = { + {I_VPUNPCKHDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37862, 188}, + {I_VPUNPCKHDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37869, 188}, + {I_VPUNPCKHDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40935, 207}, + {I_VPUNPCKHDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40942, 207}, + {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27680, 240}, + {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27688, 240}, + {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27696, 240}, + {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27704, 240}, + {I_VPUNPCKHDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27712, 241}, + {I_VPUNPCKHDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27720, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKHQDQ[] = { + {I_VPUNPCKHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37876, 188}, + {I_VPUNPCKHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37883, 188}, + {I_VPUNPCKHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40949, 207}, + {I_VPUNPCKHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40956, 207}, + {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27728, 240}, + {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27736, 240}, + {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27744, 240}, + {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27752, 240}, + {I_VPUNPCKHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27760, 241}, + {I_VPUNPCKHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27768, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKLBW[] = { + {I_VPUNPCKLBW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37890, 188}, + {I_VPUNPCKLBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37897, 188}, + {I_VPUNPCKLBW, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40963, 207}, + {I_VPUNPCKLBW, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40970, 207}, + {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27824, 244}, + {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27832, 244}, + {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27840, 244}, + {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27848, 244}, + {I_VPUNPCKLBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27856, 245}, + {I_VPUNPCKLBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27864, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKLWD[] = { + {I_VPUNPCKLWD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37904, 188}, + {I_VPUNPCKLWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37911, 188}, + {I_VPUNPCKLWD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40977, 207}, + {I_VPUNPCKLWD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40984, 207}, + {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27968, 244}, + {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27976, 244}, + {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27984, 244}, + {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27992, 244}, + {I_VPUNPCKLWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28000, 245}, + {I_VPUNPCKLWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28008, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKLDQ[] = { + {I_VPUNPCKLDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37918, 188}, + {I_VPUNPCKLDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37925, 188}, + {I_VPUNPCKLDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+40991, 207}, + {I_VPUNPCKLDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+40998, 207}, + {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27872, 240}, + {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27880, 240}, + {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27888, 240}, + {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27896, 240}, + {I_VPUNPCKLDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+27904, 241}, + {I_VPUNPCKLDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+27912, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPUNPCKLQDQ[] = { + {I_VPUNPCKLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37932, 188}, + {I_VPUNPCKLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37939, 188}, + {I_VPUNPCKLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41005, 207}, + {I_VPUNPCKLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41012, 207}, + {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27920, 240}, + {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27928, 240}, + {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27936, 240}, + {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27944, 240}, + {I_VPUNPCKLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+27952, 241}, + {I_VPUNPCKLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+27960, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPXOR[] = { + {I_VPXOR, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+37946, 188}, + {I_VPXOR, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37953, 188}, + {I_VPXOR, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41019, 207}, + {I_VPXOR, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41026, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCPPS[] = { + {I_VRCPPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37960, 188}, + {I_VRCPPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37967, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCPSS[] = { + {I_VRCPSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+37974, 188}, + {I_VRCPSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+37981, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRTPS[] = { + {I_VRSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+37988, 188}, + {I_VRSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+37995, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRTSS[] = { + {I_VRSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38002, 188}, + {I_VRSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38009, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VROUNDPD[] = { + {I_VROUNDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14056, 188}, + {I_VROUNDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14064, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VROUNDPS[] = { + {I_VROUNDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14072, 188}, + {I_VROUNDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14080, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VROUNDSD[] = { + {I_VROUNDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14088, 188}, + {I_VROUNDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14096, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VROUNDSS[] = { + {I_VROUNDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14104, 188}, + {I_VROUNDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14112, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFPD[] = { + {I_VSHUFPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14120, 188}, + {I_VSHUFPD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14128, 188}, + {I_VSHUFPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14136, 188}, + {I_VSHUFPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14144, 188}, + {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11476, 240}, + {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11485, 240}, + {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11494, 240}, + {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11503, 240}, + {I_VSHUFPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11512, 241}, + {I_VSHUFPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11521, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFPS[] = { + {I_VSHUFPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14152, 188}, + {I_VSHUFPS, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14160, 188}, + {I_VSHUFPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14168, 188}, + {I_VSHUFPS, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14176, 188}, + {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11530, 240}, + {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11539, 240}, + {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11548, 240}, + {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11557, 240}, + {I_VSHUFPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11566, 241}, + {I_VSHUFPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11575, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTPD[] = { + {I_VSQRTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38016, 188}, + {I_VSQRTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38023, 188}, + {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28496, 240}, + {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28504, 240}, + {I_VSQRTPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28512, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTPS[] = { + {I_VSQRTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38030, 188}, + {I_VSQRTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38037, 188}, + {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28520, 240}, + {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28528, 240}, + {I_VSQRTPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28536, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTSD[] = { + {I_VSQRTSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38044, 188}, + {I_VSQRTSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38051, 188}, + {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28544, 241}, + {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28552, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTSS[] = { + {I_VSQRTSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38058, 188}, + {I_VSQRTSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38065, 188}, + {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28560, 241}, + {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28568, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSTMXCSR[] = { + {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+38072, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBPD[] = { + {I_VSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38079, 188}, + {I_VSUBPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38086, 188}, + {I_VSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38093, 188}, + {I_VSUBPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38100, 188}, + {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28576, 240}, + {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28584, 240}, + {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28592, 240}, + {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28600, 240}, + {I_VSUBPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28608, 241}, + {I_VSUBPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28616, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBPS[] = { + {I_VSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38107, 188}, + {I_VSUBPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38114, 188}, + {I_VSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38121, 188}, + {I_VSUBPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38128, 188}, + {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28624, 240}, + {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28632, 240}, + {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28640, 240}, + {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28648, 240}, + {I_VSUBPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28656, 241}, + {I_VSUBPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28664, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBSD[] = { + {I_VSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38135, 188}, + {I_VSUBSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38142, 188}, + {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28672, 241}, + {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28680, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBSS[] = { + {I_VSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38149, 188}, + {I_VSUBSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38156, 188}, + {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28688, 241}, + {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28696, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VTESTPS[] = { + {I_VTESTPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38163, 188}, + {I_VTESTPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38170, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VTESTPD[] = { + {I_VTESTPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38177, 188}, + {I_VTESTPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38184, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUCOMISD[] = { + {I_VUCOMISD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+38191, 188}, + {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28704, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUCOMISS[] = { + {I_VUCOMISS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+38198, 188}, + {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+28712, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUNPCKHPD[] = { + {I_VUNPCKHPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38205, 188}, + {I_VUNPCKHPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38212, 188}, + {I_VUNPCKHPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38219, 188}, + {I_VUNPCKHPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38226, 188}, + {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28720, 240}, + {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28728, 240}, + {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28736, 240}, + {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28744, 240}, + {I_VUNPCKHPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28752, 241}, + {I_VUNPCKHPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28760, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUNPCKHPS[] = { + {I_VUNPCKHPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38233, 188}, + {I_VUNPCKHPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38240, 188}, + {I_VUNPCKHPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38247, 188}, + {I_VUNPCKHPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38254, 188}, + {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28768, 240}, + {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28776, 240}, + {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28784, 240}, + {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28792, 240}, + {I_VUNPCKHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28800, 241}, + {I_VUNPCKHPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28808, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUNPCKLPD[] = { + {I_VUNPCKLPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38261, 188}, + {I_VUNPCKLPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38268, 188}, + {I_VUNPCKLPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38275, 188}, + {I_VUNPCKLPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38282, 188}, + {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28816, 240}, + {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28824, 240}, + {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28832, 240}, + {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28840, 240}, + {I_VUNPCKLPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28848, 241}, + {I_VUNPCKLPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28856, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUNPCKLPS[] = { + {I_VUNPCKLPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38289, 188}, + {I_VUNPCKLPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38296, 188}, + {I_VUNPCKLPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38303, 188}, + {I_VUNPCKLPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38310, 188}, + {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28864, 240}, + {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28872, 240}, + {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28880, 240}, + {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28888, 240}, + {I_VUNPCKLPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28896, 241}, + {I_VUNPCKLPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VXORPD[] = { + {I_VXORPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38317, 188}, + {I_VXORPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38324, 188}, + {I_VXORPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38331, 188}, + {I_VXORPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38338, 188}, + {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28912, 242}, + {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28920, 242}, + {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28928, 242}, + {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28936, 242}, + {I_VXORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28944, 243}, + {I_VXORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28952, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VXORPS[] = { + {I_VXORPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38345, 188}, + {I_VXORPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+38352, 188}, + {I_VXORPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38359, 188}, + {I_VXORPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+38366, 188}, + {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28960, 242}, + {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28968, 242}, + {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28976, 242}, + {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28984, 242}, + {I_VXORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28992, 243}, + {I_VXORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29000, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VZEROALL[] = { + {I_VZEROALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45759, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VZEROUPPER[] = { + {I_VZEROUPPER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45765, 188}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCLMULLQLQDQ[] = { + {I_PCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7768, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCLMULHQLQDQ[] = { + {I_PCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7777, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCLMULLQHQDQ[] = { + {I_PCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7786, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCLMULHQHQDQ[] = { + {I_PCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7795, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCLMULQDQ[] = { + {I_PCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14184, 187}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCLMULLQLQDQ[] = { + {I_VPCLMULLQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7804, 188}, + {I_VPCLMULLQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7813, 188}, + {I_VPCLMULLQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7876, 198}, + {I_VPCLMULLQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7885, 198}, + {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+0, 199}, + {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+10, 199}, + {I_VPCLMULLQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+80, 199}, + {I_VPCLMULLQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+90, 199}, + {I_VPCLMULLQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+160, 200}, + {I_VPCLMULLQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+170, 200}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCLMULHQLQDQ[] = { + {I_VPCLMULHQLQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7822, 188}, + {I_VPCLMULHQLQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7831, 188}, + {I_VPCLMULHQLQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7894, 198}, + {I_VPCLMULHQLQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7903, 198}, + {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+20, 199}, + {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+30, 199}, + {I_VPCLMULHQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+100, 199}, + {I_VPCLMULHQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+110, 199}, + {I_VPCLMULHQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+180, 200}, + {I_VPCLMULHQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+190, 200}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCLMULLQHQDQ[] = { + {I_VPCLMULLQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7840, 188}, + {I_VPCLMULLQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7849, 188}, + {I_VPCLMULLQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7912, 198}, + {I_VPCLMULLQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7921, 198}, + {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+40, 199}, + {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+50, 199}, + {I_VPCLMULLQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+120, 199}, + {I_VPCLMULLQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+130, 199}, + {I_VPCLMULLQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+200, 200}, + {I_VPCLMULLQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+210, 200}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCLMULHQHQDQ[] = { + {I_VPCLMULHQHQDQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+7858, 188}, + {I_VPCLMULHQHQDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+7867, 188}, + {I_VPCLMULHQHQDQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+7930, 198}, + {I_VPCLMULHQHQDQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+7939, 198}, + {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+60, 199}, + {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+70, 199}, + {I_VPCLMULHQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+140, 199}, + {I_VPCLMULHQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+150, 199}, + {I_VPCLMULHQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+220, 200}, + {I_VPCLMULHQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+230, 200}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCLMULQDQ[] = { + {I_VPCLMULQDQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14192, 188}, + {I_VPCLMULQDQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14200, 188}, + {I_VPCLMULQDQ, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+14208, 198}, + {I_VPCLMULQDQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14216, 198}, + {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7948, 199}, + {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7957, 199}, + {I_VPCLMULQDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7966, 199}, + {I_VPCLMULQDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7975, 199}, + {I_VPCLMULQDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+7984, 200}, + {I_VPCLMULQDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+7993, 200}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD132PS[] = { + {I_VFMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38373, 201}, + {I_VFMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38380, 201}, + {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18144, 240}, + {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18152, 240}, + {I_VFMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18160, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD132PD[] = { + {I_VFMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38387, 201}, + {I_VFMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38394, 201}, + {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18120, 240}, + {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18128, 240}, + {I_VFMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18136, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD312PS[] = { + {I_VFMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38373, 201}, + {I_VFMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38380, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD312PD[] = { + {I_VFMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38387, 201}, + {I_VFMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38394, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD213PS[] = { + {I_VFMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38401, 201}, + {I_VFMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38408, 201}, + {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18208, 240}, + {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18216, 240}, + {I_VFMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18224, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD213PD[] = { + {I_VFMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38415, 201}, + {I_VFMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38422, 201}, + {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18184, 240}, + {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18192, 240}, + {I_VFMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18200, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD123PS[] = { + {I_VFMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38401, 201}, + {I_VFMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38408, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD123PD[] = { + {I_VFMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38415, 201}, + {I_VFMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38422, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD231PS[] = { + {I_VFMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38429, 201}, + {I_VFMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38436, 201}, + {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18272, 240}, + {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18280, 240}, + {I_VFMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18288, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD231PD[] = { + {I_VFMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38443, 201}, + {I_VFMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38450, 201}, + {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18248, 240}, + {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18256, 240}, + {I_VFMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18264, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD321PS[] = { + {I_VFMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38429, 201}, + {I_VFMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38436, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD321PD[] = { + {I_VFMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38443, 201}, + {I_VFMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38450, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB132PS[] = { + {I_VFMADDSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38457, 201}, + {I_VFMADDSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38464, 201}, + {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18336, 240}, + {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18344, 240}, + {I_VFMADDSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18352, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB132PD[] = { + {I_VFMADDSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38471, 201}, + {I_VFMADDSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38478, 201}, + {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18312, 240}, + {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18320, 240}, + {I_VFMADDSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18328, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB312PS[] = { + {I_VFMADDSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38457, 201}, + {I_VFMADDSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38464, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB312PD[] = { + {I_VFMADDSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38471, 201}, + {I_VFMADDSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38478, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB213PS[] = { + {I_VFMADDSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38485, 201}, + {I_VFMADDSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38492, 201}, + {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18384, 240}, + {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18392, 240}, + {I_VFMADDSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18400, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB213PD[] = { + {I_VFMADDSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38499, 201}, + {I_VFMADDSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38506, 201}, + {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18360, 240}, + {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18368, 240}, + {I_VFMADDSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18376, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB123PS[] = { + {I_VFMADDSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38485, 201}, + {I_VFMADDSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38492, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB123PD[] = { + {I_VFMADDSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38499, 201}, + {I_VFMADDSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38506, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB231PS[] = { + {I_VFMADDSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38513, 201}, + {I_VFMADDSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38520, 201}, + {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18432, 240}, + {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18440, 240}, + {I_VFMADDSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18448, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB231PD[] = { + {I_VFMADDSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38527, 201}, + {I_VFMADDSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38534, 201}, + {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18408, 240}, + {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18416, 240}, + {I_VFMADDSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18424, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB321PS[] = { + {I_VFMADDSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38513, 201}, + {I_VFMADDSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38520, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB321PD[] = { + {I_VFMADDSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38527, 201}, + {I_VFMADDSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38534, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB132PS[] = { + {I_VFMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38541, 201}, + {I_VFMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38548, 201}, + {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18480, 240}, + {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18488, 240}, + {I_VFMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18496, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB132PD[] = { + {I_VFMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38555, 201}, + {I_VFMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38562, 201}, + {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18456, 240}, + {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18464, 240}, + {I_VFMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18472, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB312PS[] = { + {I_VFMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38541, 201}, + {I_VFMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38548, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB312PD[] = { + {I_VFMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38555, 201}, + {I_VFMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38562, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB213PS[] = { + {I_VFMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38569, 201}, + {I_VFMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38576, 201}, + {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18544, 240}, + {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18552, 240}, + {I_VFMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18560, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB213PD[] = { + {I_VFMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38583, 201}, + {I_VFMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38590, 201}, + {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18520, 240}, + {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18528, 240}, + {I_VFMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18536, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB123PS[] = { + {I_VFMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38569, 201}, + {I_VFMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38576, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB123PD[] = { + {I_VFMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38583, 201}, + {I_VFMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38590, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB231PS[] = { + {I_VFMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38597, 201}, + {I_VFMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38604, 201}, + {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18608, 240}, + {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18616, 240}, + {I_VFMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18624, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB231PD[] = { + {I_VFMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38611, 201}, + {I_VFMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38618, 201}, + {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18584, 240}, + {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18592, 240}, + {I_VFMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18600, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB321PS[] = { + {I_VFMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38597, 201}, + {I_VFMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38604, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB321PD[] = { + {I_VFMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38611, 201}, + {I_VFMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38618, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD132PS[] = { + {I_VFMSUBADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38625, 201}, + {I_VFMSUBADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38632, 201}, + {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18672, 240}, + {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18680, 240}, + {I_VFMSUBADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18688, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD132PD[] = { + {I_VFMSUBADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38639, 201}, + {I_VFMSUBADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38646, 201}, + {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18648, 240}, + {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18656, 240}, + {I_VFMSUBADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18664, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD312PS[] = { + {I_VFMSUBADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38625, 201}, + {I_VFMSUBADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38632, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD312PD[] = { + {I_VFMSUBADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38639, 201}, + {I_VFMSUBADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38646, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD213PS[] = { + {I_VFMSUBADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38653, 201}, + {I_VFMSUBADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38660, 201}, + {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18720, 240}, + {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18728, 240}, + {I_VFMSUBADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18736, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD213PD[] = { + {I_VFMSUBADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38667, 201}, + {I_VFMSUBADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38674, 201}, + {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18696, 240}, + {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18704, 240}, + {I_VFMSUBADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18712, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD123PS[] = { + {I_VFMSUBADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38653, 201}, + {I_VFMSUBADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38660, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD123PD[] = { + {I_VFMSUBADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38667, 201}, + {I_VFMSUBADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38674, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD231PS[] = { + {I_VFMSUBADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38681, 201}, + {I_VFMSUBADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38688, 201}, + {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18768, 240}, + {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18776, 240}, + {I_VFMSUBADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18784, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD231PD[] = { + {I_VFMSUBADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38695, 201}, + {I_VFMSUBADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38702, 201}, + {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18744, 240}, + {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18752, 240}, + {I_VFMSUBADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18760, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD321PS[] = { + {I_VFMSUBADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38681, 201}, + {I_VFMSUBADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38688, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD321PD[] = { + {I_VFMSUBADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38695, 201}, + {I_VFMSUBADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38702, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD132PS[] = { + {I_VFNMADD132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38709, 201}, + {I_VFNMADD132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38716, 201}, + {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18816, 240}, + {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18824, 240}, + {I_VFNMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18832, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD132PD[] = { + {I_VFNMADD132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38723, 201}, + {I_VFNMADD132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38730, 201}, + {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18792, 240}, + {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18800, 240}, + {I_VFNMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18808, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD312PS[] = { + {I_VFNMADD312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38709, 201}, + {I_VFNMADD312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38716, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD312PD[] = { + {I_VFNMADD312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38723, 201}, + {I_VFNMADD312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38730, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD213PS[] = { + {I_VFNMADD213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38737, 201}, + {I_VFNMADD213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38744, 201}, + {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18880, 240}, + {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18888, 240}, + {I_VFNMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18896, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD213PD[] = { + {I_VFNMADD213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38751, 201}, + {I_VFNMADD213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38758, 201}, + {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18856, 240}, + {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18864, 240}, + {I_VFNMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18872, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD123PS[] = { + {I_VFNMADD123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38737, 201}, + {I_VFNMADD123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38744, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD123PD[] = { + {I_VFNMADD123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38751, 201}, + {I_VFNMADD123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38758, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD231PS[] = { + {I_VFNMADD231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38765, 201}, + {I_VFNMADD231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38772, 201}, + {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18944, 240}, + {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18952, 240}, + {I_VFNMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+18960, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD231PD[] = { + {I_VFNMADD231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38779, 201}, + {I_VFNMADD231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38786, 201}, + {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18920, 240}, + {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18928, 240}, + {I_VFNMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+18936, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD321PS[] = { + {I_VFNMADD321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38765, 201}, + {I_VFNMADD321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38772, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD321PD[] = { + {I_VFNMADD321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38779, 201}, + {I_VFNMADD321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38786, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB132PS[] = { + {I_VFNMSUB132PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38793, 201}, + {I_VFNMSUB132PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38800, 201}, + {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19008, 240}, + {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19016, 240}, + {I_VFNMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19024, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB132PD[] = { + {I_VFNMSUB132PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38807, 201}, + {I_VFNMSUB132PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38814, 201}, + {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18984, 240}, + {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18992, 240}, + {I_VFNMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19000, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB312PS[] = { + {I_VFNMSUB312PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38793, 201}, + {I_VFNMSUB312PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38800, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB312PD[] = { + {I_VFNMSUB312PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38807, 201}, + {I_VFNMSUB312PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38814, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB213PS[] = { + {I_VFNMSUB213PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38821, 201}, + {I_VFNMSUB213PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38828, 201}, + {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19072, 240}, + {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19080, 240}, + {I_VFNMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19088, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB213PD[] = { + {I_VFNMSUB213PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38835, 201}, + {I_VFNMSUB213PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38842, 201}, + {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19048, 240}, + {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19056, 240}, + {I_VFNMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19064, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB123PS[] = { + {I_VFNMSUB123PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38821, 201}, + {I_VFNMSUB123PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38828, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB123PD[] = { + {I_VFNMSUB123PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38835, 201}, + {I_VFNMSUB123PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38842, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB231PS[] = { + {I_VFNMSUB231PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38849, 201}, + {I_VFNMSUB231PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38856, 201}, + {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19136, 240}, + {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+19144, 240}, + {I_VFNMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+19152, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB231PD[] = { + {I_VFNMSUB231PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38863, 201}, + {I_VFNMSUB231PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38870, 201}, + {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19112, 240}, + {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+19120, 240}, + {I_VFNMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+19128, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB321PS[] = { + {I_VFNMSUB321PS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38849, 201}, + {I_VFNMSUB321PS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38856, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB321PD[] = { + {I_VFNMSUB321PD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+38863, 201}, + {I_VFNMSUB321PD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+38870, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD132SS[] = { + {I_VFMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38877, 201}, + {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18176, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD132SD[] = { + {I_VFMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38884, 201}, + {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18168, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD312SS[] = { + {I_VFMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38877, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD312SD[] = { + {I_VFMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38884, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD213SS[] = { + {I_VFMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38891, 201}, + {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18240, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD213SD[] = { + {I_VFMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38898, 201}, + {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18232, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD123SS[] = { + {I_VFMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38891, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD123SD[] = { + {I_VFMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38898, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD231SS[] = { + {I_VFMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38905, 201}, + {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18304, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD231SD[] = { + {I_VFMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38912, 201}, + {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18296, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD321SS[] = { + {I_VFMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38905, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD321SD[] = { + {I_VFMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38912, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB132SS[] = { + {I_VFMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38919, 201}, + {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18512, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB132SD[] = { + {I_VFMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38926, 201}, + {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18504, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB312SS[] = { + {I_VFMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38919, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB312SD[] = { + {I_VFMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38926, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB213SS[] = { + {I_VFMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38933, 201}, + {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18576, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB213SD[] = { + {I_VFMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38940, 201}, + {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18568, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB123SS[] = { + {I_VFMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38933, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB123SD[] = { + {I_VFMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38940, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB231SS[] = { + {I_VFMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38947, 201}, + {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18640, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB231SD[] = { + {I_VFMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38954, 201}, + {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18632, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB321SS[] = { + {I_VFMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38947, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB321SD[] = { + {I_VFMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38954, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD132SS[] = { + {I_VFNMADD132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38961, 201}, + {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18848, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD132SD[] = { + {I_VFNMADD132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38968, 201}, + {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18840, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD312SS[] = { + {I_VFNMADD312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38961, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD312SD[] = { + {I_VFNMADD312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38968, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD213SS[] = { + {I_VFNMADD213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38975, 201}, + {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18912, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD213SD[] = { + {I_VFNMADD213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38982, 201}, + {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD123SS[] = { + {I_VFNMADD123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38975, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD123SD[] = { + {I_VFNMADD123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38982, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD231SS[] = { + {I_VFNMADD231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38989, 201}, + {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18976, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD231SD[] = { + {I_VFNMADD231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38996, 201}, + {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+18968, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD321SS[] = { + {I_VFNMADD321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+38989, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADD321SD[] = { + {I_VFNMADD321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+38996, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB132SS[] = { + {I_VFNMSUB132SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39003, 201}, + {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19040, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB132SD[] = { + {I_VFNMSUB132SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39010, 201}, + {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19032, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB312SS[] = { + {I_VFNMSUB312SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39003, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB312SD[] = { + {I_VFNMSUB312SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39010, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB213SS[] = { + {I_VFNMSUB213SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39017, 201}, + {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19104, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB213SD[] = { + {I_VFNMSUB213SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39024, 201}, + {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19096, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB123SS[] = { + {I_VFNMSUB123SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39017, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB123SD[] = { + {I_VFNMSUB123SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39024, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB231SS[] = { + {I_VFNMSUB231SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39031, 201}, + {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19168, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB231SD[] = { + {I_VFNMSUB231SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39038, 201}, + {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+19160, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB321SS[] = { + {I_VFNMSUB321SS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+39031, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUB321SD[] = { + {I_VFNMSUB321SD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+39038, 201}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDFSBASE[] = { + {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39045, 136}, + {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39052, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDGSBASE[] = { + {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39059, 136}, + {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39066, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDRAND[] = { + {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45771, 135}, + {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45777, 135}, + {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45783, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRFSBASE[] = { + {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39073, 136}, + {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39080, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRGSBASE[] = { + {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39087, 136}, + {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39094, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2PS[] = { + {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39101, 202}, + {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39108, 202}, + {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17240, 240}, + {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 240}, + {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17256, 241}, + {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39108, 297}, + {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39101, 297}, + {I_VCVTPH2PS, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17240, 240}, + {I_VCVTPH2PS, 2, {YMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17248, 240}, + {I_VCVTPH2PS, 2, {ZMM_L16,RM_YMM_L16|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+17256, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2PH[] = { + {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 202}, + {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 202}, + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 240}, + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 240}, + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 241}, + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 240}, + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 240}, + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 241}, + {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS64,XMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14232, 298}, + {I_VCVTPS2PH, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14224, 298}, + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8182, 240}, + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8182, 240}, + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8191, 240}, + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8191, 240}, + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8200, 241}, + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+8200, 241}, + {I_VCVTPS2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30504, 295}, + {I_VCVTPS2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30512, 295}, + {I_VCVTPS2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30520, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADCX[] = { + {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14240, 135}, + {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14248, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ADOX[] = { + {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+14256, 135}, + {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+14264, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDSEED[] = { + {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45789, 135}, + {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45795, 135}, + {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45801, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLAC[] = { + {I_CLAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49147, 203}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STAC[] = { + {I_STAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49152, 203}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSTORE[] = { + {I_XSTORE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49157, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCRYPTECB[] = { + {I_XCRYPTECB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45807, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCRYPTCBC[] = { + {I_XCRYPTCBC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45813, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCRYPTCTR[] = { + {I_XCRYPTCTR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45819, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCRYPTCFB[] = { + {I_XCRYPTCFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45825, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XCRYPTOFB[] = { + {I_XCRYPTOFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45831, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MONTMUL[] = { + {I_MONTMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45837, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSHA1[] = { + {I_XSHA1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45843, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSHA256[] = { + {I_XSHA256, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45849, 32}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LLWPCB[] = { + {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39115, 204}, + {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39122, 205}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SLWPCB[] = { + {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39129, 204}, + {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39136, 205}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LWPVAL[] = { + {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14272, 204}, + {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14280, 205}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LWPINS[] = { + {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14288, 204}, + {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14296, 205}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDPD[] = { + {I_VFMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14304, 206}, + {I_VFMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14312, 206}, + {I_VFMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14320, 206}, + {I_VFMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14328, 206}, + {I_VFMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14336, 206}, + {I_VFMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14344, 206}, + {I_VFMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14352, 206}, + {I_VFMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14360, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDPS[] = { + {I_VFMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14368, 206}, + {I_VFMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14376, 206}, + {I_VFMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14384, 206}, + {I_VFMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14392, 206}, + {I_VFMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14400, 206}, + {I_VFMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14408, 206}, + {I_VFMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14416, 206}, + {I_VFMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14424, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSD[] = { + {I_VFMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14432, 206}, + {I_VFMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14440, 206}, + {I_VFMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14448, 206}, + {I_VFMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14456, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSS[] = { + {I_VFMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14464, 206}, + {I_VFMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14472, 206}, + {I_VFMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14480, 206}, + {I_VFMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14488, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUBPD[] = { + {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14496, 206}, + {I_VFMADDSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14504, 206}, + {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14512, 206}, + {I_VFMADDSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14520, 206}, + {I_VFMADDSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14528, 206}, + {I_VFMADDSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14536, 206}, + {I_VFMADDSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14544, 206}, + {I_VFMADDSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14552, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUBPS[] = { + {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14560, 206}, + {I_VFMADDSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14568, 206}, + {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14576, 206}, + {I_VFMADDSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14584, 206}, + {I_VFMADDSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14592, 206}, + {I_VFMADDSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14600, 206}, + {I_VFMADDSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14608, 206}, + {I_VFMADDSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14616, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADDPD[] = { + {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14624, 206}, + {I_VFMSUBADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14632, 206}, + {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14640, 206}, + {I_VFMSUBADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14648, 206}, + {I_VFMSUBADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14656, 206}, + {I_VFMSUBADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14664, 206}, + {I_VFMSUBADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14672, 206}, + {I_VFMSUBADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14680, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADDPS[] = { + {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14688, 206}, + {I_VFMSUBADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14696, 206}, + {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14704, 206}, + {I_VFMSUBADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14712, 206}, + {I_VFMSUBADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14720, 206}, + {I_VFMSUBADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14728, 206}, + {I_VFMSUBADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14736, 206}, + {I_VFMSUBADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14744, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBPD[] = { + {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14752, 206}, + {I_VFMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14760, 206}, + {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14768, 206}, + {I_VFMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14776, 206}, + {I_VFMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14784, 206}, + {I_VFMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14792, 206}, + {I_VFMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14800, 206}, + {I_VFMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14808, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBPS[] = { + {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14816, 206}, + {I_VFMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14824, 206}, + {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14832, 206}, + {I_VFMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14840, 206}, + {I_VFMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14848, 206}, + {I_VFMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14856, 206}, + {I_VFMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14864, 206}, + {I_VFMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+14872, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBSD[] = { + {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14880, 206}, + {I_VFMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14888, 206}, + {I_VFMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+14896, 206}, + {I_VFMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14904, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBSS[] = { + {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14912, 206}, + {I_VFMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14920, 206}, + {I_VFMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+14928, 206}, + {I_VFMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14936, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADDPD[] = { + {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14944, 206}, + {I_VFNMADDPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14952, 206}, + {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+14960, 206}, + {I_VFNMADDPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+14968, 206}, + {I_VFNMADDPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+14976, 206}, + {I_VFNMADDPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+14984, 206}, + {I_VFNMADDPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+14992, 206}, + {I_VFNMADDPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15000, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADDPS[] = { + {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15008, 206}, + {I_VFNMADDPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15016, 206}, + {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15024, 206}, + {I_VFNMADDPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15032, 206}, + {I_VFNMADDPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15040, 206}, + {I_VFNMADDPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15048, 206}, + {I_VFNMADDPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15056, 206}, + {I_VFNMADDPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15064, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADDSD[] = { + {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15072, 206}, + {I_VFNMADDSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15080, 206}, + {I_VFNMADDSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15088, 206}, + {I_VFNMADDSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15096, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMADDSS[] = { + {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15104, 206}, + {I_VFNMADDSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15112, 206}, + {I_VFNMADDSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15120, 206}, + {I_VFNMADDSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15128, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUBPD[] = { + {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15136, 206}, + {I_VFNMSUBPD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15144, 206}, + {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15152, 206}, + {I_VFNMSUBPD, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15160, 206}, + {I_VFNMSUBPD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15168, 206}, + {I_VFNMSUBPD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15176, 206}, + {I_VFNMSUBPD, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15184, 206}, + {I_VFNMSUBPD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15192, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUBPS[] = { + {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15200, 206}, + {I_VFNMSUBPS, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15208, 206}, + {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15216, 206}, + {I_VFNMSUBPS, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15224, 206}, + {I_VFNMSUBPS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15232, 206}, + {I_VFNMSUBPS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15240, 206}, + {I_VFNMSUBPS, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15248, 206}, + {I_VFNMSUBPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15256, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUBSD[] = { + {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15264, 206}, + {I_VFNMSUBSD, 3, {XMM_L16,RM_XMM_L16|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15272, 206}, + {I_VFNMSUBSD, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0}, NO_DECORATOR, nasm_bytecodes+15280, 206}, + {I_VFNMSUBSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15288, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFNMSUBSS[] = { + {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15296, 206}, + {I_VFNMSUBSS, 3, {XMM_L16,RM_XMM_L16|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15304, 206}, + {I_VFNMSUBSS, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0}, NO_DECORATOR, nasm_bytecodes+15312, 206}, + {I_VFNMSUBSS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15320, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFRCZPD[] = { + {I_VFRCZPD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39143, 206}, + {I_VFRCZPD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39150, 206}, + {I_VFRCZPD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39157, 206}, + {I_VFRCZPD, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39164, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFRCZPS[] = { + {I_VFRCZPS, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39171, 206}, + {I_VFRCZPS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39178, 206}, + {I_VFRCZPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+39185, 206}, + {I_VFRCZPS, 1, {YMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39192, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFRCZSD[] = { + {I_VFRCZSD, 2, {XMM_L16,RM_XMM_L16|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+39199, 206}, + {I_VFRCZSD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39206, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFRCZSS[] = { + {I_VFRCZSS, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+39213, 206}, + {I_VFRCZSS, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39220, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMOV[] = { + {I_VPCMOV, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15328, 206}, + {I_VPCMOV, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15336, 206}, + {I_VPCMOV, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15344, 206}, + {I_VPCMOV, 3, {YMM_L16,RM_YMM_L16|BITS256,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15352, 206}, + {I_VPCMOV, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15360, 206}, + {I_VPCMOV, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15368, 206}, + {I_VPCMOV, 4, {YMM_L16,YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0}, NO_DECORATOR, nasm_bytecodes+15376, 206}, + {I_VPCMOV, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+15384, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMB[] = { + {I_VPCOMB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15392, 206}, + {I_VPCOMB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15400, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMD[] = { + {I_VPCOMD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15408, 206}, + {I_VPCOMD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15416, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMQ[] = { + {I_VPCOMQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15424, 206}, + {I_VPCOMQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15432, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMUB[] = { + {I_VPCOMUB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15440, 206}, + {I_VPCOMUB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15448, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMUD[] = { + {I_VPCOMUD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15456, 206}, + {I_VPCOMUD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15464, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMUQ[] = { + {I_VPCOMUQ, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15472, 206}, + {I_VPCOMUQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15480, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMUW[] = { + {I_VPCOMUW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15488, 206}, + {I_VPCOMUW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15496, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMW[] = { + {I_VPCOMW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+15504, 206}, + {I_VPCOMW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15512, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDBD[] = { + {I_VPHADDBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39227, 206}, + {I_VPHADDBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39234, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDBQ[] = { + {I_VPHADDBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39241, 206}, + {I_VPHADDBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39248, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDBW[] = { + {I_VPHADDBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39255, 206}, + {I_VPHADDBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39262, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDDQ[] = { + {I_VPHADDDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39269, 206}, + {I_VPHADDDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39276, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUBD[] = { + {I_VPHADDUBD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39283, 206}, + {I_VPHADDUBD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39290, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUBQ[] = { + {I_VPHADDUBQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39297, 206}, + {I_VPHADDUBQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39304, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUBW[] = { + {I_VPHADDUBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39311, 206}, + {I_VPHADDUBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39318, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUDQ[] = { + {I_VPHADDUDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39325, 206}, + {I_VPHADDUDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39332, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUWD[] = { + {I_VPHADDUWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39339, 206}, + {I_VPHADDUWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39346, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDUWQ[] = { + {I_VPHADDUWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39353, 206}, + {I_VPHADDUWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39360, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDWD[] = { + {I_VPHADDWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39367, 206}, + {I_VPHADDWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39374, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHADDWQ[] = { + {I_VPHADDWQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39381, 206}, + {I_VPHADDWQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39388, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBBW[] = { + {I_VPHSUBBW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39395, 206}, + {I_VPHSUBBW, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39402, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBDQ[] = { + {I_VPHSUBDQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39409, 206}, + {I_VPHSUBDQ, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39416, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPHSUBWD[] = { + {I_VPHSUBWD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39423, 206}, + {I_VPHSUBWD, 1, {XMM_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+39430, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSDD[] = { + {I_VPMACSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15520, 206}, + {I_VPMACSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15528, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSDQH[] = { + {I_VPMACSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15536, 206}, + {I_VPMACSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15544, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSDQL[] = { + {I_VPMACSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15552, 206}, + {I_VPMACSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15560, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSSDD[] = { + {I_VPMACSSDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15568, 206}, + {I_VPMACSSDD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15576, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSSDQH[] = { + {I_VPMACSSDQH, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15584, 206}, + {I_VPMACSSDQH, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15592, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSSDQL[] = { + {I_VPMACSSDQL, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15600, 206}, + {I_VPMACSSDQL, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15608, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSSWD[] = { + {I_VPMACSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15616, 206}, + {I_VPMACSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15624, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSSWW[] = { + {I_VPMACSSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15632, 206}, + {I_VPMACSSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15640, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSWD[] = { + {I_VPMACSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15648, 206}, + {I_VPMACSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15656, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMACSWW[] = { + {I_VPMACSWW, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15664, 206}, + {I_VPMACSWW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15672, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADCSSWD[] = { + {I_VPMADCSSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15680, 206}, + {I_VPMADCSSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15688, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADCSWD[] = { + {I_VPMADCSWD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15696, 206}, + {I_VPMADCSWD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15704, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPPERM[] = { + {I_VPPERM, 4, {XMM_L16,XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0}, NO_DECORATOR, nasm_bytecodes+15712, 206}, + {I_VPPERM, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+15720, 206}, + {I_VPPERM, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0}, NO_DECORATOR, nasm_bytecodes+15728, 206}, + {I_VPPERM, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+15736, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROTB[] = { + {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39437, 206}, + {I_VPROTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39444, 206}, + {I_VPROTB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39451, 206}, + {I_VPROTB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39458, 206}, + {I_VPROTB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15744, 206}, + {I_VPROTB, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15752, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROTD[] = { + {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39465, 206}, + {I_VPROTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39472, 206}, + {I_VPROTD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39479, 206}, + {I_VPROTD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39486, 206}, + {I_VPROTD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15760, 206}, + {I_VPROTD, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15768, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROTQ[] = { + {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39493, 206}, + {I_VPROTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39500, 206}, + {I_VPROTQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39507, 206}, + {I_VPROTQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39514, 206}, + {I_VPROTQ, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15776, 206}, + {I_VPROTQ, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15784, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROTW[] = { + {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39521, 206}, + {I_VPROTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39528, 206}, + {I_VPROTW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39535, 206}, + {I_VPROTW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39542, 206}, + {I_VPROTW, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15792, 206}, + {I_VPROTW, 2, {XMM_L16,IMMEDIATE|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+15800, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHAB[] = { + {I_VPSHAB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39549, 206}, + {I_VPSHAB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39556, 206}, + {I_VPSHAB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39563, 206}, + {I_VPSHAB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39570, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHAD[] = { + {I_VPSHAD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39577, 206}, + {I_VPSHAD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39584, 206}, + {I_VPSHAD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39591, 206}, + {I_VPSHAD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39598, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHAQ[] = { + {I_VPSHAQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39605, 206}, + {I_VPSHAQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39612, 206}, + {I_VPSHAQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39619, 206}, + {I_VPSHAQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39626, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHAW[] = { + {I_VPSHAW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39633, 206}, + {I_VPSHAW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39640, 206}, + {I_VPSHAW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39647, 206}, + {I_VPSHAW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39654, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLB[] = { + {I_VPSHLB, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39661, 206}, + {I_VPSHLB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39668, 206}, + {I_VPSHLB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39675, 206}, + {I_VPSHLB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39682, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLD[] = { + {I_VPSHLD, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39689, 206}, + {I_VPSHLD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39696, 206}, + {I_VPSHLD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39703, 206}, + {I_VPSHLD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39710, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLQ[] = { + {I_VPSHLQ, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39717, 206}, + {I_VPSHLQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39724, 206}, + {I_VPSHLQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39731, 206}, + {I_VPSHLQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39738, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLW[] = { + {I_VPSHLW, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+39745, 206}, + {I_VPSHLW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+39752, 206}, + {I_VPSHLW, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+39759, 206}, + {I_VPSHLW, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+39766, 206}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI128[] = { + {I_VBROADCASTI128, 2, {YMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41040, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDD[] = { + {I_VPBLENDD, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16056, 207}, + {I_VPBLENDD, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16064, 207}, + {I_VPBLENDD, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16072, 207}, + {I_VPBLENDD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16080, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTB[] = { + {I_VPBROADCASTB, 2, {XMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41047, 207}, + {I_VPBROADCASTB, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41047, 207}, + {I_VPBROADCASTB, 2, {YMM_L16,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+41054, 207}, + {I_VPBROADCASTB, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41054, 207}, + {I_VPBROADCASTB, 2, {XMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21792, 244}, + {I_VPBROADCASTB, 2, {YMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21800, 244}, + {I_VPBROADCASTB, 2, {ZMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21808, 245}, + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 244}, + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 244}, + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 244}, + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21816, 244}, + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 244}, + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 244}, + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 244}, + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21824, 244}, + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 245}, + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 245}, + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 245}, + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21832, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTW[] = { + {I_VPBROADCASTW, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41061, 207}, + {I_VPBROADCASTW, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41061, 207}, + {I_VPBROADCASTW, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41068, 207}, + {I_VPBROADCASTW, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41068, 207}, + {I_VPBROADCASTW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22032, 244}, + {I_VPBROADCASTW, 2, {YMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22040, 244}, + {I_VPBROADCASTW, 2, {ZMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22048, 245}, + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22056, 244}, + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22056, 244}, + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22056, 244}, + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 244}, + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 244}, + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22064, 244}, + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 245}, + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 245}, + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22072, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTD[] = { + {I_VPBROADCASTD, 2, {XMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41075, 207}, + {I_VPBROADCASTD, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41075, 207}, + {I_VPBROADCASTD, 2, {YMM_L16,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41082, 207}, + {I_VPBROADCASTD, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41082, 207}, + {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21840, 240}, + {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21848, 240}, + {I_VPBROADCASTD, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21856, 241}, + {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21864, 240}, + {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21872, 240}, + {I_VPBROADCASTD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21880, 241}, + {I_VPBROADCASTD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21888, 240}, + {I_VPBROADCASTD, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21896, 240}, + {I_VPBROADCASTD, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTQ[] = { + {I_VPBROADCASTQ, 2, {XMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41089, 207}, + {I_VPBROADCASTQ, 2, {XMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41089, 207}, + {I_VPBROADCASTQ, 2, {YMM_L16,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41096, 207}, + {I_VPBROADCASTQ, 2, {YMM_L16,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41096, 207}, + {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21960, 240}, + {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21968, 240}, + {I_VPBROADCASTQ, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21976, 241}, + {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21984, 240}, + {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21992, 240}, + {I_VPBROADCASTQ, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22000, 241}, + {I_VPBROADCASTQ, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22008, 240}, + {I_VPBROADCASTQ, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22016, 240}, + {I_VPBROADCASTQ, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22024, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMD[] = { + {I_VPERMD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41103, 207}, + {I_VPERMD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41110, 207}, + {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22464, 240}, + {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22472, 240}, + {I_VPERMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22480, 241}, + {I_VPERMD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22488, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMPD[] = { + {I_VPERMPD, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16088, 207}, + {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9514, 240}, + {I_VPERMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9523, 241}, + {I_VPERMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22736, 240}, + {I_VPERMPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22744, 240}, + {I_VPERMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22752, 241}, + {I_VPERMPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22760, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMPS[] = { + {I_VPERMPS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41117, 207}, + {I_VPERMPS, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41124, 207}, + {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22768, 240}, + {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22776, 240}, + {I_VPERMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22784, 241}, + {I_VPERMPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22792, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMQ[] = { + {I_VPERMQ, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16096, 207}, + {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9532, 240}, + {I_VPERMQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9541, 241}, + {I_VPERMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22800, 240}, + {I_VPERMQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22808, 240}, + {I_VPERMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22816, 241}, + {I_VPERMQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22824, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERM2I128[] = { + {I_VPERM2I128, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16104, 207}, + {I_VPERM2I128, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16112, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTI128[] = { + {I_VEXTRACTI128, 3, {RM_XMM_L16|BITS128,YMM_L16,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16120, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTI128[] = { + {I_VINSERTI128, 4, {YMM_L16,YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+16128, 207}, + {I_VINSERTI128, 3, {YMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16136, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMASKMOVD[] = { + {I_VPMASKMOVD, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41131, 207}, + {I_VPMASKMOVD, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41138, 207}, + {I_VPMASKMOVD, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41145, 207}, + {I_VPMASKMOVD, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41152, 207}, + {I_VPMASKMOVD, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41187, 207}, + {I_VPMASKMOVD, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41194, 207}, + {I_VPMASKMOVD, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41201, 207}, + {I_VPMASKMOVD, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41208, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMASKMOVQ[] = { + {I_VPMASKMOVQ, 3, {XMM_L16,XMM_L16,MEMORY|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41159, 207}, + {I_VPMASKMOVQ, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41166, 207}, + {I_VPMASKMOVQ, 3, {YMM_L16,YMM_L16,MEMORY|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41173, 207}, + {I_VPMASKMOVQ, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41180, 207}, + {I_VPMASKMOVQ, 3, {MEMORY|BITS128,XMM_L16,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41215, 207}, + {I_VPMASKMOVQ, 2, {MEMORY|BITS128,XMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41222, 207}, + {I_VPMASKMOVQ, 3, {MEMORY|BITS256,YMM_L16,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+41229, 207}, + {I_VPMASKMOVQ, 2, {MEMORY|BITS256,YMM_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41236, 207}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLVD[] = { + {I_VPSLLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41243, 207}, + {I_VPSLLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41250, 207}, + {I_VPSLLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41271, 207}, + {I_VPSLLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41278, 207}, + {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26288, 240}, + {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26296, 240}, + {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26304, 240}, + {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26312, 240}, + {I_VPSLLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26320, 241}, + {I_VPSLLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26328, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLVQ[] = { + {I_VPSLLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41257, 207}, + {I_VPSLLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41264, 207}, + {I_VPSLLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41285, 207}, + {I_VPSLLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41292, 207}, + {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26336, 240}, + {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26344, 240}, + {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26352, 240}, + {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26360, 240}, + {I_VPSLLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26368, 241}, + {I_VPSLLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26376, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAVD[] = { + {I_VPSRAVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41299, 207}, + {I_VPSRAVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41306, 207}, + {I_VPSRAVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41313, 207}, + {I_VPSRAVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41320, 207}, + {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26576, 240}, + {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26584, 240}, + {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26592, 240}, + {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26600, 240}, + {I_VPSRAVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26608, 241}, + {I_VPSRAVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26616, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLVD[] = { + {I_VPSRLVD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41327, 207}, + {I_VPSRLVD, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41334, 207}, + {I_VPSRLVD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41355, 207}, + {I_VPSRLVD, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41362, 207}, + {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26864, 240}, + {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26872, 240}, + {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26880, 240}, + {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26888, 240}, + {I_VPSRLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26896, 241}, + {I_VPSRLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLVQ[] = { + {I_VPSRLVQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41341, 207}, + {I_VPSRLVQ, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41348, 207}, + {I_VPSRLVQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41369, 207}, + {I_VPSRLVQ, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41376, 207}, + {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26912, 240}, + {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26920, 240}, + {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26928, 240}, + {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26936, 240}, + {I_VPSRLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26944, 241}, + {I_VPSRLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26952, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERDPD[] = { + {I_VGATHERDPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16144, 207}, + {I_VGATHERDPD, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16160, 207}, + {I_VGATHERDPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8704, 240}, + {I_VGATHERDPD, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8713, 240}, + {I_VGATHERDPD, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8722, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERQPD[] = { + {I_VGATHERQPD, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16152, 207}, + {I_VGATHERQPD, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16168, 207}, + {I_VGATHERQPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8830, 240}, + {I_VGATHERQPD, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8839, 240}, + {I_VGATHERQPD, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8848, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERDPS[] = { + {I_VGATHERDPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16176, 207}, + {I_VGATHERDPS, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16192, 207}, + {I_VGATHERDPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8731, 240}, + {I_VGATHERDPS, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8740, 240}, + {I_VGATHERDPS, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8749, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERQPS[] = { + {I_VGATHERQPS, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16184, 207}, + {I_VGATHERQPS, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16200, 207}, + {I_VGATHERQPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8857, 240}, + {I_VGATHERQPS, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8866, 240}, + {I_VGATHERQPS, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8875, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPGATHERDD[] = { + {I_VPGATHERDD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16208, 207}, + {I_VPGATHERDD, 3, {YMM_L16,YMEM|BITS32,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16224, 207}, + {I_VPGATHERDD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9595, 240}, + {I_VPGATHERDD, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9604, 240}, + {I_VPGATHERDD, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9613, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPGATHERQD[] = { + {I_VPGATHERQD, 3, {XMM_L16,XMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16216, 207}, + {I_VPGATHERQD, 3, {XMM_L16,YMEM|BITS32,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16232, 207}, + {I_VPGATHERQD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9649, 240}, + {I_VPGATHERQD, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9658, 240}, + {I_VPGATHERQD, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9667, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPGATHERDQ[] = { + {I_VPGATHERDQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16240, 207}, + {I_VPGATHERDQ, 3, {YMM_L16,XMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16256, 207}, + {I_VPGATHERDQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9622, 240}, + {I_VPGATHERDQ, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9631, 240}, + {I_VPGATHERDQ, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9640, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPGATHERQQ[] = { + {I_VPGATHERQQ, 3, {XMM_L16,XMEM|BITS64,XMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16248, 207}, + {I_VPGATHERQQ, 3, {YMM_L16,YMEM|BITS64,YMM_L16,0,0}, NO_DECORATOR, nasm_bytecodes+16264, 207}, + {I_VPGATHERQQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9676, 240}, + {I_VPGATHERQQ, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9685, 240}, + {I_VPGATHERQQ, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9694, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XABORT[] = { + {I_XABORT, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49162, 208}, + {I_XABORT, 1, {IMMEDIATE|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49162, 208}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XBEGIN[] = { + {I_XBEGIN, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45855, 208}, + {I_XBEGIN, 1, {IMMEDIATE|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45855, 208}, + {I_XBEGIN, 1, {IMMEDIATE|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45861, 209}, + {I_XBEGIN, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45861, 209}, + {I_XBEGIN, 1, {IMMEDIATE|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45867, 209}, + {I_XBEGIN, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45867, 209}, + {I_XBEGIN, 1, {IMMEDIATE|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45873, 210}, + {I_XBEGIN, 1, {IMMEDIATE|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45873, 210}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XEND[] = { + {I_XEND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49167, 208}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XTEST[] = { + {I_XTEST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49172, 211}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ANDN[] = { + {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41383, 212}, + {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41390, 213}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BEXTR[] = { + {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41397, 212}, + {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41404, 213}, + {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16272, 214}, + {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16280, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLCI[] = { + {I_BLCI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41411, 214}, + {I_BLCI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41418, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLCIC[] = { + {I_BLCIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41425, 214}, + {I_BLCIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41432, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLSI[] = { + {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41439, 212}, + {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41446, 213}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLSIC[] = { + {I_BLSIC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41453, 214}, + {I_BLSIC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41460, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLCFILL[] = { + {I_BLCFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41467, 214}, + {I_BLCFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41474, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLSFILL[] = { + {I_BLSFILL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41481, 214}, + {I_BLSFILL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41488, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLCMSK[] = { + {I_BLCMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41495, 214}, + {I_BLCMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41502, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLSMSK[] = { + {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41509, 212}, + {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41516, 213}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLSR[] = { + {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41523, 212}, + {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41530, 213}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BLCS[] = { + {I_BLCS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41537, 214}, + {I_BLCS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41544, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BZHI[] = { + {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41551, 216}, + {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41558, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MULX[] = { + {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41565, 216}, + {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41572, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PDEP[] = { + {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41579, 216}, + {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41586, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PEXT[] = { + {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41593, 216}, + {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41600, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RORX[] = { + {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16288, 216}, + {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16296, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SARX[] = { + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41607, 216}, + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41614, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHLX[] = { + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41621, 216}, + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41628, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHRX[] = { + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+41635, 216}, + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+41642, 217}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TZCNT[] = { + {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41649, 218}, + {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41656, 218}, + {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41663, 219}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TZMSK[] = { + {I_TZMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41670, 214}, + {I_TZMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41677, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_T1MSKC[] = { + {I_T1MSKC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41684, 214}, + {I_T1MSKC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41691, 215}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PREFETCHWT1[] = { + {I_PREFETCHWT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49177, 220}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDMK[] = { + {I_BNDMK, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45879, 221}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDCL[] = { + {I_BNDCL, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41699, 222}, + {I_BNDCL, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41699, 223}, + {I_BNDCL, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41698, 224}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDCU[] = { + {I_BNDCU, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41706, 222}, + {I_BNDCU, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41706, 223}, + {I_BNDCU, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41705, 224}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDCN[] = { + {I_BNDCN, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+41713, 222}, + {I_BNDCN, 2, {BNDREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+41713, 223}, + {I_BNDCN, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+41712, 224}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDMOV[] = { + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45885, 222}, + {I_BNDMOV, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45885, 222}, + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45891, 222}, + {I_BNDMOV, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45891, 222}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDLDX[] = { + {I_BNDLDX, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45886, 221}, + {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45897, 225}, + {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+45897, 226}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_BNDSTX[] = { + {I_BNDSTX, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45892, 221}, + {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS32,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+45903, 225}, + {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS64,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+45903, 226}, + {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45909, 225}, + {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+45909, 226}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA1MSG1[] = { + {I_SHA1MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45915, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA1MSG2[] = { + {I_SHA1MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45921, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA1NEXTE[] = { + {I_SHA1NEXTE, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45927, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA1RNDS4[] = { + {I_SHA1RNDS4, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+41719, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA256MSG1[] = { + {I_SHA256MSG1, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45933, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA256MSG2[] = { + {I_SHA256MSG2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45939, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SHA256RNDS2[] = { + {I_SHA256RNDS2, 3, {XMM_L16,RM_XMM_L16|BITS128,XMM0,0,0}, NO_DECORATOR, nasm_bytecodes+45945, 227}, + {I_SHA256RNDS2, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+45945, 227}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBCSTNEBF16PS[] = { + {I_VBCSTNEBF16PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41726, 228}, + {I_VBCSTNEBF16PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41733, 228}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBCSTNESH2PS[] = { + {I_VBCSTNESH2PS, 2, {XMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41740, 228}, + {I_VBCSTNESH2PS, 2, {YMM_L16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+41747, 228}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNEEBF162PS[] = { + {I_VCVTNEEBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41754, 229}, + {I_VCVTNEEBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41761, 230}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNEEPH2PS[] = { + {I_VCVTNEEPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41768, 229}, + {I_VCVTNEEPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41775, 230}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNEOBF162PS[] = { + {I_VCVTNEOBF162PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41782, 229}, + {I_VCVTNEOBF162PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41789, 230}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNEOPH2PS[] = { + {I_VCVTNEOPH2PS, 2, {XMM_L16,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41796, 229}, + {I_VCVTNEOPH2PS, 2, {YMM_L16,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41803, 230}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNEPS2BF16[] = { + {I_VCVTNEPS2BF16, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41810, 229}, + {I_VCVTNEPS2BF16, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41817, 230}, + {I_VCVTNEPS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30064, 289}, + {I_VCVTNEPS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30072, 289}, + {I_VCVTNEPS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30080, 289}, + {I_VCVTNEPS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30088, 289}, + {I_VCVTNEPS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30096, 289}, + {I_VCVTNEPS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30104, 289}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBSSD[] = { + {I_VPDPBSSD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41824, 231}, + {I_VPDPBSSD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41831, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBSSDS[] = { + {I_VPDPBSSDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41838, 231}, + {I_VPDPBSSDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41845, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBSUD[] = { + {I_VPDPBSUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41852, 231}, + {I_VPDPBSUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41859, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBSUDS[] = { + {I_VPDPBSUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41866, 231}, + {I_VPDPBSUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41873, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBUUD[] = { + {I_VPDPBUUD, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41880, 231}, + {I_VPDPBUUD, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41887, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBUUDS[] = { + {I_VPDPBUUDS, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41894, 231}, + {I_VPDPBUUDS, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41901, 232}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD52HUQ[] = { + {I_VPMADD52HUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41908, 233}, + {I_VPMADD52HUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41915, 234}, + {I_VPMADD52HUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23120, 252}, + {I_VPMADD52HUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23128, 252}, + {I_VPMADD52HUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23136, 253}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD52LUQ[] = { + {I_VPMADD52LUQ, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41922, 233}, + {I_VPMADD52LUQ, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41929, 234}, + {I_VPMADD52LUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23144, 252}, + {I_VPMADD52LUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23152, 252}, + {I_VPMADD52LUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23160, 253}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KADDB[] = { + {I_KADDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41936, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KADDD[] = { + {I_KADDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41943, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KADDQ[] = { + {I_KADDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41950, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KADDW[] = { + {I_KADDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41957, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDB[] = { + {I_KANDB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41964, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDD[] = { + {I_KANDD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41971, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDNB[] = { + {I_KANDNB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41978, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDND[] = { + {I_KANDND, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41985, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDNQ[] = { + {I_KANDNQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41992, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDNW[] = { + {I_KANDNW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41999, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDQ[] = { + {I_KANDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42006, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDW[] = { + {I_KANDW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42013, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KMOVB[] = { + {I_KMOVB, 2, {KREG,RM_K|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42020, 235}, + {I_KMOVB, 2, {MEMORY|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42027, 235}, + {I_KMOVB, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42034, 235}, + {I_KMOVB, 2, {KREG,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+16304, 235}, + {I_KMOVB, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42041, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KMOVD[] = { + {I_KMOVD, 2, {KREG,RM_K|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42048, 235}, + {I_KMOVD, 2, {MEMORY|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42055, 235}, + {I_KMOVD, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42062, 235}, + {I_KMOVD, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42069, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KMOVQ[] = { + {I_KMOVQ, 2, {KREG,RM_K|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42076, 235}, + {I_KMOVQ, 2, {MEMORY|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42083, 235}, + {I_KMOVQ, 2, {KREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42090, 235}, + {I_KMOVQ, 2, {REG_GPR|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42097, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KMOVW[] = { + {I_KMOVW, 2, {KREG,RM_K|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42104, 235}, + {I_KMOVW, 2, {MEMORY|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42111, 235}, + {I_KMOVW, 2, {KREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42118, 235}, + {I_KMOVW, 2, {KREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42118, 235}, + {I_KMOVW, 2, {REG_GPR|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42125, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KNOTB[] = { + {I_KNOTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42132, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KNOTD[] = { + {I_KNOTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42139, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KNOTQ[] = { + {I_KNOTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42146, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KNOTW[] = { + {I_KNOTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42153, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORB[] = { + {I_KORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42160, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORD[] = { + {I_KORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42167, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORQ[] = { + {I_KORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42174, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORW[] = { + {I_KORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42181, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORTESTB[] = { + {I_KORTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42188, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORTESTD[] = { + {I_KORTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42195, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORTESTQ[] = { + {I_KORTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42202, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORTESTW[] = { + {I_KORTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42209, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTLB[] = { + {I_KSHIFTLB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16312, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTLD[] = { + {I_KSHIFTLD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16320, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTLQ[] = { + {I_KSHIFTLQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16328, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTLW[] = { + {I_KSHIFTLW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16336, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTRB[] = { + {I_KSHIFTRB, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16344, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTRD[] = { + {I_KSHIFTRD, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16352, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTRQ[] = { + {I_KSHIFTRQ, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16360, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTRW[] = { + {I_KSHIFTRW, 3, {KREG,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16368, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KTESTB[] = { + {I_KTESTB, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42216, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KTESTD[] = { + {I_KTESTD, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42223, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KTESTQ[] = { + {I_KTESTQ, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42230, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KTESTW[] = { + {I_KTESTW, 2, {KREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42237, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KUNPCKBW[] = { + {I_KUNPCKBW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42244, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KUNPCKDQ[] = { + {I_KUNPCKDQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42251, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KUNPCKWD[] = { + {I_KUNPCKWD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42258, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXNORB[] = { + {I_KXNORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42265, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXNORD[] = { + {I_KXNORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42272, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXNORQ[] = { + {I_KXNORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42279, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXNORW[] = { + {I_KXNORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42286, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXORB[] = { + {I_KXORB, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42293, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXORD[] = { + {I_KXORD, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42300, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXORQ[] = { + {I_KXORQ, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42307, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXORW[] = { + {I_KXORW, 3, {KREG,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42314, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KADD[] = { + {I_KADD, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41936, 236}, + {I_KADD, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41943, 236}, + {I_KADD, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41950, 236}, + {I_KADD, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41957, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KAND[] = { + {I_KAND, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41964, 236}, + {I_KAND, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41971, 236}, + {I_KAND, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42006, 236}, + {I_KAND, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42013, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KANDN[] = { + {I_KANDN, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41978, 236}, + {I_KANDN, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41985, 236}, + {I_KANDN, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41992, 236}, + {I_KANDN, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+41999, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KMOV[] = { + {I_KMOV, 2, {KREG|BITS8,RM_K|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42020, 236}, + {I_KMOV, 2, {MEMORY|BITS8,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42027, 237}, + {I_KMOV, 2, {KREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42034, 238}, + {I_KMOV, 2, {KREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42034, 236}, + {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42041, 238}, + {I_KMOV, 2, {KREG|BITS32,RM_K|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42048, 236}, + {I_KMOV, 2, {MEMORY|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42055, 236}, + {I_KMOV, 2, {KREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42062, 236}, + {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42069, 236}, + {I_KMOV, 2, {KREG|BITS64,RM_K|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42076, 236}, + {I_KMOV, 2, {MEMORY|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42083, 236}, + {I_KMOV, 2, {KREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42090, 236}, + {I_KMOV, 2, {REG_GPR|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42097, 236}, + {I_KMOV, 2, {KREG|BITS16,RM_K|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42104, 236}, + {I_KMOV, 2, {MEMORY|BITS16,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42111, 236}, + {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42118, 238}, + {I_KMOV, 2, {REG_GPR|BITS32,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42125, 238}, + {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42118, 238}, + {I_KMOV, 2, {KREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42118, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KNOT[] = { + {I_KNOT, 2, {KREG|BITS8,KREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+42132, 236}, + {I_KNOT, 2, {KREG|BITS32,KREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42139, 236}, + {I_KNOT, 2, {KREG|BITS64,KREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42146, 236}, + {I_KNOT, 2, {KREG|BITS16,KREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+42153, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KOR[] = { + {I_KOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42160, 236}, + {I_KOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42167, 236}, + {I_KOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42174, 236}, + {I_KOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42181, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KORTEST[] = { + {I_KORTEST, 2, {KREG|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42188, 236}, + {I_KORTEST, 2, {KREG|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42195, 236}, + {I_KORTEST, 2, {KREG|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42202, 236}, + {I_KORTEST, 2, {KREG|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42209, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTL[] = { + {I_KSHIFTL, 3, {KREG|BITS8,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16312, 239}, + {I_KSHIFTL, 3, {KREG|BITS32,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16320, 239}, + {I_KSHIFTL, 3, {KREG|BITS64,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16328, 239}, + {I_KSHIFTL, 3, {KREG|BITS16,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16336, 239}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KSHIFTR[] = { + {I_KSHIFTR, 3, {KREG|BITS8,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16344, 239}, + {I_KSHIFTR, 3, {KREG|BITS32,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16352, 239}, + {I_KSHIFTR, 3, {KREG|BITS64,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16360, 239}, + {I_KSHIFTR, 3, {KREG|BITS16,KREG,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+16368, 239}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KTEST[] = { + {I_KTEST, 2, {KREG|BITS8,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42216, 236}, + {I_KTEST, 2, {KREG|BITS32,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42223, 236}, + {I_KTEST, 2, {KREG|BITS64,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42230, 236}, + {I_KTEST, 2, {KREG|BITS16,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42237, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KUNPCK[] = { + {I_KUNPCK, 3, {KREG|BITS16,KREG|BITS8,KREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+42244, 235}, + {I_KUNPCK, 3, {KREG|BITS64,KREG|BITS32,KREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42251, 235}, + {I_KUNPCK, 3, {KREG|BITS32,KREG|BITS16,KREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+42258, 235}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXNOR[] = { + {I_KXNOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42265, 236}, + {I_KXNOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42272, 236}, + {I_KXNOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42279, 236}, + {I_KXNOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42286, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_KXOR[] = { + {I_KXOR, 3, {KREG|BITS8,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42293, 236}, + {I_KXOR, 3, {KREG|BITS32,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42300, 236}, + {I_KXOR, 3, {KREG|BITS64,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42307, 236}, + {I_KXOR, 3, {KREG|BITS16,KREG,KREG,0,0}, NO_DECORATOR, nasm_bytecodes+42314, 236}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VALIGND[] = { + {I_VALIGND, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8002, 240}, + {I_VALIGND, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8011, 240}, + {I_VALIGND, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8020, 240}, + {I_VALIGND, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8029, 240}, + {I_VALIGND, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8038, 241}, + {I_VALIGND, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8047, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VALIGNQ[] = { + {I_VALIGNQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8056, 240}, + {I_VALIGNQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8065, 240}, + {I_VALIGNQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8074, 240}, + {I_VALIGNQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8083, 240}, + {I_VALIGNQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8092, 241}, + {I_VALIGNQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8101, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDMPD[] = { + {I_VBLENDMPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16696, 240}, + {I_VBLENDMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16704, 240}, + {I_VBLENDMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+16712, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBLENDMPS[] = { + {I_VBLENDMPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16720, 240}, + {I_VBLENDMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16728, 240}, + {I_VBLENDMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+16736, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF32X2[] = { + {I_VBROADCASTF32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16744, 242}, + {I_VBROADCASTF32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16752, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF32X4[] = { + {I_VBROADCASTF32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16760, 240}, + {I_VBROADCASTF32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16768, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF32X8[] = { + {I_VBROADCASTF32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16776, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF64X2[] = { + {I_VBROADCASTF64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16784, 242}, + {I_VBROADCASTF64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16792, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTF64X4[] = { + {I_VBROADCASTF64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16800, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI32X2[] = { + {I_VBROADCASTI32X2, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16808, 242}, + {I_VBROADCASTI32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16816, 242}, + {I_VBROADCASTI32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16824, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI32X4[] = { + {I_VBROADCASTI32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16832, 240}, + {I_VBROADCASTI32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16840, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI32X8[] = { + {I_VBROADCASTI32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16848, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI64X2[] = { + {I_VBROADCASTI64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16856, 242}, + {I_VBROADCASTI64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16864, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VBROADCASTI64X4[] = { + {I_VBROADCASTI64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+16872, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OQPD[] = { + {I_VCMPEQ_OQPD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+240, 240}, + {I_VCMPEQ_OQPD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+250, 240}, + {I_VCMPEQ_OQPD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+260, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OQPS[] = { + {I_VCMPEQ_OQPS, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+270, 240}, + {I_VCMPEQ_OQPS, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+280, 240}, + {I_VCMPEQ_OQPS, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+290, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OQSD[] = { + {I_VCMPEQ_OQSD, 3, {KREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+300, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPEQ_OQSS[] = { + {I_VCMPEQ_OQSS, 3, {KREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+310, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCOMPRESSPD[] = { + {I_VCOMPRESSPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16976, 240}, + {I_VCOMPRESSPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16984, 240}, + {I_VCOMPRESSPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+16992, 241}, + {I_VCOMPRESSPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17000, 240}, + {I_VCOMPRESSPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17008, 240}, + {I_VCOMPRESSPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17016, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCOMPRESSPS[] = { + {I_VCOMPRESSPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17024, 240}, + {I_VCOMPRESSPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17032, 240}, + {I_VCOMPRESSPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+17040, 241}, + {I_VCOMPRESSPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17048, 240}, + {I_VCOMPRESSPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17056, 240}, + {I_VCOMPRESSPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+17064, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2QQ[] = { + {I_VCVTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17168, 242}, + {I_VCVTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17176, 242}, + {I_VCVTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17184, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2UDQ[] = { + {I_VCVTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17192, 240}, + {I_VCVTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17200, 240}, + {I_VCVTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17208, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2UQQ[] = { + {I_VCVTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17216, 242}, + {I_VCVTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17224, 242}, + {I_VCVTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17232, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2QQ[] = { + {I_VCVTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17312, 242}, + {I_VCVTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17320, 242}, + {I_VCVTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17328, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2UDQ[] = { + {I_VCVTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17336, 240}, + {I_VCVTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17344, 240}, + {I_VCVTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17352, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPS2UQQ[] = { + {I_VCVTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17360, 242}, + {I_VCVTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17368, 242}, + {I_VCVTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17376, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTQQ2PD[] = { + {I_VCVTQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17384, 242}, + {I_VCVTQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17392, 242}, + {I_VCVTQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17400, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTQQ2PS[] = { + {I_VCVTQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17408, 242}, + {I_VCVTQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17416, 242}, + {I_VCVTQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17424, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSD2USI[] = { + {I_VCVTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17456, 241}, + {I_VCVTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17464, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSS2USI[] = { + {I_VCVTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17528, 241}, + {I_VCVTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17536, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPD2QQ[] = { + {I_VCVTTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17568, 242}, + {I_VCVTTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17576, 242}, + {I_VCVTTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17584, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPD2UDQ[] = { + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17592, 240}, + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17600, 240}, + {I_VCVTTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17608, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPD2UQQ[] = { + {I_VCVTTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17616, 242}, + {I_VCVTTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17624, 242}, + {I_VCVTTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+17632, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPS2QQ[] = { + {I_VCVTTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17664, 242}, + {I_VCVTTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17672, 242}, + {I_VCVTTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17680, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPS2UDQ[] = { + {I_VCVTTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17688, 240}, + {I_VCVTTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17696, 240}, + {I_VCVTTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17704, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPS2UQQ[] = { + {I_VCVTTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17712, 242}, + {I_VCVTTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17720, 242}, + {I_VCVTTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+17728, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSD2USI[] = { + {I_VCVTTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17752, 241}, + {I_VCVTTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17760, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSS2USI[] = { + {I_VCVTTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17784, 241}, + {I_VCVTTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+17792, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUDQ2PD[] = { + {I_VCVTUDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17800, 240}, + {I_VCVTUDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17808, 240}, + {I_VCVTUDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17816, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUDQ2PS[] = { + {I_VCVTUDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17824, 240}, + {I_VCVTUDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+17832, 240}, + {I_VCVTUDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+17840, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUQQ2PD[] = { + {I_VCVTUQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17848, 242}, + {I_VCVTUQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17856, 242}, + {I_VCVTUQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17864, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUQQ2PS[] = { + {I_VCVTUQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17872, 242}, + {I_VCVTUQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+17880, 242}, + {I_VCVTUQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+17888, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUSI2SD[] = { + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17896, 241}, + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17904, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUSI2SS[] = { + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17912, 241}, + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,0,0,0}, nasm_bytecodes+17920, 241}, + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30912, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDBPSADBW[] = { + {I_VDBPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8209, 244}, + {I_VDBPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8218, 244}, + {I_VDBPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8227, 244}, + {I_VDBPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8236, 244}, + {I_VDBPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8245, 245}, + {I_VDBPSADBW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8254, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXP2PD[] = { + {I_VEXP2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+18056, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXP2PS[] = { + {I_VEXP2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+18064, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXPANDPD[] = { + {I_VEXPANDPD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18072, 240}, + {I_VEXPANDPD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 240}, + {I_VEXPANDPD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 241}, + {I_VEXPANDPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18072, 240}, + {I_VEXPANDPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18080, 240}, + {I_VEXPANDPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18088, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXPANDPS[] = { + {I_VEXPANDPS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 240}, + {I_VEXPANDPS, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 240}, + {I_VEXPANDPS, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 241}, + {I_VEXPANDPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18096, 240}, + {I_VEXPANDPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18104, 240}, + {I_VEXPANDPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18112, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTF32X4[] = { + {I_VEXTRACTF32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8263, 240}, + {I_VEXTRACTF32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8272, 241}, + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8281, 240}, + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8290, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTF32X8[] = { + {I_VEXTRACTF32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8299, 243}, + {I_VEXTRACTF32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8308, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTF64X2[] = { + {I_VEXTRACTF64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8317, 242}, + {I_VEXTRACTF64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8326, 243}, + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8335, 242}, + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8344, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTF64X4[] = { + {I_VEXTRACTF64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8353, 241}, + {I_VEXTRACTF64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTI32X4[] = { + {I_VEXTRACTI32X4, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8371, 240}, + {I_VEXTRACTI32X4, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8380, 241}, + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8389, 240}, + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8398, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTI32X8[] = { + {I_VEXTRACTI32X8, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8407, 243}, + {I_VEXTRACTI32X8, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8416, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTI64X2[] = { + {I_VEXTRACTI64X2, 3, {XMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8425, 242}, + {I_VEXTRACTI64X2, 3, {XMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8434, 243}, + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8443, 242}, + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8452, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VEXTRACTI64X4[] = { + {I_VEXTRACTI64X4, 3, {YMMREG,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8461, 241}, + {I_VEXTRACTI64X4, 3, {MEMORY|BITS256,ZMMREG,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8470, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFIXUPIMMPD[] = { + {I_VFIXUPIMMPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8488, 240}, + {I_VFIXUPIMMPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8497, 240}, + {I_VFIXUPIMMPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+8506, 240}, + {I_VFIXUPIMMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8515, 240}, + {I_VFIXUPIMMPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+8524, 241}, + {I_VFIXUPIMMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8533, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFIXUPIMMPS[] = { + {I_VFIXUPIMMPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8542, 240}, + {I_VFIXUPIMMPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8551, 240}, + {I_VFIXUPIMMPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+8560, 240}, + {I_VFIXUPIMMPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8569, 240}, + {I_VFIXUPIMMPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+8578, 241}, + {I_VFIXUPIMMPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8587, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFIXUPIMMSD[] = { + {I_VFIXUPIMMSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8596, 241}, + {I_VFIXUPIMMSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8605, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFIXUPIMMSS[] = { + {I_VFIXUPIMMSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8614, 241}, + {I_VFIXUPIMMSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+8623, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSPD[] = { + {I_VFPCLASSPD, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8632, 242}, + {I_VFPCLASSPD, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8641, 242}, + {I_VFPCLASSPD, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+8650, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSPS[] = { + {I_VFPCLASSPS, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8659, 242}, + {I_VFPCLASSPS, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8668, 242}, + {I_VFPCLASSPS, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+8677, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSSD[] = { + {I_VFPCLASSSD, 3, {KREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8686, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSSS[] = { + {I_VFPCLASSSS, 3, {KREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8695, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF0DPD[] = { + {I_VGATHERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8758, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF0DPS[] = { + {I_VGATHERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8767, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF0QPD[] = { + {I_VGATHERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8776, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF0QPS[] = { + {I_VGATHERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8785, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF1DPD[] = { + {I_VGATHERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8794, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF1DPS[] = { + {I_VGATHERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8803, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF1QPD[] = { + {I_VGATHERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8812, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGATHERPF1QPS[] = { + {I_VGATHERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8821, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPPD[] = { + {I_VGETEXPPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19176, 240}, + {I_VGETEXPPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19184, 240}, + {I_VGETEXPPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19192, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPPS[] = { + {I_VGETEXPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19200, 240}, + {I_VGETEXPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19208, 240}, + {I_VGETEXPPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19216, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPSD[] = { + {I_VGETEXPSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19224, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPSS[] = { + {I_VGETEXPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19232, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTPD[] = { + {I_VGETMANTPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8884, 240}, + {I_VGETMANTPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+8893, 240}, + {I_VGETMANTPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+8902, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTPS[] = { + {I_VGETMANTPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8911, 240}, + {I_VGETMANTPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+8920, 240}, + {I_VGETMANTPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+8929, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTSD[] = { + {I_VGETMANTSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8938, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTSS[] = { + {I_VGETMANTSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+8947, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTF32X4[] = { + {I_VINSERTF32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8956, 240}, + {I_VINSERTF32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8965, 240}, + {I_VINSERTF32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8974, 241}, + {I_VINSERTF32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8983, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTF32X8[] = { + {I_VINSERTF32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+8992, 243}, + {I_VINSERTF32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9001, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTF64X2[] = { + {I_VINSERTF64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9010, 242}, + {I_VINSERTF64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9019, 242}, + {I_VINSERTF64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9028, 243}, + {I_VINSERTF64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9037, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTF64X4[] = { + {I_VINSERTF64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9046, 241}, + {I_VINSERTF64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9055, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTI32X4[] = { + {I_VINSERTI32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9064, 240}, + {I_VINSERTI32X4, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9073, 240}, + {I_VINSERTI32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9082, 241}, + {I_VINSERTI32X4, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9091, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTI32X8[] = { + {I_VINSERTI32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9100, 243}, + {I_VINSERTI32X8, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9109, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTI64X2[] = { + {I_VINSERTI64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9118, 242}, + {I_VINSERTI64X2, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9127, 242}, + {I_VINSERTI64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9136, 243}, + {I_VINSERTI64X2, 3, {ZMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9145, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VINSERTI64X4[] = { + {I_VINSERTI64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9154, 241}, + {I_VINSERTI64X4, 3, {ZMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9163, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQA32[] = { + {I_VMOVDQA32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19680, 240}, + {I_VMOVDQA32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19688, 240}, + {I_VMOVDQA32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19696, 241}, + {I_VMOVDQA32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19704, 240}, + {I_VMOVDQA32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19712, 240}, + {I_VMOVDQA32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19720, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQA64[] = { + {I_VMOVDQA64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19728, 240}, + {I_VMOVDQA64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19736, 240}, + {I_VMOVDQA64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19744, 241}, + {I_VMOVDQA64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19752, 240}, + {I_VMOVDQA64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19760, 240}, + {I_VMOVDQA64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19768, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQU16[] = { + {I_VMOVDQU16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19776, 244}, + {I_VMOVDQU16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19784, 244}, + {I_VMOVDQU16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19792, 245}, + {I_VMOVDQU16, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19800, 244}, + {I_VMOVDQU16, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19808, 244}, + {I_VMOVDQU16, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19816, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQU32[] = { + {I_VMOVDQU32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19824, 240}, + {I_VMOVDQU32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19832, 240}, + {I_VMOVDQU32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19840, 241}, + {I_VMOVDQU32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19848, 240}, + {I_VMOVDQU32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19856, 240}, + {I_VMOVDQU32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19864, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQU64[] = { + {I_VMOVDQU64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19872, 240}, + {I_VMOVDQU64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19880, 240}, + {I_VMOVDQU64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19888, 241}, + {I_VMOVDQU64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19896, 240}, + {I_VMOVDQU64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19904, 240}, + {I_VMOVDQU64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19912, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVDQU8[] = { + {I_VMOVDQU8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19920, 244}, + {I_VMOVDQU8, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19928, 244}, + {I_VMOVDQU8, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19936, 245}, + {I_VMOVDQU8, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19944, 244}, + {I_VMOVDQU8, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19952, 244}, + {I_VMOVDQU8, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19960, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPABSQ[] = { + {I_VPABSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20784, 240}, + {I_VPABSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20792, 240}, + {I_VPABSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20800, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPANDD[] = { + {I_VPANDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21408, 240}, + {I_VPANDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21416, 240}, + {I_VPANDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21424, 240}, + {I_VPANDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21432, 240}, + {I_VPANDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21440, 241}, + {I_VPANDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21448, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPANDND[] = { + {I_VPANDND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21456, 240}, + {I_VPANDND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21464, 240}, + {I_VPANDND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21472, 240}, + {I_VPANDND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21480, 240}, + {I_VPANDND, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21488, 241}, + {I_VPANDND, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21496, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPANDNQ[] = { + {I_VPANDNQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21504, 240}, + {I_VPANDNQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21512, 240}, + {I_VPANDNQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21520, 240}, + {I_VPANDNQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21528, 240}, + {I_VPANDNQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21536, 241}, + {I_VPANDNQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21544, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPANDQ[] = { + {I_VPANDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21552, 240}, + {I_VPANDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21560, 240}, + {I_VPANDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21568, 240}, + {I_VPANDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21576, 240}, + {I_VPANDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21584, 241}, + {I_VPANDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21592, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDMB[] = { + {I_VPBLENDMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21696, 244}, + {I_VPBLENDMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21704, 244}, + {I_VPBLENDMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21712, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDMD[] = { + {I_VPBLENDMD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21720, 240}, + {I_VPBLENDMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21728, 240}, + {I_VPBLENDMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21736, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDMQ[] = { + {I_VPBLENDMQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21744, 240}, + {I_VPBLENDMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21752, 240}, + {I_VPBLENDMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21760, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBLENDMW[] = { + {I_VPBLENDMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21768, 244}, + {I_VPBLENDMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21776, 244}, + {I_VPBLENDMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21784, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTMB2Q[] = { + {I_VPBROADCASTMB2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21912, 248}, + {I_VPBROADCASTMB2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21920, 248}, + {I_VPBROADCASTMB2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21928, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPBROADCASTMW2D[] = { + {I_VPBROADCASTMW2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21936, 248}, + {I_VPBROADCASTMW2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21944, 248}, + {I_VPBROADCASTMW2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+21952, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQUB[] = { + {I_VPCMPEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2890, 244}, + {I_VPCMPEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2900, 244}, + {I_VPCMPEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2910, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQUD[] = { + {I_VPCMPEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2920, 240}, + {I_VPCMPEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2930, 240}, + {I_VPCMPEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+2940, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQUQ[] = { + {I_VPCMPEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2950, 240}, + {I_VPCMPEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2960, 240}, + {I_VPCMPEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+2970, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPEQUW[] = { + {I_VPCMPEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2980, 244}, + {I_VPCMPEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+2990, 244}, + {I_VPCMPEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3000, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEB[] = { + {I_VPCMPGEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 244}, + {I_VPCMPGEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 244}, + {I_VPCMPGEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGED[] = { + {I_VPCMPGED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 240}, + {I_VPCMPGED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 240}, + {I_VPCMPGED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEQ[] = { + {I_VPCMPGEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 240}, + {I_VPCMPGEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 240}, + {I_VPCMPGEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEUB[] = { + {I_VPCMPGEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 244}, + {I_VPCMPGEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 244}, + {I_VPCMPGEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEUD[] = { + {I_VPCMPGEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 240}, + {I_VPCMPGEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 240}, + {I_VPCMPGEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEUQ[] = { + {I_VPCMPGEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 240}, + {I_VPCMPGEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 240}, + {I_VPCMPGEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEUW[] = { + {I_VPCMPGEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 244}, + {I_VPCMPGEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 244}, + {I_VPCMPGEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGEW[] = { + {I_VPCMPGEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 244}, + {I_VPCMPGEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 244}, + {I_VPCMPGEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTUB[] = { + {I_VPCMPGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 244}, + {I_VPCMPGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 244}, + {I_VPCMPGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTUD[] = { + {I_VPCMPGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 240}, + {I_VPCMPGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 240}, + {I_VPCMPGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTUQ[] = { + {I_VPCMPGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 240}, + {I_VPCMPGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 240}, + {I_VPCMPGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPGTUW[] = { + {I_VPCMPGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 244}, + {I_VPCMPGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 244}, + {I_VPCMPGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEB[] = { + {I_VPCMPLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 244}, + {I_VPCMPLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 244}, + {I_VPCMPLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLED[] = { + {I_VPCMPLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 240}, + {I_VPCMPLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 240}, + {I_VPCMPLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEQ[] = { + {I_VPCMPLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 240}, + {I_VPCMPLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 240}, + {I_VPCMPLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEUB[] = { + {I_VPCMPLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 244}, + {I_VPCMPLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 244}, + {I_VPCMPLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEUD[] = { + {I_VPCMPLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 240}, + {I_VPCMPLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 240}, + {I_VPCMPLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEUQ[] = { + {I_VPCMPLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 240}, + {I_VPCMPLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 240}, + {I_VPCMPLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEUW[] = { + {I_VPCMPLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 244}, + {I_VPCMPLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 244}, + {I_VPCMPLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLEW[] = { + {I_VPCMPLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 244}, + {I_VPCMPLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 244}, + {I_VPCMPLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTB[] = { + {I_VPCMPLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3760, 244}, + {I_VPCMPLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3770, 244}, + {I_VPCMPLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3780, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTD[] = { + {I_VPCMPLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3790, 240}, + {I_VPCMPLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3800, 240}, + {I_VPCMPLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3810, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTQ[] = { + {I_VPCMPLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3820, 240}, + {I_VPCMPLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3830, 240}, + {I_VPCMPLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3840, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTUB[] = { + {I_VPCMPLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3850, 244}, + {I_VPCMPLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3860, 244}, + {I_VPCMPLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3870, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTUD[] = { + {I_VPCMPLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3880, 240}, + {I_VPCMPLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3890, 240}, + {I_VPCMPLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3900, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTUQ[] = { + {I_VPCMPLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3910, 240}, + {I_VPCMPLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3920, 240}, + {I_VPCMPLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3930, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTUW[] = { + {I_VPCMPLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3940, 244}, + {I_VPCMPLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3950, 244}, + {I_VPCMPLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3960, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPLTW[] = { + {I_VPCMPLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3970, 244}, + {I_VPCMPLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3980, 244}, + {I_VPCMPLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3990, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQB[] = { + {I_VPCMPNEQB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4000, 244}, + {I_VPCMPNEQB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4010, 244}, + {I_VPCMPNEQB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4020, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQD[] = { + {I_VPCMPNEQD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4030, 240}, + {I_VPCMPNEQD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4040, 240}, + {I_VPCMPNEQD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4050, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQQ[] = { + {I_VPCMPNEQQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4060, 240}, + {I_VPCMPNEQQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4070, 240}, + {I_VPCMPNEQQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4080, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQUB[] = { + {I_VPCMPNEQUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4090, 244}, + {I_VPCMPNEQUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4100, 244}, + {I_VPCMPNEQUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4110, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQUD[] = { + {I_VPCMPNEQUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4120, 240}, + {I_VPCMPNEQUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4130, 240}, + {I_VPCMPNEQUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4140, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQUQ[] = { + {I_VPCMPNEQUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4150, 240}, + {I_VPCMPNEQUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4160, 240}, + {I_VPCMPNEQUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4170, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQUW[] = { + {I_VPCMPNEQUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4180, 244}, + {I_VPCMPNEQUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4190, 244}, + {I_VPCMPNEQUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4200, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNEQW[] = { + {I_VPCMPNEQW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4210, 244}, + {I_VPCMPNEQW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4220, 244}, + {I_VPCMPNEQW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+4230, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTB[] = { + {I_VPCMPNGTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3520, 244}, + {I_VPCMPNGTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3530, 244}, + {I_VPCMPNGTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3540, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTD[] = { + {I_VPCMPNGTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3550, 240}, + {I_VPCMPNGTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3560, 240}, + {I_VPCMPNGTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3570, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTQ[] = { + {I_VPCMPNGTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3580, 240}, + {I_VPCMPNGTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3590, 240}, + {I_VPCMPNGTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3600, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTUB[] = { + {I_VPCMPNGTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3610, 244}, + {I_VPCMPNGTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3620, 244}, + {I_VPCMPNGTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3630, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTUD[] = { + {I_VPCMPNGTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3640, 240}, + {I_VPCMPNGTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3650, 240}, + {I_VPCMPNGTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3660, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTUQ[] = { + {I_VPCMPNGTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3670, 240}, + {I_VPCMPNGTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3680, 240}, + {I_VPCMPNGTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3690, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTUW[] = { + {I_VPCMPNGTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3700, 244}, + {I_VPCMPNGTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3710, 244}, + {I_VPCMPNGTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3720, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNGTW[] = { + {I_VPCMPNGTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3730, 244}, + {I_VPCMPNGTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3740, 244}, + {I_VPCMPNGTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3750, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEB[] = { + {I_VPCMPNLEB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3280, 244}, + {I_VPCMPNLEB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3290, 244}, + {I_VPCMPNLEB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3300, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLED[] = { + {I_VPCMPNLED, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3310, 240}, + {I_VPCMPNLED, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3320, 240}, + {I_VPCMPNLED, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3330, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEQ[] = { + {I_VPCMPNLEQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3340, 240}, + {I_VPCMPNLEQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3350, 240}, + {I_VPCMPNLEQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3360, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEUB[] = { + {I_VPCMPNLEUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3370, 244}, + {I_VPCMPNLEUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3380, 244}, + {I_VPCMPNLEUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3390, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEUD[] = { + {I_VPCMPNLEUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3400, 240}, + {I_VPCMPNLEUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3410, 240}, + {I_VPCMPNLEUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3420, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEUQ[] = { + {I_VPCMPNLEUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3430, 240}, + {I_VPCMPNLEUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3440, 240}, + {I_VPCMPNLEUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3450, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEUW[] = { + {I_VPCMPNLEUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3460, 244}, + {I_VPCMPNLEUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3470, 244}, + {I_VPCMPNLEUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3480, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLEW[] = { + {I_VPCMPNLEW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3490, 244}, + {I_VPCMPNLEW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3500, 244}, + {I_VPCMPNLEW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3510, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTB[] = { + {I_VPCMPNLTB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3040, 244}, + {I_VPCMPNLTB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3050, 244}, + {I_VPCMPNLTB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3060, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTD[] = { + {I_VPCMPNLTD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3070, 240}, + {I_VPCMPNLTD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3080, 240}, + {I_VPCMPNLTD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3090, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTQ[] = { + {I_VPCMPNLTQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3100, 240}, + {I_VPCMPNLTQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3110, 240}, + {I_VPCMPNLTQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3120, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTUB[] = { + {I_VPCMPNLTUB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3130, 244}, + {I_VPCMPNLTUB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3140, 244}, + {I_VPCMPNLTUB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3150, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTUD[] = { + {I_VPCMPNLTUD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3160, 240}, + {I_VPCMPNLTUD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3170, 240}, + {I_VPCMPNLTUD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+3180, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTUQ[] = { + {I_VPCMPNLTUQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3190, 240}, + {I_VPCMPNLTUQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3200, 240}, + {I_VPCMPNLTUQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+3210, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTUW[] = { + {I_VPCMPNLTUW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3220, 244}, + {I_VPCMPNLTUW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3230, 244}, + {I_VPCMPNLTUW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3240, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPNLTW[] = { + {I_VPCMPNLTW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3250, 244}, + {I_VPCMPNLTW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3260, 244}, + {I_VPCMPNLTW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+3270, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPB[] = { + {I_VPCMPB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9244, 244}, + {I_VPCMPB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9253, 244}, + {I_VPCMPB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9262, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPD[] = { + {I_VPCMPD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9271, 240}, + {I_VPCMPD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9280, 240}, + {I_VPCMPD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9289, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPQ[] = { + {I_VPCMPQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9298, 240}, + {I_VPCMPQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9307, 240}, + {I_VPCMPQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9316, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPUB[] = { + {I_VPCMPUB, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9325, 244}, + {I_VPCMPUB, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9334, 244}, + {I_VPCMPUB, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9343, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPUD[] = { + {I_VPCMPUD, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9352, 240}, + {I_VPCMPUD, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9361, 240}, + {I_VPCMPUD, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9370, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPUQ[] = { + {I_VPCMPUQ, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9379, 240}, + {I_VPCMPUQ, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9388, 240}, + {I_VPCMPUQ, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9397, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPUW[] = { + {I_VPCMPUW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9406, 244}, + {I_VPCMPUW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9415, 244}, + {I_VPCMPUW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9424, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCMPW[] = { + {I_VPCMPW, 4, {KREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9433, 244}, + {I_VPCMPW, 4, {KREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9442, 244}, + {I_VPCMPW, 4, {KREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+9451, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMPRESSD[] = { + {I_VPCOMPRESSD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22272, 240}, + {I_VPCOMPRESSD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22280, 240}, + {I_VPCOMPRESSD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22288, 241}, + {I_VPCOMPRESSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22296, 240}, + {I_VPCOMPRESSD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22304, 240}, + {I_VPCOMPRESSD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22312, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMPRESSQ[] = { + {I_VPCOMPRESSQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22320, 240}, + {I_VPCOMPRESSQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22328, 240}, + {I_VPCOMPRESSQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22336, 241}, + {I_VPCOMPRESSQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22344, 240}, + {I_VPCOMPRESSQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22352, 240}, + {I_VPCOMPRESSQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22360, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCONFLICTD[] = { + {I_VPCONFLICTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22368, 248}, + {I_VPCONFLICTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22376, 248}, + {I_VPCONFLICTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22384, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCONFLICTQ[] = { + {I_VPCONFLICTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22392, 248}, + {I_VPCONFLICTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22400, 248}, + {I_VPCONFLICTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22408, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMB[] = { + {I_VPERMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22416, 250}, + {I_VPERMB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22424, 250}, + {I_VPERMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22432, 250}, + {I_VPERMB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22440, 250}, + {I_VPERMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22448, 251}, + {I_VPERMB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22456, 251}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2B[] = { + {I_VPERMI2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22496, 250}, + {I_VPERMI2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22504, 250}, + {I_VPERMI2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22512, 251}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2D[] = { + {I_VPERMI2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22520, 240}, + {I_VPERMI2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22528, 240}, + {I_VPERMI2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22536, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2PD[] = { + {I_VPERMI2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22544, 240}, + {I_VPERMI2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22552, 240}, + {I_VPERMI2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22560, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2PS[] = { + {I_VPERMI2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22568, 240}, + {I_VPERMI2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22576, 240}, + {I_VPERMI2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22584, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2Q[] = { + {I_VPERMI2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22592, 240}, + {I_VPERMI2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22600, 240}, + {I_VPERMI2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22608, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMI2W[] = { + {I_VPERMI2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22616, 244}, + {I_VPERMI2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22624, 244}, + {I_VPERMI2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22632, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2B[] = { + {I_VPERMT2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22832, 250}, + {I_VPERMT2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22840, 250}, + {I_VPERMT2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22848, 251}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2D[] = { + {I_VPERMT2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22856, 240}, + {I_VPERMT2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22864, 240}, + {I_VPERMT2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22872, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2PD[] = { + {I_VPERMT2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22880, 240}, + {I_VPERMT2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22888, 240}, + {I_VPERMT2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22896, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2PS[] = { + {I_VPERMT2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22904, 240}, + {I_VPERMT2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22912, 240}, + {I_VPERMT2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22920, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2Q[] = { + {I_VPERMT2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22928, 240}, + {I_VPERMT2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22936, 240}, + {I_VPERMT2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22944, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMT2W[] = { + {I_VPERMT2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22952, 244}, + {I_VPERMT2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22960, 244}, + {I_VPERMT2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22968, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPERMW[] = { + {I_VPERMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22976, 244}, + {I_VPERMW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22984, 244}, + {I_VPERMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22992, 244}, + {I_VPERMW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23000, 244}, + {I_VPERMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23008, 245}, + {I_VPERMW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23016, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXPANDD[] = { + {I_VPEXPANDD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23024, 240}, + {I_VPEXPANDD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 240}, + {I_VPEXPANDD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 241}, + {I_VPEXPANDD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23024, 240}, + {I_VPEXPANDD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23032, 240}, + {I_VPEXPANDD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23040, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXPANDQ[] = { + {I_VPEXPANDQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 240}, + {I_VPEXPANDQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 240}, + {I_VPEXPANDQ, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 241}, + {I_VPEXPANDQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23048, 240}, + {I_VPEXPANDQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23056, 240}, + {I_VPEXPANDQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23064, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPLZCNTD[] = { + {I_VPLZCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23072, 248}, + {I_VPLZCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23080, 248}, + {I_VPLZCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+23088, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPLZCNTQ[] = { + {I_VPLZCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23096, 248}, + {I_VPLZCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23104, 248}, + {I_VPLZCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23112, 249}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXSQ[] = { + {I_VPMAXSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23360, 240}, + {I_VPMAXSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23368, 240}, + {I_VPMAXSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23376, 240}, + {I_VPMAXSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23384, 240}, + {I_VPMAXSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23392, 241}, + {I_VPMAXSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23400, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMAXUQ[] = { + {I_VPMAXUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23552, 240}, + {I_VPMAXUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23560, 240}, + {I_VPMAXUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23568, 240}, + {I_VPMAXUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23576, 240}, + {I_VPMAXUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23584, 241}, + {I_VPMAXUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23592, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINSQ[] = { + {I_VPMINSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23744, 240}, + {I_VPMINSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23752, 240}, + {I_VPMINSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23760, 240}, + {I_VPMINSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23768, 240}, + {I_VPMINSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23776, 241}, + {I_VPMINSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23784, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMINUQ[] = { + {I_VPMINUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23936, 240}, + {I_VPMINUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23944, 240}, + {I_VPMINUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23952, 240}, + {I_VPMINUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23960, 240}, + {I_VPMINUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23968, 241}, + {I_VPMINUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+23976, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVB2M[] = { + {I_VPMOVB2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24032, 244}, + {I_VPMOVB2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24040, 244}, + {I_VPMOVB2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24048, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVD2M[] = { + {I_VPMOVD2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24056, 242}, + {I_VPMOVD2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24064, 242}, + {I_VPMOVD2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24072, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVDB[] = { + {I_VPMOVDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24080, 240}, + {I_VPMOVDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24088, 240}, + {I_VPMOVDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24096, 241}, + {I_VPMOVDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24104, 240}, + {I_VPMOVDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24112, 240}, + {I_VPMOVDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24120, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVDW[] = { + {I_VPMOVDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24128, 240}, + {I_VPMOVDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24136, 240}, + {I_VPMOVDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24144, 241}, + {I_VPMOVDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24152, 240}, + {I_VPMOVDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24160, 240}, + {I_VPMOVDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24168, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVM2B[] = { + {I_VPMOVM2B, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24176, 244}, + {I_VPMOVM2B, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24184, 244}, + {I_VPMOVM2B, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24192, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVM2D[] = { + {I_VPMOVM2D, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24200, 242}, + {I_VPMOVM2D, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24208, 242}, + {I_VPMOVM2D, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24216, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVM2Q[] = { + {I_VPMOVM2Q, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24224, 242}, + {I_VPMOVM2Q, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24232, 242}, + {I_VPMOVM2Q, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24240, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVM2W[] = { + {I_VPMOVM2W, 2, {XMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24248, 244}, + {I_VPMOVM2W, 2, {YMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24256, 244}, + {I_VPMOVM2W, 2, {ZMMREG,KREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24264, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVQ2M[] = { + {I_VPMOVQ2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24272, 242}, + {I_VPMOVQ2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24280, 242}, + {I_VPMOVQ2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+24288, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVQB[] = { + {I_VPMOVQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24296, 240}, + {I_VPMOVQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24304, 240}, + {I_VPMOVQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24312, 241}, + {I_VPMOVQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24320, 240}, + {I_VPMOVQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24328, 240}, + {I_VPMOVQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24336, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVQD[] = { + {I_VPMOVQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24344, 240}, + {I_VPMOVQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24352, 240}, + {I_VPMOVQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24360, 241}, + {I_VPMOVQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24368, 240}, + {I_VPMOVQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24376, 240}, + {I_VPMOVQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24384, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVQW[] = { + {I_VPMOVQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24392, 240}, + {I_VPMOVQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24400, 240}, + {I_VPMOVQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24408, 241}, + {I_VPMOVQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24416, 240}, + {I_VPMOVQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24424, 240}, + {I_VPMOVQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24432, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSDB[] = { + {I_VPMOVSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24440, 240}, + {I_VPMOVSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24448, 240}, + {I_VPMOVSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24456, 241}, + {I_VPMOVSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24464, 240}, + {I_VPMOVSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24472, 240}, + {I_VPMOVSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24480, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSDW[] = { + {I_VPMOVSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24488, 240}, + {I_VPMOVSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24496, 240}, + {I_VPMOVSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24504, 241}, + {I_VPMOVSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24512, 240}, + {I_VPMOVSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24520, 240}, + {I_VPMOVSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24528, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSQB[] = { + {I_VPMOVSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24536, 240}, + {I_VPMOVSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24544, 240}, + {I_VPMOVSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24552, 241}, + {I_VPMOVSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24560, 240}, + {I_VPMOVSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24568, 240}, + {I_VPMOVSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24576, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSQD[] = { + {I_VPMOVSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24584, 240}, + {I_VPMOVSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24592, 240}, + {I_VPMOVSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24600, 241}, + {I_VPMOVSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24608, 240}, + {I_VPMOVSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24616, 240}, + {I_VPMOVSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24624, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSQW[] = { + {I_VPMOVSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24632, 240}, + {I_VPMOVSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24640, 240}, + {I_VPMOVSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24648, 241}, + {I_VPMOVSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24656, 240}, + {I_VPMOVSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24664, 240}, + {I_VPMOVSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24672, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVSWB[] = { + {I_VPMOVSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24680, 244}, + {I_VPMOVSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24688, 244}, + {I_VPMOVSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24696, 245}, + {I_VPMOVSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24704, 244}, + {I_VPMOVSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24712, 244}, + {I_VPMOVSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24720, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSDB[] = { + {I_VPMOVUSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24872, 240}, + {I_VPMOVUSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24880, 240}, + {I_VPMOVUSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24888, 241}, + {I_VPMOVUSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24896, 240}, + {I_VPMOVUSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24904, 240}, + {I_VPMOVUSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24912, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSDW[] = { + {I_VPMOVUSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24920, 240}, + {I_VPMOVUSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24928, 240}, + {I_VPMOVUSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24936, 241}, + {I_VPMOVUSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24944, 240}, + {I_VPMOVUSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24952, 240}, + {I_VPMOVUSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24960, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSQB[] = { + {I_VPMOVUSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24968, 240}, + {I_VPMOVUSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24976, 240}, + {I_VPMOVUSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+24984, 241}, + {I_VPMOVUSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+24992, 240}, + {I_VPMOVUSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25000, 240}, + {I_VPMOVUSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25008, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSQD[] = { + {I_VPMOVUSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25016, 240}, + {I_VPMOVUSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25024, 240}, + {I_VPMOVUSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25032, 241}, + {I_VPMOVUSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25040, 240}, + {I_VPMOVUSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25048, 240}, + {I_VPMOVUSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25056, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSQW[] = { + {I_VPMOVUSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25064, 240}, + {I_VPMOVUSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25072, 240}, + {I_VPMOVUSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25080, 241}, + {I_VPMOVUSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25088, 240}, + {I_VPMOVUSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25096, 240}, + {I_VPMOVUSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25104, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVUSWB[] = { + {I_VPMOVUSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25112, 244}, + {I_VPMOVUSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25120, 244}, + {I_VPMOVUSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25128, 245}, + {I_VPMOVUSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25136, 244}, + {I_VPMOVUSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25144, 244}, + {I_VPMOVUSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25152, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVW2M[] = { + {I_VPMOVW2M, 2, {KREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25160, 244}, + {I_VPMOVW2M, 2, {KREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 244}, + {I_VPMOVW2M, 2, {KREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+25176, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMOVWB[] = { + {I_VPMOVWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25184, 244}, + {I_VPMOVWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25192, 244}, + {I_VPMOVWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+25200, 245}, + {I_VPMOVWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25208, 244}, + {I_VPMOVWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25216, 244}, + {I_VPMOVWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+25224, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULLQ[] = { + {I_VPMULLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25616, 242}, + {I_VPMULLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25624, 242}, + {I_VPMULLQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25632, 242}, + {I_VPMULLQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25640, 242}, + {I_VPMULLQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25648, 243}, + {I_VPMULLQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25656, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMULTISHIFTQB[] = { + {I_VPMULTISHIFTQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25712, 250}, + {I_VPMULTISHIFTQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25720, 250}, + {I_VPMULTISHIFTQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25728, 250}, + {I_VPMULTISHIFTQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25736, 250}, + {I_VPMULTISHIFTQB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25744, 251}, + {I_VPMULTISHIFTQB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25752, 251}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPORD[] = { + {I_VPORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25808, 240}, + {I_VPORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25816, 240}, + {I_VPORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25824, 240}, + {I_VPORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25832, 240}, + {I_VPORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25840, 241}, + {I_VPORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25848, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPORQ[] = { + {I_VPORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25856, 240}, + {I_VPORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25864, 240}, + {I_VPORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25872, 240}, + {I_VPORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25880, 240}, + {I_VPORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25888, 241}, + {I_VPORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25896, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROLD[] = { + {I_VPROLD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9775, 240}, + {I_VPROLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9784, 240}, + {I_VPROLD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9793, 240}, + {I_VPROLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9802, 240}, + {I_VPROLD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9811, 241}, + {I_VPROLD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9820, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROLQ[] = { + {I_VPROLQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9829, 240}, + {I_VPROLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9838, 240}, + {I_VPROLQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9847, 240}, + {I_VPROLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9856, 240}, + {I_VPROLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9865, 241}, + {I_VPROLQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9874, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROLVD[] = { + {I_VPROLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25904, 240}, + {I_VPROLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25912, 240}, + {I_VPROLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25920, 240}, + {I_VPROLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25928, 240}, + {I_VPROLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+25936, 241}, + {I_VPROLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+25944, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPROLVQ[] = { + {I_VPROLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25952, 240}, + {I_VPROLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25960, 240}, + {I_VPROLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25968, 240}, + {I_VPROLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25976, 240}, + {I_VPROLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+25984, 241}, + {I_VPROLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+25992, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPRORD[] = { + {I_VPRORD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9883, 240}, + {I_VPRORD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9892, 240}, + {I_VPRORD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9901, 240}, + {I_VPRORD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9910, 240}, + {I_VPRORD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+9919, 241}, + {I_VPRORD, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9928, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPRORQ[] = { + {I_VPRORQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9937, 240}, + {I_VPRORQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9946, 240}, + {I_VPRORQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9955, 240}, + {I_VPRORQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9964, 240}, + {I_VPRORQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+9973, 241}, + {I_VPRORQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+9982, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPRORVD[] = { + {I_VPRORVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26000, 240}, + {I_VPRORVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26008, 240}, + {I_VPRORVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26016, 240}, + {I_VPRORVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26024, 240}, + {I_VPRORVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+26032, 241}, + {I_VPRORVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+26040, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPRORVQ[] = { + {I_VPRORVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26048, 240}, + {I_VPRORVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26056, 240}, + {I_VPRORVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26064, 240}, + {I_VPRORVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26072, 240}, + {I_VPRORVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26080, 241}, + {I_VPRORVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26088, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSCATTERDD[] = { + {I_VPSCATTERDD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9991, 240}, + {I_VPSCATTERDD, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10000, 240}, + {I_VPSCATTERDD, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10009, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSCATTERDQ[] = { + {I_VPSCATTERDQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10018, 240}, + {I_VPSCATTERDQ, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10027, 240}, + {I_VPSCATTERDQ, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10036, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSCATTERQD[] = { + {I_VPSCATTERQD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10045, 240}, + {I_VPSCATTERQD, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10054, 240}, + {I_VPSCATTERQD, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10063, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSCATTERQQ[] = { + {I_VPSCATTERQQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10072, 240}, + {I_VPSCATTERQQ, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10081, 240}, + {I_VPSCATTERQQ, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+10090, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSLLVW[] = { + {I_VPSLLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26384, 244}, + {I_VPSLLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26392, 244}, + {I_VPSLLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26400, 244}, + {I_VPSLLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26408, 244}, + {I_VPSLLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26416, 245}, + {I_VPSLLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26424, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAQ[] = { + {I_VPSRAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26528, 240}, + {I_VPSRAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26536, 240}, + {I_VPSRAQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26544, 240}, + {I_VPSRAQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26552, 240}, + {I_VPSRAQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26560, 241}, + {I_VPSRAQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26568, 241}, + {I_VPSRAQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10450, 240}, + {I_VPSRAQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10459, 240}, + {I_VPSRAQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10468, 240}, + {I_VPSRAQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10477, 240}, + {I_VPSRAQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10486, 241}, + {I_VPSRAQ, 2, {ZMMREG,IMMEDIATE|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+10495, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAVQ[] = { + {I_VPSRAVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26624, 240}, + {I_VPSRAVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26632, 240}, + {I_VPSRAVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26640, 240}, + {I_VPSRAVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26648, 240}, + {I_VPSRAVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+26656, 241}, + {I_VPSRAVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+26664, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRAVW[] = { + {I_VPSRAVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26672, 244}, + {I_VPSRAVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26680, 244}, + {I_VPSRAVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26688, 244}, + {I_VPSRAVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26696, 244}, + {I_VPSRAVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26704, 245}, + {I_VPSRAVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26712, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSRLVW[] = { + {I_VPSRLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26960, 244}, + {I_VPSRLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26968, 244}, + {I_VPSRLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26976, 244}, + {I_VPSRLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26984, 244}, + {I_VPSRLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+26992, 245}, + {I_VPSRLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+27000, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTERNLOGD[] = { + {I_VPTERNLOGD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10774, 240}, + {I_VPTERNLOGD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10783, 240}, + {I_VPTERNLOGD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10792, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTERNLOGQ[] = { + {I_VPTERNLOGQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10801, 240}, + {I_VPTERNLOGQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10810, 240}, + {I_VPTERNLOGQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10819, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTMB[] = { + {I_VPTESTMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27440, 244}, + {I_VPTESTMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27448, 244}, + {I_VPTESTMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27456, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTMD[] = { + {I_VPTESTMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27464, 240}, + {I_VPTESTMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27472, 240}, + {I_VPTESTMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27480, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTMQ[] = { + {I_VPTESTMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27488, 240}, + {I_VPTESTMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27496, 240}, + {I_VPTESTMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27504, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTMW[] = { + {I_VPTESTMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27512, 244}, + {I_VPTESTMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27520, 244}, + {I_VPTESTMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27528, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTNMB[] = { + {I_VPTESTNMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27536, 244}, + {I_VPTESTNMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27544, 244}, + {I_VPTESTNMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27552, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTNMD[] = { + {I_VPTESTNMD, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27560, 240}, + {I_VPTESTNMD, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27568, 240}, + {I_VPTESTNMD, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+27576, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTNMQ[] = { + {I_VPTESTNMQ, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27584, 240}, + {I_VPTESTNMQ, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27592, 240}, + {I_VPTESTNMQ, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+27600, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPTESTNMW[] = { + {I_VPTESTNMW, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27608, 244}, + {I_VPTESTNMW, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27616, 244}, + {I_VPTESTNMW, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+27624, 245}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPXORD[] = { + {I_VPXORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28016, 240}, + {I_VPXORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28024, 240}, + {I_VPXORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28032, 240}, + {I_VPXORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28040, 240}, + {I_VPXORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28048, 241}, + {I_VPXORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28056, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPXORQ[] = { + {I_VPXORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28064, 240}, + {I_VPXORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28072, 240}, + {I_VPXORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28080, 240}, + {I_VPXORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28088, 240}, + {I_VPXORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28096, 241}, + {I_VPXORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28104, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRANGEPD[] = { + {I_VRANGEPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10828, 242}, + {I_VRANGEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10837, 242}, + {I_VRANGEPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+10846, 242}, + {I_VRANGEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10855, 242}, + {I_VRANGEPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+10864, 243}, + {I_VRANGEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10873, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRANGEPS[] = { + {I_VRANGEPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10882, 242}, + {I_VRANGEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10891, 242}, + {I_VRANGEPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+10900, 242}, + {I_VRANGEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10909, 242}, + {I_VRANGEPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+10918, 243}, + {I_VRANGEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+10927, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRANGESD[] = { + {I_VRANGESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10936, 243}, + {I_VRANGESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10945, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRANGESS[] = { + {I_VRANGESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+10954, 243}, + {I_VRANGESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+10963, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP14PD[] = { + {I_VRCP14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28112, 240}, + {I_VRCP14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28120, 240}, + {I_VRCP14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28128, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP14PS[] = { + {I_VRCP14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28136, 240}, + {I_VRCP14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28144, 240}, + {I_VRCP14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28152, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP14SD[] = { + {I_VRCP14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28160, 241}, + {I_VRCP14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28168, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP14SS[] = { + {I_VRCP14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28176, 241}, + {I_VRCP14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28184, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP28PD[] = { + {I_VRCP28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28192, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP28PS[] = { + {I_VRCP28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28200, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP28SD[] = { + {I_VRCP28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28208, 246}, + {I_VRCP28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28216, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCP28SS[] = { + {I_VRCP28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28224, 246}, + {I_VRCP28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28232, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCEPD[] = { + {I_VREDUCEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10972, 242}, + {I_VREDUCEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+10981, 242}, + {I_VREDUCEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+10990, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCEPS[] = { + {I_VREDUCEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+10999, 242}, + {I_VREDUCEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11008, 242}, + {I_VREDUCEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11017, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCESD[] = { + {I_VREDUCESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11026, 243}, + {I_VREDUCESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11035, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCESS[] = { + {I_VREDUCESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11044, 243}, + {I_VREDUCESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11053, 243}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRNDSCALEPD[] = { + {I_VRNDSCALEPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11062, 240}, + {I_VRNDSCALEPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11071, 240}, + {I_VRNDSCALEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+11080, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRNDSCALEPS[] = { + {I_VRNDSCALEPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11089, 240}, + {I_VRNDSCALEPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11098, 240}, + {I_VRNDSCALEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+11107, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRNDSCALESD[] = { + {I_VRNDSCALESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11116, 241}, + {I_VRNDSCALESD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11125, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRNDSCALESS[] = { + {I_VRNDSCALESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+11134, 241}, + {I_VRNDSCALESS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+11143, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT14PD[] = { + {I_VRSQRT14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28240, 240}, + {I_VRSQRT14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28248, 240}, + {I_VRSQRT14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28256, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT14PS[] = { + {I_VRSQRT14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28264, 240}, + {I_VRSQRT14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28272, 240}, + {I_VRSQRT14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28280, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT14SD[] = { + {I_VRSQRT14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28288, 241}, + {I_VRSQRT14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28296, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT14SS[] = { + {I_VRSQRT14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28304, 241}, + {I_VRSQRT14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+28312, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT28PD[] = { + {I_VRSQRT28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+28320, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT28PS[] = { + {I_VRSQRT28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+28328, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT28SD[] = { + {I_VRSQRT28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28336, 246}, + {I_VRSQRT28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28344, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRT28SS[] = { + {I_VRSQRT28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+28352, 246}, + {I_VRSQRT28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+28360, 246}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFPD[] = { + {I_VSCALEFPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28368, 240}, + {I_VSCALEFPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28376, 240}, + {I_VSCALEFPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+28384, 240}, + {I_VSCALEFPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+28392, 240}, + {I_VSCALEFPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+28400, 241}, + {I_VSCALEFPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+28408, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFPS[] = { + {I_VSCALEFPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28416, 240}, + {I_VSCALEFPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28424, 240}, + {I_VSCALEFPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+28432, 240}, + {I_VSCALEFPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+28440, 240}, + {I_VSCALEFPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+28448, 241}, + {I_VSCALEFPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+28456, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFSD[] = { + {I_VSCALEFSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28464, 241}, + {I_VSCALEFSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28472, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFSS[] = { + {I_VSCALEFSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+28480, 241}, + {I_VSCALEFSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+28488, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERDPD[] = { + {I_VSCATTERDPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11152, 240}, + {I_VSCATTERDPD, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11161, 240}, + {I_VSCATTERDPD, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11170, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERDPS[] = { + {I_VSCATTERDPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11179, 240}, + {I_VSCATTERDPS, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11188, 240}, + {I_VSCATTERDPS, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11197, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF0DPD[] = { + {I_VSCATTERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11206, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF0DPS[] = { + {I_VSCATTERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11215, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF0QPD[] = { + {I_VSCATTERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11224, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF0QPS[] = { + {I_VSCATTERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11233, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF1DPD[] = { + {I_VSCATTERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11242, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF1DPS[] = { + {I_VSCATTERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11251, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF1QPD[] = { + {I_VSCATTERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11260, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERPF1QPS[] = { + {I_VSCATTERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11269, 247}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERQPD[] = { + {I_VSCATTERQPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11278, 240}, + {I_VSCATTERQPD, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11287, 240}, + {I_VSCATTERQPD, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11296, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCATTERQPS[] = { + {I_VSCATTERQPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11305, 240}, + {I_VSCATTERQPS, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11314, 240}, + {I_VSCATTERQPS, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+11323, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFF32X4[] = { + {I_VSHUFF32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11332, 240}, + {I_VSHUFF32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11341, 240}, + {I_VSHUFF32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11350, 241}, + {I_VSHUFF32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11359, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFF64X2[] = { + {I_VSHUFF64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11368, 240}, + {I_VSHUFF64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11377, 240}, + {I_VSHUFF64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11386, 241}, + {I_VSHUFF64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11395, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFI32X4[] = { + {I_VSHUFI32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11404, 240}, + {I_VSHUFI32X4, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11413, 240}, + {I_VSHUFI32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11422, 241}, + {I_VSHUFI32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11431, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSHUFI64X2[] = { + {I_VSHUFI64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11440, 240}, + {I_VSHUFI64X2, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11449, 240}, + {I_VSHUFI64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11458, 241}, + {I_VSHUFI64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11467, 241}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDPKRU[] = { + {I_RDPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46072, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRPKRU[] = { + {I_WRPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46078, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDPID[] = { + {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42322, 254}, + {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42321, 136}, + {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42322, 255}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLFLUSHOPT[] = { + {I_CLFLUSHOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45951, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLWB[] = { + {I_CLWB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45957, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCOMMIT[] = { + {I_PCOMMIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45963, 256}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLZERO[] = { + {I_CLZERO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45982, 257}, + {I_CLZERO, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45969, 258}, + {I_CLZERO, 1, {REG_EAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45975, 257}, + {I_CLZERO, 1, {REG_RAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45981, 259}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PTWRITE[] = { + {I_PTWRITE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34020, 135}, + {I_PTWRITE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+34019, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLDEMOTE[] = { + {I_CLDEMOTE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45987, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDIRI[] = { + {I_MOVDIRI, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42328, 260}, + {I_MOVDIRI, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42335, 261}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_MOVDIR64B[] = { + {I_MOVDIR64B, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29008, 254}, + {I_MOVDIR64B, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29016, 135}, + {I_MOVDIR64B, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+11584, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_PCONFIG[] = { + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45993, 135}, + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45993, 285}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TPAUSE[] = { + {I_TPAUSE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45957, 135}, + {I_TPAUSE, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+45957, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UMONITOR[] = { + {I_UMONITOR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42342, 254}, + {I_UMONITOR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42349, 135}, + {I_UMONITOR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29024, 136}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UMWAIT[] = { + {I_UMWAIT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45999, 135}, + {I_UMWAIT, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+45999, 135}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WBNOINVD[] = { + {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49182, 135}, + {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+49182, 287}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_GF2P8AFFINEINVQB[] = { + {I_GF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29032, 262}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGF2P8AFFINEINVQB[] = { + {I_VGF2P8AFFINEINVQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29040, 263}, + {I_VGF2P8AFFINEINVQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29048, 263}, + {I_VGF2P8AFFINEINVQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29056, 263}, + {I_VGF2P8AFFINEINVQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29064, 263}, + {I_VGF2P8AFFINEINVQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11593, 264}, + {I_VGF2P8AFFINEINVQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11602, 264}, + {I_VGF2P8AFFINEINVQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11611, 264}, + {I_VGF2P8AFFINEINVQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11620, 264}, + {I_VGF2P8AFFINEINVQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11629, 265}, + {I_VGF2P8AFFINEINVQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11638, 265}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_GF2P8AFFINEQB[] = { + {I_GF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29072, 262}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGF2P8AFFINEQB[] = { + {I_VGF2P8AFFINEQB, 4, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29080, 263}, + {I_VGF2P8AFFINEQB, 3, {XMM_L16,RM_XMM_L16|BITS128,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29088, 263}, + {I_VGF2P8AFFINEQB, 4, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0}, NO_DECORATOR, nasm_bytecodes+29096, 263}, + {I_VGF2P8AFFINEQB, 3, {YMM_L16,RM_YMM_L16|BITS256,IMMEDIATE|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29104, 263}, + {I_VGF2P8AFFINEQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11647, 264}, + {I_VGF2P8AFFINEQB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11656, 264}, + {I_VGF2P8AFFINEQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11665, 264}, + {I_VGF2P8AFFINEQB, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11674, 264}, + {I_VGF2P8AFFINEQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11683, 265}, + {I_VGF2P8AFFINEQB, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11692, 265}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_GF2P8MULB[] = { + {I_GF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42356, 262}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGF2P8MULB[] = { + {I_VGF2P8MULB, 3, {XMM_L16,XMM_L16,RM_XMM_L16|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+42363, 263}, + {I_VGF2P8MULB, 2, {XMM_L16,RM_XMM_L16|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+42370, 263}, + {I_VGF2P8MULB, 3, {YMM_L16,YMM_L16,RM_YMM_L16|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+42377, 263}, + {I_VGF2P8MULB, 2, {YMM_L16,RM_YMM_L16|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+42384, 263}, + {I_VGF2P8MULB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29112, 264}, + {I_VGF2P8MULB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29120, 264}, + {I_VGF2P8MULB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29128, 264}, + {I_VGF2P8MULB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29136, 264}, + {I_VGF2P8MULB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29144, 265}, + {I_VGF2P8MULB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29152, 265}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMPRESSB[] = { + {I_VPCOMPRESSB, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29160, 266}, + {I_VPCOMPRESSB, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29168, 266}, + {I_VPCOMPRESSB, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29176, 267}, + {I_VPCOMPRESSB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29184, 266}, + {I_VPCOMPRESSB, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29192, 266}, + {I_VPCOMPRESSB, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29200, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPCOMPRESSW[] = { + {I_VPCOMPRESSW, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29208, 266}, + {I_VPCOMPRESSW, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29216, 266}, + {I_VPCOMPRESSW, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29224, 267}, + {I_VPCOMPRESSW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29232, 266}, + {I_VPCOMPRESSW, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29240, 266}, + {I_VPCOMPRESSW, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29248, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXPANDB[] = { + {I_VPEXPANDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29256, 266}, + {I_VPEXPANDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29264, 266}, + {I_VPEXPANDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29272, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPEXPANDW[] = { + {I_VPEXPANDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29280, 266}, + {I_VPEXPANDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29288, 266}, + {I_VPEXPANDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29296, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDW[] = { + {I_VPSHLDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11701, 266}, + {I_VPSHLDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11710, 266}, + {I_VPSHLDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11719, 266}, + {I_VPSHLDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11728, 266}, + {I_VPSHLDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11737, 267}, + {I_VPSHLDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11746, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDD[] = { + {I_VPSHLDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11755, 266}, + {I_VPSHLDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11764, 266}, + {I_VPSHLDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11773, 266}, + {I_VPSHLDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11782, 266}, + {I_VPSHLDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11791, 267}, + {I_VPSHLDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11800, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDQ[] = { + {I_VPSHLDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11809, 266}, + {I_VPSHLDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11818, 266}, + {I_VPSHLDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11827, 266}, + {I_VPSHLDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11836, 266}, + {I_VPSHLDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11845, 267}, + {I_VPSHLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11854, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDVW[] = { + {I_VPSHLDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29304, 266}, + {I_VPSHLDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29312, 266}, + {I_VPSHLDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29320, 266}, + {I_VPSHLDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29328, 266}, + {I_VPSHLDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29336, 267}, + {I_VPSHLDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29344, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDVD[] = { + {I_VPSHLDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29352, 266}, + {I_VPSHLDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29360, 266}, + {I_VPSHLDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29368, 266}, + {I_VPSHLDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29376, 266}, + {I_VPSHLDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29384, 267}, + {I_VPSHLDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29392, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHLDVQ[] = { + {I_VPSHLDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29400, 266}, + {I_VPSHLDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29408, 266}, + {I_VPSHLDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29416, 266}, + {I_VPSHLDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29424, 266}, + {I_VPSHLDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29432, 267}, + {I_VPSHLDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29440, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDW[] = { + {I_VPSHRDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11863, 266}, + {I_VPSHRDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11872, 266}, + {I_VPSHRDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11881, 266}, + {I_VPSHRDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11890, 266}, + {I_VPSHRDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11899, 267}, + {I_VPSHRDW, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+11908, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDD[] = { + {I_VPSHRDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11917, 266}, + {I_VPSHRDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11926, 266}, + {I_VPSHRDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11935, 266}, + {I_VPSHRDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11944, 266}, + {I_VPSHRDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+11953, 267}, + {I_VPSHRDD, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+11962, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDQ[] = { + {I_VPSHRDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11971, 266}, + {I_VPSHRDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11980, 266}, + {I_VPSHRDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+11989, 266}, + {I_VPSHRDQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+11998, 266}, + {I_VPSHRDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+12007, 267}, + {I_VPSHRDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+12016, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDVW[] = { + {I_VPSHRDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29448, 266}, + {I_VPSHRDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29456, 266}, + {I_VPSHRDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29464, 266}, + {I_VPSHRDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29472, 266}, + {I_VPSHRDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29480, 267}, + {I_VPSHRDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29488, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDVD[] = { + {I_VPSHRDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29496, 266}, + {I_VPSHRDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29504, 266}, + {I_VPSHRDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29512, 266}, + {I_VPSHRDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29520, 266}, + {I_VPSHRDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29528, 267}, + {I_VPSHRDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29536, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHRDVQ[] = { + {I_VPSHRDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29544, 266}, + {I_VPSHRDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29552, 266}, + {I_VPSHRDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29560, 266}, + {I_VPSHRDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29568, 266}, + {I_VPSHRDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+29576, 267}, + {I_VPSHRDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+29584, 267}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBUSD[] = { + {I_VPDPBUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29592, 268}, + {I_VPDPBUSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29600, 268}, + {I_VPDPBUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29608, 268}, + {I_VPDPBUSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29616, 268}, + {I_VPDPBUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29624, 269}, + {I_VPDPBUSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29632, 269}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPBUSDS[] = { + {I_VPDPBUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29640, 268}, + {I_VPDPBUSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29648, 268}, + {I_VPDPBUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29656, 268}, + {I_VPDPBUSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29664, 268}, + {I_VPDPBUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29672, 269}, + {I_VPDPBUSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29680, 269}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPWSSD[] = { + {I_VPDPWSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29688, 268}, + {I_VPDPWSSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29696, 268}, + {I_VPDPWSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29704, 268}, + {I_VPDPWSSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29712, 268}, + {I_VPDPWSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29720, 269}, + {I_VPDPWSSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29728, 269}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPDPWSSDS[] = { + {I_VPDPWSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29736, 268}, + {I_VPDPWSSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29744, 268}, + {I_VPDPWSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29752, 268}, + {I_VPDPWSSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29760, 268}, + {I_VPDPWSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+29768, 269}, + {I_VPDPWSSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+29776, 269}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPOPCNTB[] = { + {I_VPOPCNTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29784, 270}, + {I_VPOPCNTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29792, 270}, + {I_VPOPCNTB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29800, 271}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPOPCNTW[] = { + {I_VPOPCNTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29808, 270}, + {I_VPOPCNTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29816, 270}, + {I_VPOPCNTW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29824, 271}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPOPCNTD[] = { + {I_VPOPCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29832, 272}, + {I_VPOPCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29840, 272}, + {I_VPOPCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29848, 273}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPOPCNTQ[] = { + {I_VPOPCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29856, 272}, + {I_VPOPCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29864, 272}, + {I_VPOPCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29872, 273}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPSHUFBITQMB[] = { + {I_VPSHUFBITQMB, 3, {KREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29880, 270}, + {I_VPSHUFBITQMB, 3, {KREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29888, 270}, + {I_VPSHUFBITQMB, 3, {KREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+29896, 271}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4FMADDPS[] = { + {I_V4FMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29904, 274}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4FNMADDPS[] = { + {I_V4FNMADDPS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29912, 274}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4FMADDSS[] = { + {I_V4FMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29920, 274}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4FNMADDSS[] = { + {I_V4FNMADDSS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29928, 274}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4DPWSSDS[] = { + {I_V4DPWSSDS, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29936, 275}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_V4DPWSSD[] = { + {I_V4DPWSSD, 3, {ZMM_L16,ZMM_L16|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+29944, 275}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENCLS[] = { + {I_ENCLS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46005, 276}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENCLU[] = { + {I_ENCLU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46011, 276}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENCLV[] = { + {I_ENCLV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46017, 276}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLRSSBSY[] = { + {I_CLRSSBSY, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42350, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENDBR32[] = { + {I_ENDBR32, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46023, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENDBR64[] = { + {I_ENDBR64, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46029, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INCSSPD[] = { + {I_INCSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42391, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_INCSSPQ[] = { + {I_INCSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42398, 278}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDSSPD[] = { + {I_RDSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42405, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDSSPQ[] = { + {I_RDSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42412, 278}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RSTORSSP[] = { + {I_RSTORSSP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46035, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SAVEPREVSSP[] = { + {I_SAVEPREVSSP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46041, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SETSSBSY[] = { + {I_SETSSBSY, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46047, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRUSSD[] = { + {I_WRUSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29952, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRUSSQ[] = { + {I_WRUSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29960, 278}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRSSD[] = { + {I_WRSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+42419, 277}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRSSQ[] = { + {I_WRSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+42426, 278}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENQCMD[] = { + {I_ENQCMD, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29968, 279}, + {I_ENQCMD, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29968, 279}, + {I_ENQCMD, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29976, 280}, + {I_ENQCMD, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29984, 281}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_ENQCMDS[] = { + {I_ENQCMDS, 2, {REG_GPR|BITS16,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 282}, + {I_ENQCMDS, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 282}, + {I_ENQCMDS, 2, {REG_GPR|BITS32,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30000, 283}, + {I_ENQCMDS, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+30008, 284}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SERIALIZE[] = { + {I_SERIALIZE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46053, 286}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XRESLDTRK[] = { + {I_XRESLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46059, 288}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_XSUSLDTRK[] = { + {I_XSUSLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46065, 288}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTNE2PS2BF16[] = { + {I_VCVTNE2PS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30016, 289}, + {I_VCVTNE2PS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30024, 289}, + {I_VCVTNE2PS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30032, 289}, + {I_VCVTNE2PS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30040, 289}, + {I_VCVTNE2PS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30048, 289}, + {I_VCVTNE2PS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30056, 289}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDPBF16PS[] = { + {I_VDPBF16PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30112, 289}, + {I_VDPBF16PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30120, 289}, + {I_VDPBF16PS, 3, {YMMREG,YMMREG,RM_YMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30128, 289}, + {I_VDPBF16PS, 2, {YMMREG,RM_YMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30136, 289}, + {I_VDPBF16PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30144, 289}, + {I_VDPBF16PS, 2, {ZMMREG,RM_ZMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30152, 289}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VP2INTERSECTD[] = { + {I_VP2INTERSECTD, 3, {KREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30160, 289}, + {I_VP2INTERSECTD, 3, {KREG|RS2,YMMREG,RM_YMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30168, 289}, + {I_VP2INTERSECTD, 3, {KREG|RS2,ZMMREG,RM_ZMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+30176, 289}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_LDTILECFG[] = { + {I_LDTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42433, 290}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STTILECFG[] = { + {I_STTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42440, 290}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TDPBF16PS[] = { + {I_TDPBF16PS, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42447, 291}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TDPBSSD[] = { + {I_TDPBSSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42454, 292}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TDPBSUD[] = { + {I_TDPBSUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42461, 292}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TDPBUSD[] = { + {I_TDPBUSD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42468, 292}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TDPBUUD[] = { + {I_TDPBUUD, 3, {TMMREG,TMMREG,TMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+42475, 292}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TILELOADD[] = { + {I_TILELOADD, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42482, 293}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TILELOADDT1[] = { + {I_TILELOADDT1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+42489, 293}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TILERELEASE[] = { + {I_TILERELEASE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42496, 294}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TILESTORED[] = { + {I_TILESTORED, 2, {MEMORY,TMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+42503, 293}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TILEZERO[] = { + {I_TILEZERO, 1, {TMMREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30184, 294}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDPH[] = { + {I_VADDPH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30192, 295}, + {I_VADDPH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30200, 295}, + {I_VADDPH, 3, {YMMREG,YMMREG,RM_YMM|BITS16,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30208, 295}, + {I_VADDPH, 2, {YMMREG,RM_YMM|BITS16,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30216, 295}, + {I_VADDPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS16,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+30224, 296}, + {I_VADDPH, 2, {ZMMREG,RM_ZMM|BITS16,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30232, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VADDSH[] = { + {I_VADDSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30240, 296}, + {I_VADDSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30248, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPPH[] = { + {I_VCMPPH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12025, 295}, + {I_VCMPPH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12034, 295}, + {I_VCMPPH, 4, {KREG,YMMREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+12043, 295}, + {I_VCMPPH, 3, {KREG,RM_YMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12052, 295}, + {I_VCMPPH, 4, {KREG,ZMMREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,B16|SAE,0,0}, nasm_bytecodes+12061, 296}, + {I_VCMPPH, 3, {KREG,RM_ZMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,B16|SAE,0,0,0}, nasm_bytecodes+12070, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCMPSH[] = { + {I_VCMPSH, 4, {KREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+12079, 296}, + {I_VCMPSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+12088, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCOMISH[] = { + {I_VCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30256, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTDQ2PH[] = { + {I_VCVTDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30264, 295}, + {I_VCVTDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30272, 295}, + {I_VCVTDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30280, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPD2PH[] = { + {I_VCVTPD2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30288, 295}, + {I_VCVTPD2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30296, 295}, + {I_VCVTPD2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30304, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2DQ[] = { + {I_VCVTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30312, 295}, + {I_VCVTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30320, 295}, + {I_VCVTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30328, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2PD[] = { + {I_VCVTPH2PD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30336, 295}, + {I_VCVTPH2PD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30344, 295}, + {I_VCVTPH2PD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30352, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2PSX[] = { + {I_VCVTPH2PSX, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30360, 295}, + {I_VCVTPH2PSX, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30368, 295}, + {I_VCVTPH2PSX, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30376, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2QQ[] = { + {I_VCVTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30384, 295}, + {I_VCVTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30392, 295}, + {I_VCVTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30400, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2UDQ[] = { + {I_VCVTPH2UDQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30408, 295}, + {I_VCVTPH2UDQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30416, 295}, + {I_VCVTPH2UDQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30424, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2UQQ[] = { + {I_VCVTPH2UQQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30432, 295}, + {I_VCVTPH2UQQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30440, 295}, + {I_VCVTPH2UQQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30448, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2UW[] = { + {I_VCVTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30456, 295}, + {I_VCVTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30464, 295}, + {I_VCVTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30472, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTPH2W[] = { + {I_VCVTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30480, 295}, + {I_VCVTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30488, 295}, + {I_VCVTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30496, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTQQ2PH[] = { + {I_VCVTQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30528, 295}, + {I_VCVTQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30536, 295}, + {I_VCVTQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30544, 295}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSD2SH[] = { + {I_VCVTSD2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30552, 296}, + {I_VCVTSD2SH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30560, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSH2SD[] = { + {I_VCVTSH2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {0,0,SAE,0,0}, nasm_bytecodes+30568, 296}, + {I_VCVTSH2SD, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30576, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSH2SI[] = { + {I_VCVTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30584, 296}, + {I_VCVTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30592, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSH2SS[] = { + {I_VCVTSH2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+30600, 296}, + {I_VCVTSH2SS, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+30608, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSH2USI[] = { + {I_VCVTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30616, 296}, + {I_VCVTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30624, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSI2SH[] = { + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30632, 296}, + {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30640, 296}, + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30648, 296}, + {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30656, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTSS2SH[] = { + {I_VCVTSS2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+30664, 296}, + {I_VCVTSS2SH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+30672, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2DQ[] = { + {I_VCVTTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30680, 295}, + {I_VCVTTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30688, 295}, + {I_VCVTTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30696, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2QQ[] = { + {I_VCVTTPH2QQ, 2, {XMM_L16,RM_XMM_L16|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30704, 295}, + {I_VCVTTPH2QQ, 2, {YMM_L16,RM_XMM_L16|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30712, 295}, + {I_VCVTTPH2QQ, 2, {ZMM_L16,RM_XMM_L16|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30720, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2UDQ[] = { + {I_VCVTTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30728, 295}, + {I_VCVTTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30736, 295}, + {I_VCVTTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30744, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2UQQ[] = { + {I_VCVTTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30752, 295}, + {I_VCVTTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30760, 295}, + {I_VCVTTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30768, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2UW[] = { + {I_VCVTTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30776, 295}, + {I_VCVTTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30784, 295}, + {I_VCVTTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30792, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTPH2W[] = { + {I_VCVTTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30800, 295}, + {I_VCVTTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30808, 295}, + {I_VCVTTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+30816, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSH2SI[] = { + {I_VCVTTSH2SI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30824, 296}, + {I_VCVTTSH2SI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30832, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTTSH2USI[] = { + {I_VCVTTSH2USI, 2, {REG_GPR|BITS32,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30840, 296}, + {I_VCVTTSH2USI, 2, {REG_GPR|BITS64,RM_XMM_L16|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+30848, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUDQ2PH[] = { + {I_VCVTUDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30856, 295}, + {I_VCVTUDQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30864, 295}, + {I_VCVTUDQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30872, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUQQ2PH[] = { + {I_VCVTUQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30880, 295}, + {I_VCVTUQQ2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30888, 295}, + {I_VCVTUQQ2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30896, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUSI2SH[] = { + {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,ER,ER,0,0}, nasm_bytecodes+30904, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTUW2PH[] = { + {I_VCVTUW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30920, 295}, + {I_VCVTUW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30928, 295}, + {I_VCVTUW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30936, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VCVTW2PH[] = { + {I_VCVTW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30944, 295}, + {I_VCVTW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30952, 295}, + {I_VCVTW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+30960, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVPH[] = { + {I_VDIVPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30968, 295}, + {I_VDIVPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30976, 295}, + {I_VDIVPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+30984, 295}, + {I_VDIVPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+30992, 295}, + {I_VDIVPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31000, 296}, + {I_VDIVPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31008, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VDIVSH[] = { + {I_VDIVSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31016, 296}, + {I_VDIVSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31024, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFCMADDCPH[] = { + {I_VFCMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31032, 295}, + {I_VFCMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31040, 295}, + {I_VFCMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31048, 295}, + {I_VFCMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31056, 295}, + {I_VFCMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31064, 295}, + {I_VFCMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31072, 295}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDCPH[] = { + {I_VFMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31080, 295}, + {I_VFMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31088, 295}, + {I_VFMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31096, 295}, + {I_VFMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31104, 295}, + {I_VFMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31112, 295}, + {I_VFMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31120, 295}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFCMADDCSH[] = { + {I_VFCMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31128, 296}, + {I_VFCMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31136, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDCSH[] = { + {I_VFMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31144, 296}, + {I_VFMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31152, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFCMULCPCH[] = { + {I_VFCMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31160, 295}, + {I_VFCMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31168, 295}, + {I_VFCMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31176, 295}, + {I_VFCMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31184, 295}, + {I_VFCMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31192, 295}, + {I_VFCMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31200, 295}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMULCPCH[] = { + {I_VFMULCPCH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31208, 295}, + {I_VFMULCPCH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31216, 295}, + {I_VFMULCPCH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+31224, 295}, + {I_VFMULCPCH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31232, 295}, + {I_VFMULCPCH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+31240, 295}, + {I_VFMULCPCH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31248, 295}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFCMULCSH[] = { + {I_VFCMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31256, 296}, + {I_VFCMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31264, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMULCSH[] = { + {I_VFMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31272, 296}, + {I_VFMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31280, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB132PH[] = { + {I_VFMADDSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31288, 295}, + {I_VFMADDSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31296, 295}, + {I_VFMADDSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31304, 295}, + {I_VFMADDSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31312, 295}, + {I_VFMADDSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31320, 296}, + {I_VFMADDSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31328, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB213PH[] = { + {I_VFMADDSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31336, 295}, + {I_VFMADDSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31344, 295}, + {I_VFMADDSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31352, 295}, + {I_VFMADDSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31360, 295}, + {I_VFMADDSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31368, 296}, + {I_VFMADDSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31376, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADDSUB231PH[] = { + {I_VFMADDSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31384, 295}, + {I_VFMADDSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31392, 295}, + {I_VFMADDSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31400, 295}, + {I_VFMADDSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31408, 295}, + {I_VFMADDSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31416, 296}, + {I_VFMADDSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31424, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD132PH[] = { + {I_VFMSUBADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31432, 295}, + {I_VFMSUBADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31440, 295}, + {I_VFMSUBADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31448, 295}, + {I_VFMSUBADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31456, 295}, + {I_VFMSUBADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31464, 296}, + {I_VFMSUBADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31472, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD213PH[] = { + {I_VFMSUBADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31480, 295}, + {I_VFMSUBADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31488, 295}, + {I_VFMSUBADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31496, 295}, + {I_VFMSUBADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31504, 295}, + {I_VFMSUBADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31512, 296}, + {I_VFMSUBADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31520, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUBADD231PH[] = { + {I_VFMSUBADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31528, 295}, + {I_VFMSUBADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31536, 295}, + {I_VFMSUBADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31544, 295}, + {I_VFMSUBADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31552, 295}, + {I_VFMSUBADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31560, 296}, + {I_VFMSUBADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31568, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD132PH[] = { + {I_VPMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31576, 295}, + {I_VPMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31584, 295}, + {I_VPMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31592, 295}, + {I_VPMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31600, 295}, + {I_VPMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31608, 296}, + {I_VPMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31616, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD213PH[] = { + {I_VPMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31624, 295}, + {I_VPMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31632, 295}, + {I_VPMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31640, 295}, + {I_VPMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31648, 295}, + {I_VPMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31656, 296}, + {I_VPMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31664, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD231PH[] = { + {I_VPMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31672, 295}, + {I_VPMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31680, 295}, + {I_VPMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31688, 295}, + {I_VPMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31696, 295}, + {I_VPMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31704, 296}, + {I_VPMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31712, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD132PH[] = { + {I_VFMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31720, 295}, + {I_VFMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31728, 295}, + {I_VFMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31736, 295}, + {I_VFMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31744, 295}, + {I_VFMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31752, 296}, + {I_VFMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31760, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD213PH[] = { + {I_VFMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31768, 295}, + {I_VFMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31776, 295}, + {I_VFMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31784, 295}, + {I_VFMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31792, 295}, + {I_VFMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31800, 296}, + {I_VFMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31808, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMADD231PH[] = { + {I_VFMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31816, 295}, + {I_VFMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31824, 295}, + {I_VFMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31832, 295}, + {I_VFMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31840, 295}, + {I_VFMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31848, 296}, + {I_VFMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+31856, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD132SH[] = { + {I_VPMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31864, 296}, + {I_VPMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31872, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD213SH[] = { + {I_VPMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31880, 296}, + {I_VPMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31888, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMADD231SH[] = { + {I_VPMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31896, 296}, + {I_VPMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31904, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMADD132SH[] = { + {I_VPNMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31912, 296}, + {I_VPNMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31920, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMADD213SH[] = { + {I_VPNMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31928, 296}, + {I_VPNMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31936, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMADD231SH[] = { + {I_VPNMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31944, 296}, + {I_VPNMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31952, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB132PH[] = { + {I_VPMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31960, 295}, + {I_VPMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31968, 295}, + {I_VPMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+31976, 295}, + {I_VPMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+31984, 295}, + {I_VPMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+31992, 296}, + {I_VPMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32000, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB213PH[] = { + {I_VPMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32008, 295}, + {I_VPMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32016, 295}, + {I_VPMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32024, 295}, + {I_VPMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32032, 295}, + {I_VPMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32040, 296}, + {I_VPMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32048, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB231PH[] = { + {I_VPMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32056, 295}, + {I_VPMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32064, 295}, + {I_VPMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32072, 295}, + {I_VPMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32080, 295}, + {I_VPMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32088, 296}, + {I_VPMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32096, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB132PH[] = { + {I_VFMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32104, 295}, + {I_VFMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32112, 295}, + {I_VFMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32120, 295}, + {I_VFMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32128, 295}, + {I_VFMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32136, 296}, + {I_VFMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32144, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB213PH[] = { + {I_VFMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32152, 295}, + {I_VFMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32160, 295}, + {I_VFMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32168, 295}, + {I_VFMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32176, 295}, + {I_VFMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32184, 296}, + {I_VFMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32192, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFMSUB231PH[] = { + {I_VFMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32200, 295}, + {I_VFMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32208, 295}, + {I_VFMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32216, 295}, + {I_VFMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32224, 295}, + {I_VFMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32232, 296}, + {I_VFMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32240, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB132SH[] = { + {I_VPMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32248, 296}, + {I_VPMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32256, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB213SH[] = { + {I_VPMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32264, 296}, + {I_VPMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32272, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPMSUB231SH[] = { + {I_VPMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32280, 296}, + {I_VPMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32288, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMSUB132SH[] = { + {I_VPNMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32296, 296}, + {I_VPNMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32304, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMSUB213SH[] = { + {I_VPNMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32312, 296}, + {I_VPNMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32320, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VPNMSUB231SH[] = { + {I_VPNMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32328, 296}, + {I_VPNMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32336, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSPH[] = { + {I_VFPCLASSPH, 3, {KREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12097, 295}, + {I_VFPCLASSPH, 3, {KREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12106, 295}, + {I_VFPCLASSPH, 3, {KREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+12115, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VFPCLASSSH[] = { + {I_VFPCLASSSH, 3, {KREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+12124, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPPH[] = { + {I_VGETEXPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32344, 295}, + {I_VGETEXPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32352, 295}, + {I_VGETEXPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32360, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETEXPSH[] = { + {I_VGETEXPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32368, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTPH[] = { + {I_VGETMANTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12133, 295}, + {I_VGETMANTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12142, 295}, + {I_VGETMANTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12151, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMANTSH[] = { + {I_VGETMANTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12160, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMAXPH[] = { + {I_VGETMAXPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32376, 295}, + {I_VGETMAXPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32384, 295}, + {I_VGETMAXPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32392, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMAXSH[] = { + {I_VGETMAXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32400, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMINPH[] = { + {I_VGETMINPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32408, 295}, + {I_VGETMINPH, 2, {YMMREG,RM_XMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32416, 295}, + {I_VGETMINPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+32424, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VGETMINSH[] = { + {I_VGETMINSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32432, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVSH[] = { + {I_VMOVSH, 2, {XMMREG,MEMORY|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32440, 296}, + {I_VMOVSH, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+32448, 296}, + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32456, 296}, + {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32464, 296}, + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32472, 296}, + {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32480, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMOVW[] = { + {I_VMOVW, 2, {XMMREG,RM_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32488, 296}, + {I_VMOVW, 2, {RM_GPR|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+32496, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULPH[] = { + {I_VMULPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32504, 295}, + {I_VMULPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32512, 295}, + {I_VMULPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32520, 295}, + {I_VMULPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32528, 295}, + {I_VMULPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32536, 296}, + {I_VMULPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32544, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VMULSH[] = { + {I_VMULSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32552, 296}, + {I_VMULSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32560, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCPPH[] = { + {I_VRCPPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32568, 295}, + {I_VRCPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32576, 295}, + {I_VRCPPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32584, 295}, + {I_VRCPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32592, 295}, + {I_VRCPPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32600, 296}, + {I_VRCPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32608, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRCPSH[] = { + {I_VRCPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+32616, 296}, + {I_VRCPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+32624, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCEPH[] = { + {I_VREDUCEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12169, 295}, + {I_VREDUCEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12178, 295}, + {I_VREDUCEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12187, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VREDUCESH[] = { + {I_VREDUCESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12196, 296}, + {I_VREDUCESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12205, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VENDSCALEPH[] = { + {I_VENDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12214, 295}, + {I_VENDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12223, 295}, + {I_VENDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12232, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VENDSCALESH[] = { + {I_VENDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12241, 296}, + {I_VENDSCALESH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12250, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRTPH[] = { + {I_VRSQRTPH, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12259, 295}, + {I_VRSQRTPH, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+12268, 295}, + {I_VRSQRTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMMEDIATE|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+12277, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VRSQRTSH[] = { + {I_VRSQRTSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+12286, 296}, + {I_VRSQRTSH, 3, {XMMREG,RM_XMM|BITS16,IMMEDIATE|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+12295, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFPH[] = { + {I_VSCALEFPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32632, 295}, + {I_VSCALEFPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32640, 295}, + {I_VSCALEFPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32648, 295}, + {I_VSCALEFPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32656, 295}, + {I_VSCALEFPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32664, 296}, + {I_VSCALEFPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32672, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSCALEFSH[] = { + {I_VSCALEFSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32680, 296}, + {I_VSCALEFSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32688, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTPH[] = { + {I_VSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32696, 295}, + {I_VSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32704, 295}, + {I_VSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32712, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSQRTSH[] = { + {I_VSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32720, 296}, + {I_VSQRTSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32728, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBPH[] = { + {I_VSUBPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32736, 295}, + {I_VSUBPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32744, 295}, + {I_VSUBPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+32752, 295}, + {I_VSUBPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+32760, 295}, + {I_VSUBPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+32768, 296}, + {I_VSUBPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+32776, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VSUBSH[] = { + {I_VSUBSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32784, 296}, + {I_VSUBSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32792, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_VUCOMISH[] = { + {I_VUCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32800, 296}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AADD[] = { + {I_AADD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32808, 299}, + {I_AADD, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32816, 300}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AAND[] = { + {I_AAND, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32824, 299}, + {I_AAND, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32832, 300}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_AXOR[] = { + {I_AXOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+32840, 299}, + {I_AXOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+32848, 300}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CLUI[] = { + {I_CLUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46071, 301}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_SENDUIPI[] = { + {I_SENDUIPI, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+42510, 301}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_STUI[] = { + {I_STUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46077, 301}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_TESTUI[] = { + {I_TESTUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46083, 301}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_UIRET[] = { + {I_UIRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46089, 301}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPAXADD[] = { + {I_CMPAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42517, 302}, + {I_CMPAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42629, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPAEXADD[] = { + {I_CMPAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42524, 302}, + {I_CMPAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42636, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPBXADD[] = { + {I_CMPBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42531, 302}, + {I_CMPBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42643, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPBEXADD[] = { + {I_CMPBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42538, 302}, + {I_CMPBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42650, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPCXADD[] = { + {I_CMPCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42531, 302}, + {I_CMPCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42643, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPEXADD[] = { + {I_CMPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42545, 302}, + {I_CMPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42657, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPGXADD[] = { + {I_CMPGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42552, 302}, + {I_CMPGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42664, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPGEXADD[] = { + {I_CMPGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42559, 302}, + {I_CMPGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42671, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLXADD[] = { + {I_CMPLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42566, 302}, + {I_CMPLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42678, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPLEXADD[] = { + {I_CMPLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42573, 302}, + {I_CMPLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42685, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNAXADD[] = { + {I_CMPNAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42538, 302}, + {I_CMPNAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42650, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNAEXADD[] = { + {I_CMPNAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42531, 302}, + {I_CMPNAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42643, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNBXADD[] = { + {I_CMPNBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42524, 302}, + {I_CMPNBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42636, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNBEXADD[] = { + {I_CMPNBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42517, 302}, + {I_CMPNBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42629, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNCXADD[] = { + {I_CMPNCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42524, 302}, + {I_CMPNCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42636, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNEXADD[] = { + {I_CMPNEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42580, 302}, + {I_CMPNEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42692, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNGXADD[] = { + {I_CMPNGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42573, 302}, + {I_CMPNGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42685, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNGEXADD[] = { + {I_CMPNGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42566, 302}, + {I_CMPNGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42678, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLXADD[] = { + {I_CMPNLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42559, 302}, + {I_CMPNLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42671, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNLEXADD[] = { + {I_CMPNLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42552, 302}, + {I_CMPNLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42664, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNOXADD[] = { + {I_CMPNOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42587, 302}, + {I_CMPNOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42699, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNPXADD[] = { + {I_CMPNPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42594, 302}, + {I_CMPNPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42706, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNSXADD[] = { + {I_CMPNSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42601, 302}, + {I_CMPNSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42713, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPNZXADD[] = { + {I_CMPNZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42580, 302}, + {I_CMPNZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42692, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPOXADD[] = { + {I_CMPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42608, 302}, + {I_CMPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42720, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPPXADD[] = { + {I_CMPPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42615, 302}, + {I_CMPPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42727, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPPEXADD[] = { + {I_CMPPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42615, 302}, + {I_CMPPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42727, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPPOXADD[] = { + {I_CMPPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42594, 302}, + {I_CMPPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42706, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPSXADD[] = { + {I_CMPSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42622, 302}, + {I_CMPSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42734, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_CMPZXADD[] = { + {I_CMPZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+42545, 302}, + {I_CMPZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+42657, 303}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRMSRNS[] = { + {I_WRMSRNS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46095, 304}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_RDMSRLIST[] = { + {I_RDMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46101, 305}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_WRMSRLIST[] = { + {I_WRMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46107, 305}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HRESET[] = { + {I_HRESET, 2, {IMMEDIATE,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+32856, 306}, + {I_HRESET, 1, {IMMEDIATE,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+32856, 306}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP0[] = { + {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46113, 307}, + {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46119, 307}, + {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46125, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP1[] = { + {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46131, 307}, + {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46137, 307}, + {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46143, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP2[] = { + {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46149, 307}, + {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46155, 307}, + {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46161, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP3[] = { + {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46167, 307}, + {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46173, 307}, + {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46179, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP4[] = { + {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46185, 307}, + {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46191, 307}, + {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46197, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP5[] = { + {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46203, 307}, + {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46209, 307}, + {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46215, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP6[] = { + {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46221, 307}, + {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46227, 307}, + {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46233, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP7[] = { + {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46239, 307}, + {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46245, 307}, + {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46251, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP8[] = { + {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46257, 307}, + {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46263, 307}, + {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46269, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP9[] = { + {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46275, 307}, + {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46281, 307}, + {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46287, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP10[] = { + {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46293, 307}, + {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46299, 307}, + {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46305, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP11[] = { + {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46311, 307}, + {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46317, 307}, + {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46323, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP12[] = { + {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46329, 307}, + {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46335, 307}, + {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46341, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP13[] = { + {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46347, 307}, + {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46353, 307}, + {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46359, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP14[] = { + {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46365, 307}, + {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46371, 307}, + {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46377, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP15[] = { + {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46383, 307}, + {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46389, 307}, + {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46395, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP16[] = { + {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46401, 307}, + {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46407, 307}, + {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46413, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP17[] = { + {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46419, 307}, + {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46425, 307}, + {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46431, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP18[] = { + {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46437, 307}, + {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46443, 307}, + {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46449, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP19[] = { + {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46455, 307}, + {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46461, 307}, + {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46467, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP20[] = { + {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46473, 307}, + {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46479, 307}, + {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46485, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP21[] = { + {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46491, 307}, + {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46497, 307}, + {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46503, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP22[] = { + {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46509, 307}, + {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46515, 307}, + {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46521, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP23[] = { + {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46527, 307}, + {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46533, 307}, + {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46539, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP24[] = { + {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46545, 307}, + {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46551, 307}, + {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46557, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP25[] = { + {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46563, 307}, + {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46569, 307}, + {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46575, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP26[] = { + {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46581, 307}, + {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46587, 307}, + {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46593, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP27[] = { + {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46599, 307}, + {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46605, 307}, + {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46611, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP28[] = { + {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46617, 307}, + {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46623, 307}, + {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46629, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP29[] = { + {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46635, 307}, + {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46641, 307}, + {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46647, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP30[] = { + {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46653, 307}, + {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46659, 307}, + {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46665, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP31[] = { + {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46671, 307}, + {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46677, 307}, + {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46683, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP32[] = { + {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46689, 307}, + {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46695, 307}, + {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46701, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP33[] = { + {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46707, 307}, + {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46713, 307}, + {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46719, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP34[] = { + {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46725, 307}, + {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46731, 307}, + {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46737, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP35[] = { + {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46743, 307}, + {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46749, 307}, + {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46755, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP36[] = { + {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46761, 307}, + {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46767, 307}, + {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46773, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP37[] = { + {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46779, 307}, + {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46785, 307}, + {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46791, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP38[] = { + {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46797, 307}, + {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46803, 307}, + {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46809, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP39[] = { + {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46815, 307}, + {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46821, 307}, + {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46827, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP40[] = { + {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46833, 307}, + {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46839, 307}, + {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46845, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP41[] = { + {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46851, 307}, + {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46857, 307}, + {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46863, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP42[] = { + {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46869, 307}, + {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46875, 307}, + {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46881, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP43[] = { + {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46887, 307}, + {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46893, 307}, + {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46899, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP44[] = { + {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46905, 307}, + {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46911, 307}, + {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46917, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP45[] = { + {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46923, 307}, + {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46929, 307}, + {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46935, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP46[] = { + {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46941, 307}, + {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46947, 307}, + {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46953, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP47[] = { + {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46959, 307}, + {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46965, 307}, + {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46971, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP48[] = { + {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46977, 307}, + {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46983, 307}, + {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46989, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP49[] = { + {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+46995, 307}, + {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47001, 307}, + {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47007, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP50[] = { + {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47013, 307}, + {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47019, 307}, + {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47025, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP51[] = { + {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47031, 307}, + {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47037, 307}, + {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47043, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP52[] = { + {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47049, 307}, + {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47055, 307}, + {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47061, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP53[] = { + {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47067, 307}, + {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47073, 307}, + {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47079, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP54[] = { + {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47085, 307}, + {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47091, 307}, + {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47097, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP55[] = { + {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47103, 307}, + {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47109, 307}, + {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47115, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP56[] = { + {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43437, 307}, + {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43443, 307}, + {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+43449, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP57[] = { + {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47121, 307}, + {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47127, 307}, + {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47133, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP58[] = { + {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47139, 307}, + {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47145, 307}, + {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47151, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP59[] = { + {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47157, 307}, + {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47163, 307}, + {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47169, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP60[] = { + {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47175, 307}, + {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47181, 307}, + {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47187, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP61[] = { + {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47193, 307}, + {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47199, 307}, + {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47205, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP62[] = { + {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47211, 307}, + {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47217, 307}, + {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47223, 308}, + ITEMPLATE_END +}; + +static const struct itemplate instrux_HINT_NOP63[] = { + {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47229, 307}, + {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47235, 307}, + {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+47241, 308}, + ITEMPLATE_END +}; + +const struct itemplate * const nasm_instructions[] = { + instrux_DB, + instrux_DW, + instrux_DD, + instrux_DQ, + instrux_DT, + instrux_DO, + instrux_DY, + instrux_DZ, + instrux_RESB, + instrux_RESW, + instrux_RESD, + instrux_RESQ, + instrux_REST, + instrux_RESO, + instrux_RESY, + instrux_RESZ, + instrux_INCBIN, + instrux_AAA, + instrux_AAD, + instrux_AAM, + instrux_AAS, + instrux_ADC, + instrux_ADD, + instrux_AND, + instrux_ARPL, + instrux_BB0_RESET, + instrux_BB1_RESET, + instrux_BOUND, + instrux_BSF, + instrux_BSR, + instrux_BSWAP, + instrux_BT, + instrux_BTC, + instrux_BTR, + instrux_BTS, + instrux_CALL, + instrux_CBW, + instrux_CDQ, + instrux_CDQE, + instrux_CLC, + instrux_CLD, + instrux_CLI, + instrux_CLTS, + instrux_CMC, + instrux_CMP, + instrux_CMPSB, + instrux_CMPSD, + instrux_CMPSQ, + instrux_CMPSW, + instrux_CMPXCHG, + instrux_CMPXCHG486, + instrux_CMPXCHG8B, + instrux_CMPXCHG16B, + instrux_CPUID, + instrux_CPU_READ, + instrux_CPU_WRITE, + instrux_CQO, + instrux_CWD, + instrux_CWDE, + instrux_DAA, + instrux_DAS, + instrux_DEC, + instrux_DIV, + instrux_DMINT, + instrux_EMMS, + instrux_ENTER, + instrux_EQU, + instrux_F2XM1, + instrux_FABS, + instrux_FADD, + instrux_FADDP, + instrux_FBLD, + instrux_FBSTP, + instrux_FCHS, + instrux_FCLEX, + instrux_FCMOVB, + instrux_FCMOVBE, + instrux_FCMOVE, + instrux_FCMOVNB, + instrux_FCMOVNBE, + instrux_FCMOVNE, + instrux_FCMOVNU, + instrux_FCMOVU, + instrux_FCOM, + instrux_FCOMI, + instrux_FCOMIP, + instrux_FCOMP, + instrux_FCOMPP, + instrux_FCOS, + instrux_FDECSTP, + instrux_FDISI, + instrux_FDIV, + instrux_FDIVP, + instrux_FDIVR, + instrux_FDIVRP, + instrux_FEMMS, + instrux_FENI, + instrux_FFREE, + instrux_FFREEP, + instrux_FIADD, + instrux_FICOM, + instrux_FICOMP, + instrux_FIDIV, + instrux_FIDIVR, + instrux_FILD, + instrux_FIMUL, + instrux_FINCSTP, + instrux_FINIT, + instrux_FIST, + instrux_FISTP, + instrux_FISTTP, + instrux_FISUB, + instrux_FISUBR, + instrux_FLD, + instrux_FLD1, + instrux_FLDCW, + instrux_FLDENV, + instrux_FLDL2E, + instrux_FLDL2T, + instrux_FLDLG2, + instrux_FLDLN2, + instrux_FLDPI, + instrux_FLDZ, + instrux_FMUL, + instrux_FMULP, + instrux_FNCLEX, + instrux_FNDISI, + instrux_FNENI, + instrux_FNINIT, + instrux_FNOP, + instrux_FNSAVE, + instrux_FNSTCW, + instrux_FNSTENV, + instrux_FNSTSW, + instrux_FPATAN, + instrux_FPREM, + instrux_FPREM1, + instrux_FPTAN, + instrux_FRNDINT, + instrux_FRSTOR, + instrux_FSAVE, + instrux_FSCALE, + instrux_FSETPM, + instrux_FSIN, + instrux_FSINCOS, + instrux_FSQRT, + instrux_FST, + instrux_FSTCW, + instrux_FSTENV, + instrux_FSTP, + instrux_FSTSW, + instrux_FSUB, + instrux_FSUBP, + instrux_FSUBR, + instrux_FSUBRP, + instrux_FTST, + instrux_FUCOM, + instrux_FUCOMI, + instrux_FUCOMIP, + instrux_FUCOMP, + instrux_FUCOMPP, + instrux_FXAM, + instrux_FXCH, + instrux_FXTRACT, + instrux_FYL2X, + instrux_FYL2XP1, + instrux_HLT, + instrux_IBTS, + instrux_ICEBP, + instrux_IDIV, + instrux_IMUL, + instrux_IN, + instrux_INC, + instrux_INSB, + instrux_INSD, + instrux_INSW, + instrux_INT, + instrux_INT01, + instrux_INT1, + instrux_INT03, + instrux_INT3, + instrux_INTO, + instrux_INVD, + instrux_INVPCID, + instrux_INVLPG, + instrux_INVLPGA, + instrux_IRET, + instrux_IRETD, + instrux_IRETQ, + instrux_IRETW, + instrux_JCXZ, + instrux_JECXZ, + instrux_JRCXZ, + instrux_JMP, + instrux_JMPE, + instrux_LAHF, + instrux_LAR, + instrux_LDS, + instrux_LEA, + instrux_LEAVE, + instrux_LES, + instrux_LFENCE, + instrux_LFS, + instrux_LGDT, + instrux_LGS, + instrux_LIDT, + instrux_LLDT, + instrux_LMSW, + instrux_LOADALL, + instrux_LOADALL286, + instrux_LODSB, + instrux_LODSD, + instrux_LODSQ, + instrux_LODSW, + instrux_LOOP, + instrux_LOOPE, + instrux_LOOPNE, + instrux_LOOPNZ, + instrux_LOOPZ, + instrux_LSL, + instrux_LSS, + instrux_LTR, + instrux_MFENCE, + instrux_MONITOR, + instrux_MONITORX, + instrux_MOV, + instrux_MOVD, + instrux_MOVQ, + instrux_MOVSB, + instrux_MOVSD, + instrux_MOVSQ, + instrux_MOVSW, + instrux_MOVSX, + instrux_MOVSXD, + instrux_MOVZX, + instrux_MUL, + instrux_MWAIT, + instrux_MWAITX, + instrux_NEG, + instrux_NOP, + instrux_NOT, + instrux_OR, + instrux_OUT, + instrux_OUTSB, + instrux_OUTSD, + instrux_OUTSW, + instrux_PACKSSDW, + instrux_PACKSSWB, + instrux_PACKUSWB, + instrux_PADDB, + instrux_PADDD, + instrux_PADDSB, + instrux_PADDSIW, + instrux_PADDSW, + instrux_PADDUSB, + instrux_PADDUSW, + instrux_PADDW, + instrux_PAND, + instrux_PANDN, + instrux_PAUSE, + instrux_PAVEB, + instrux_PAVGUSB, + instrux_PCMPEQB, + instrux_PCMPEQD, + instrux_PCMPEQW, + instrux_PCMPGTB, + instrux_PCMPGTD, + instrux_PCMPGTW, + instrux_PDISTIB, + instrux_PF2ID, + instrux_PFACC, + instrux_PFADD, + instrux_PFCMPEQ, + instrux_PFCMPGE, + instrux_PFCMPGT, + instrux_PFMAX, + instrux_PFMIN, + instrux_PFMUL, + instrux_PFRCP, + instrux_PFRCPIT1, + instrux_PFRCPIT2, + instrux_PFRSQIT1, + instrux_PFRSQRT, + instrux_PFSUB, + instrux_PFSUBR, + instrux_PI2FD, + instrux_PMACHRIW, + instrux_PMADDWD, + instrux_PMAGW, + instrux_PMULHRIW, + instrux_PMULHRWA, + instrux_PMULHRWC, + instrux_PMULHW, + instrux_PMULLW, + instrux_PMVGEZB, + instrux_PMVLZB, + instrux_PMVNZB, + instrux_PMVZB, + instrux_POP, + instrux_POPA, + instrux_POPAD, + instrux_POPAW, + instrux_POPF, + instrux_POPFD, + instrux_POPFQ, + instrux_POPFW, + instrux_POR, + instrux_PREFETCH, + instrux_PREFETCHW, + instrux_PSLLD, + instrux_PSLLQ, + instrux_PSLLW, + instrux_PSRAD, + instrux_PSRAW, + instrux_PSRLD, + instrux_PSRLQ, + instrux_PSRLW, + instrux_PSUBB, + instrux_PSUBD, + instrux_PSUBSB, + instrux_PSUBSIW, + instrux_PSUBSW, + instrux_PSUBUSB, + instrux_PSUBUSW, + instrux_PSUBW, + instrux_PUNPCKHBW, + instrux_PUNPCKHDQ, + instrux_PUNPCKHWD, + instrux_PUNPCKLBW, + instrux_PUNPCKLDQ, + instrux_PUNPCKLWD, + instrux_PUSH, + instrux_PUSHA, + instrux_PUSHAD, + instrux_PUSHAW, + instrux_PUSHF, + instrux_PUSHFD, + instrux_PUSHFQ, + instrux_PUSHFW, + instrux_PXOR, + instrux_RCL, + instrux_RCR, + instrux_RDSHR, + instrux_RDMSR, + instrux_RDPMC, + instrux_RDTSC, + instrux_RDTSCP, + instrux_RET, + instrux_RETF, + instrux_RETN, + instrux_RETW, + instrux_RETFW, + instrux_RETNW, + instrux_RETD, + instrux_RETFD, + instrux_RETND, + instrux_RETQ, + instrux_RETFQ, + instrux_RETNQ, + instrux_ROL, + instrux_ROR, + instrux_RDM, + instrux_RSDC, + instrux_RSLDT, + instrux_RSM, + instrux_RSTS, + instrux_SAHF, + instrux_SAL, + instrux_SALC, + instrux_SAR, + instrux_SBB, + instrux_SCASB, + instrux_SCASD, + instrux_SCASQ, + instrux_SCASW, + instrux_SFENCE, + instrux_SGDT, + instrux_SHL, + instrux_SHLD, + instrux_SHR, + instrux_SHRD, + instrux_SIDT, + instrux_SLDT, + instrux_SKINIT, + instrux_SMI, + instrux_SMINT, + instrux_SMINTOLD, + instrux_SMSW, + instrux_STC, + instrux_STD, + instrux_STI, + instrux_STOSB, + instrux_STOSD, + instrux_STOSQ, + instrux_STOSW, + instrux_STR, + instrux_SUB, + instrux_SVDC, + instrux_SVLDT, + instrux_SVTS, + instrux_SWAPGS, + instrux_SYSCALL, + instrux_SYSENTER, + instrux_SYSEXIT, + instrux_SYSRET, + instrux_TEST, + instrux_UD0, + instrux_UD1, + instrux_UD2B, + instrux_UD2, + instrux_UD2A, + instrux_UMOV, + instrux_VERR, + instrux_VERW, + instrux_FWAIT, + instrux_WBINVD, + instrux_WRSHR, + instrux_WRMSR, + instrux_XADD, + instrux_XBTS, + instrux_XCHG, + instrux_XLATB, + instrux_XLAT, + instrux_XOR, + instrux_CMOVA, + instrux_CMOVAE, + instrux_CMOVB, + instrux_CMOVBE, + instrux_CMOVC, + instrux_CMOVE, + instrux_CMOVG, + instrux_CMOVGE, + instrux_CMOVL, + instrux_CMOVLE, + instrux_CMOVNA, + instrux_CMOVNAE, + instrux_CMOVNB, + instrux_CMOVNBE, + instrux_CMOVNC, + instrux_CMOVNE, + instrux_CMOVNG, + instrux_CMOVNGE, + instrux_CMOVNL, + instrux_CMOVNLE, + instrux_CMOVNO, + instrux_CMOVNP, + instrux_CMOVNS, + instrux_CMOVNZ, + instrux_CMOVO, + instrux_CMOVP, + instrux_CMOVPE, + instrux_CMOVPO, + instrux_CMOVS, + instrux_CMOVZ, + instrux_JA, + instrux_JAE, + instrux_JB, + instrux_JBE, + instrux_JC, + instrux_JE, + instrux_JG, + instrux_JGE, + instrux_JL, + instrux_JLE, + instrux_JNA, + instrux_JNAE, + instrux_JNB, + instrux_JNBE, + instrux_JNC, + instrux_JNE, + instrux_JNG, + instrux_JNGE, + instrux_JNL, + instrux_JNLE, + instrux_JNO, + instrux_JNP, + instrux_JNS, + instrux_JNZ, + instrux_JO, + instrux_JP, + instrux_JPE, + instrux_JPO, + instrux_JS, + instrux_JZ, + instrux_SETA, + instrux_SETAE, + instrux_SETB, + instrux_SETBE, + instrux_SETC, + instrux_SETE, + instrux_SETG, + instrux_SETGE, + instrux_SETL, + instrux_SETLE, + instrux_SETNA, + instrux_SETNAE, + instrux_SETNB, + instrux_SETNBE, + instrux_SETNC, + instrux_SETNE, + instrux_SETNG, + instrux_SETNGE, + instrux_SETNL, + instrux_SETNLE, + instrux_SETNO, + instrux_SETNP, + instrux_SETNS, + instrux_SETNZ, + instrux_SETO, + instrux_SETP, + instrux_SETPE, + instrux_SETPO, + instrux_SETS, + instrux_SETZ, + instrux_ADDPS, + instrux_ADDSS, + instrux_ANDNPS, + instrux_ANDPS, + instrux_CMPEQPS, + instrux_CMPEQSS, + instrux_CMPLEPS, + instrux_CMPLESS, + instrux_CMPLTPS, + instrux_CMPLTSS, + instrux_CMPNEQPS, + instrux_CMPNEQSS, + instrux_CMPNLEPS, + instrux_CMPNLESS, + instrux_CMPNLTPS, + instrux_CMPNLTSS, + instrux_CMPORDPS, + instrux_CMPORDSS, + instrux_CMPUNORDPS, + instrux_CMPUNORDSS, + instrux_CMPPS, + instrux_CMPSS, + instrux_COMISS, + instrux_CVTPI2PS, + instrux_CVTPS2PI, + instrux_CVTSI2SS, + instrux_CVTSS2SI, + instrux_CVTTPS2PI, + instrux_CVTTSS2SI, + instrux_DIVPS, + instrux_DIVSS, + instrux_LDMXCSR, + instrux_MAXPS, + instrux_MAXSS, + instrux_MINPS, + instrux_MINSS, + instrux_MOVAPS, + instrux_MOVHPS, + instrux_MOVLHPS, + instrux_MOVLPS, + instrux_MOVHLPS, + instrux_MOVMSKPS, + instrux_MOVNTPS, + instrux_MOVSS, + instrux_MOVUPS, + instrux_MULPS, + instrux_MULSS, + instrux_ORPS, + instrux_RCPPS, + instrux_RCPSS, + instrux_RSQRTPS, + instrux_RSQRTSS, + instrux_SHUFPS, + instrux_SQRTPS, + instrux_SQRTSS, + instrux_STMXCSR, + instrux_SUBPS, + instrux_SUBSS, + instrux_UCOMISS, + instrux_UNPCKHPS, + instrux_UNPCKLPS, + instrux_XORPS, + instrux_FXRSTOR, + instrux_FXRSTOR64, + instrux_FXSAVE, + instrux_FXSAVE64, + instrux_XGETBV, + instrux_XSETBV, + instrux_XSAVE, + instrux_XSAVE64, + instrux_XSAVEC, + instrux_XSAVEC64, + instrux_XSAVEOPT, + instrux_XSAVEOPT64, + instrux_XSAVES, + instrux_XSAVES64, + instrux_XRSTOR, + instrux_XRSTOR64, + instrux_XRSTORS, + instrux_XRSTORS64, + instrux_PREFETCHNTA, + instrux_PREFETCHT0, + instrux_PREFETCHT1, + instrux_PREFETCHT2, + instrux_PREFETCHIT0, + instrux_PREFETCHIT1, + instrux_MASKMOVQ, + instrux_MOVNTQ, + instrux_PAVGB, + instrux_PAVGW, + instrux_PEXTRW, + instrux_PINSRW, + instrux_PMAXSW, + instrux_PMAXUB, + instrux_PMINSW, + instrux_PMINUB, + instrux_PMOVMSKB, + instrux_PMULHUW, + instrux_PSADBW, + instrux_PSHUFW, + instrux_PF2IW, + instrux_PFNACC, + instrux_PFPNACC, + instrux_PI2FW, + instrux_PSWAPD, + instrux_MASKMOVDQU, + instrux_CLFLUSH, + instrux_MOVNTDQ, + instrux_MOVNTI, + instrux_MOVNTPD, + instrux_MOVDQA, + instrux_MOVDQU, + instrux_MOVDQ2Q, + instrux_MOVQ2DQ, + instrux_PADDQ, + instrux_PMULUDQ, + instrux_PSHUFD, + instrux_PSHUFHW, + instrux_PSHUFLW, + instrux_PSLLDQ, + instrux_PSRLDQ, + instrux_PSUBQ, + instrux_PUNPCKHQDQ, + instrux_PUNPCKLQDQ, + instrux_ADDPD, + instrux_ADDSD, + instrux_ANDNPD, + instrux_ANDPD, + instrux_CMPEQPD, + instrux_CMPEQSD, + instrux_CMPLEPD, + instrux_CMPLESD, + instrux_CMPLTPD, + instrux_CMPLTSD, + instrux_CMPNEQPD, + instrux_CMPNEQSD, + instrux_CMPNLEPD, + instrux_CMPNLESD, + instrux_CMPNLTPD, + instrux_CMPNLTSD, + instrux_CMPORDPD, + instrux_CMPORDSD, + instrux_CMPUNORDPD, + instrux_CMPUNORDSD, + instrux_CMPPD, + instrux_COMISD, + instrux_CVTDQ2PD, + instrux_CVTDQ2PS, + instrux_CVTPD2DQ, + instrux_CVTPD2PI, + instrux_CVTPD2PS, + instrux_CVTPI2PD, + instrux_CVTPS2DQ, + instrux_CVTPS2PD, + instrux_CVTSD2SI, + instrux_CVTSD2SS, + instrux_CVTSI2SD, + instrux_CVTSS2SD, + instrux_CVTTPD2PI, + instrux_CVTTPD2DQ, + instrux_CVTTPS2DQ, + instrux_CVTTSD2SI, + instrux_DIVPD, + instrux_DIVSD, + instrux_MAXPD, + instrux_MAXSD, + instrux_MINPD, + instrux_MINSD, + instrux_MOVAPD, + instrux_MOVHPD, + instrux_MOVLPD, + instrux_MOVMSKPD, + instrux_MOVUPD, + instrux_MULPD, + instrux_MULSD, + instrux_ORPD, + instrux_SHUFPD, + instrux_SQRTPD, + instrux_SQRTSD, + instrux_SUBPD, + instrux_SUBSD, + instrux_UCOMISD, + instrux_UNPCKHPD, + instrux_UNPCKLPD, + instrux_XORPD, + instrux_ADDSUBPD, + instrux_ADDSUBPS, + instrux_HADDPD, + instrux_HADDPS, + instrux_HSUBPD, + instrux_HSUBPS, + instrux_LDDQU, + instrux_MOVDDUP, + instrux_MOVSHDUP, + instrux_MOVSLDUP, + instrux_CLGI, + instrux_STGI, + instrux_VMCALL, + instrux_VMCLEAR, + instrux_VMFUNC, + instrux_VMLAUNCH, + instrux_VMLOAD, + instrux_VMMCALL, + instrux_VMPTRLD, + instrux_VMPTRST, + instrux_VMREAD, + instrux_VMRESUME, + instrux_VMRUN, + instrux_VMSAVE, + instrux_VMWRITE, + instrux_VMXOFF, + instrux_VMXON, + instrux_INVEPT, + instrux_INVVPID, + instrux_PVALIDATE, + instrux_RMPADJUST, + instrux_VMGEXIT, + instrux_PABSB, + instrux_PABSW, + instrux_PABSD, + instrux_PALIGNR, + instrux_PHADDW, + instrux_PHADDD, + instrux_PHADDSW, + instrux_PHSUBW, + instrux_PHSUBD, + instrux_PHSUBSW, + instrux_PMADDUBSW, + instrux_PMULHRSW, + instrux_PSHUFB, + instrux_PSIGNB, + instrux_PSIGNW, + instrux_PSIGND, + instrux_EXTRQ, + instrux_INSERTQ, + instrux_MOVNTSD, + instrux_MOVNTSS, + instrux_LZCNT, + instrux_BLENDPD, + instrux_BLENDPS, + instrux_BLENDVPD, + instrux_BLENDVPS, + instrux_DPPD, + instrux_DPPS, + instrux_EXTRACTPS, + instrux_INSERTPS, + instrux_MOVNTDQA, + instrux_MPSADBW, + instrux_PACKUSDW, + instrux_PBLENDVB, + instrux_PBLENDW, + instrux_PCMPEQQ, + instrux_PEXTRB, + instrux_PEXTRD, + instrux_PEXTRQ, + instrux_PHMINPOSUW, + instrux_PINSRB, + instrux_PINSRD, + instrux_PINSRQ, + instrux_PMAXSB, + instrux_PMAXSD, + instrux_PMAXUD, + instrux_PMAXUW, + instrux_PMINSB, + instrux_PMINSD, + instrux_PMINUD, + instrux_PMINUW, + instrux_PMOVSXBW, + instrux_PMOVSXBD, + instrux_PMOVSXBQ, + instrux_PMOVSXWD, + instrux_PMOVSXWQ, + instrux_PMOVSXDQ, + instrux_PMOVZXBW, + instrux_PMOVZXBD, + instrux_PMOVZXBQ, + instrux_PMOVZXWD, + instrux_PMOVZXWQ, + instrux_PMOVZXDQ, + instrux_PMULDQ, + instrux_PMULLD, + instrux_PTEST, + instrux_ROUNDPD, + instrux_ROUNDPS, + instrux_ROUNDSD, + instrux_ROUNDSS, + instrux_CRC32, + instrux_PCMPESTRI, + instrux_PCMPESTRM, + instrux_PCMPISTRI, + instrux_PCMPISTRM, + instrux_PCMPGTQ, + instrux_POPCNT, + instrux_GETSEC, + instrux_PFRCPV, + instrux_PFRSQRTV, + instrux_MOVBE, + instrux_AESENC, + instrux_AESENCLAST, + instrux_AESDEC, + instrux_AESDECLAST, + instrux_AESIMC, + instrux_AESKEYGENASSIST, + instrux_VAESENC, + instrux_VAESENCLAST, + instrux_VAESDEC, + instrux_VAESDECLAST, + instrux_VAESIMC, + instrux_VAESKEYGENASSIST, + instrux_VADDPD, + instrux_VADDPS, + instrux_VADDSD, + instrux_VADDSS, + instrux_VADDSUBPD, + instrux_VADDSUBPS, + instrux_VANDPD, + instrux_VANDPS, + instrux_VANDNPD, + instrux_VANDNPS, + instrux_VBLENDPD, + instrux_VBLENDPS, + instrux_VBLENDVPD, + instrux_VBLENDVPS, + instrux_VBROADCASTSS, + instrux_VBROADCASTSD, + instrux_VBROADCASTF128, + instrux_VCMPEQ_OSPD, + instrux_VCMPEQPD, + instrux_VCMPLT_OSPD, + instrux_VCMPLTPD, + instrux_VCMPLE_OSPD, + instrux_VCMPLEPD, + instrux_VCMPUNORD_QPD, + instrux_VCMPUNORDPD, + instrux_VCMPNEQ_UQPD, + instrux_VCMPNEQPD, + instrux_VCMPNLT_USPD, + instrux_VCMPNLTPD, + instrux_VCMPNLE_USPD, + instrux_VCMPNLEPD, + instrux_VCMPORD_QPD, + instrux_VCMPORDPD, + instrux_VCMPEQ_UQPD, + instrux_VCMPNGE_USPD, + instrux_VCMPNGEPD, + instrux_VCMPNGT_USPD, + instrux_VCMPNGTPD, + instrux_VCMPFALSE_OQPD, + instrux_VCMPFALSEPD, + instrux_VCMPNEQ_OQPD, + instrux_VCMPGE_OSPD, + instrux_VCMPGEPD, + instrux_VCMPGT_OSPD, + instrux_VCMPGTPD, + instrux_VCMPTRUE_UQPD, + instrux_VCMPTRUEPD, + instrux_VCMPLT_OQPD, + instrux_VCMPLE_OQPD, + instrux_VCMPUNORD_SPD, + instrux_VCMPNEQ_USPD, + instrux_VCMPNLT_UQPD, + instrux_VCMPNLE_UQPD, + instrux_VCMPORD_SPD, + instrux_VCMPEQ_USPD, + instrux_VCMPNGE_UQPD, + instrux_VCMPNGT_UQPD, + instrux_VCMPFALSE_OSPD, + instrux_VCMPNEQ_OSPD, + instrux_VCMPGE_OQPD, + instrux_VCMPGT_OQPD, + instrux_VCMPTRUE_USPD, + instrux_VCMPPD, + instrux_VCMPEQ_OSPS, + instrux_VCMPEQPS, + instrux_VCMPLT_OSPS, + instrux_VCMPLTPS, + instrux_VCMPLE_OSPS, + instrux_VCMPLEPS, + instrux_VCMPUNORD_QPS, + instrux_VCMPUNORDPS, + instrux_VCMPNEQ_UQPS, + instrux_VCMPNEQPS, + instrux_VCMPNLT_USPS, + instrux_VCMPNLTPS, + instrux_VCMPNLE_USPS, + instrux_VCMPNLEPS, + instrux_VCMPORD_QPS, + instrux_VCMPORDPS, + instrux_VCMPEQ_UQPS, + instrux_VCMPNGE_USPS, + instrux_VCMPNGEPS, + instrux_VCMPNGT_USPS, + instrux_VCMPNGTPS, + instrux_VCMPFALSE_OQPS, + instrux_VCMPFALSEPS, + instrux_VCMPNEQ_OQPS, + instrux_VCMPGE_OSPS, + instrux_VCMPGEPS, + instrux_VCMPGT_OSPS, + instrux_VCMPGTPS, + instrux_VCMPTRUE_UQPS, + instrux_VCMPTRUEPS, + instrux_VCMPLT_OQPS, + instrux_VCMPLE_OQPS, + instrux_VCMPUNORD_SPS, + instrux_VCMPNEQ_USPS, + instrux_VCMPNLT_UQPS, + instrux_VCMPNLE_UQPS, + instrux_VCMPORD_SPS, + instrux_VCMPEQ_USPS, + instrux_VCMPNGE_UQPS, + instrux_VCMPNGT_UQPS, + instrux_VCMPFALSE_OSPS, + instrux_VCMPNEQ_OSPS, + instrux_VCMPGE_OQPS, + instrux_VCMPGT_OQPS, + instrux_VCMPTRUE_USPS, + instrux_VCMPPS, + instrux_VCMPEQ_OSSD, + instrux_VCMPEQSD, + instrux_VCMPLT_OSSD, + instrux_VCMPLTSD, + instrux_VCMPLE_OSSD, + instrux_VCMPLESD, + instrux_VCMPUNORD_QSD, + instrux_VCMPUNORDSD, + instrux_VCMPNEQ_UQSD, + instrux_VCMPNEQSD, + instrux_VCMPNLT_USSD, + instrux_VCMPNLTSD, + instrux_VCMPNLE_USSD, + instrux_VCMPNLESD, + instrux_VCMPORD_QSD, + instrux_VCMPORDSD, + instrux_VCMPEQ_UQSD, + instrux_VCMPNGE_USSD, + instrux_VCMPNGESD, + instrux_VCMPNGT_USSD, + instrux_VCMPNGTSD, + instrux_VCMPFALSE_OQSD, + instrux_VCMPFALSESD, + instrux_VCMPNEQ_OQSD, + instrux_VCMPGE_OSSD, + instrux_VCMPGESD, + instrux_VCMPGT_OSSD, + instrux_VCMPGTSD, + instrux_VCMPTRUE_UQSD, + instrux_VCMPTRUESD, + instrux_VCMPLT_OQSD, + instrux_VCMPLE_OQSD, + instrux_VCMPUNORD_SSD, + instrux_VCMPNEQ_USSD, + instrux_VCMPNLT_UQSD, + instrux_VCMPNLE_UQSD, + instrux_VCMPORD_SSD, + instrux_VCMPEQ_USSD, + instrux_VCMPNGE_UQSD, + instrux_VCMPNGT_UQSD, + instrux_VCMPFALSE_OSSD, + instrux_VCMPNEQ_OSSD, + instrux_VCMPGE_OQSD, + instrux_VCMPGT_OQSD, + instrux_VCMPTRUE_USSD, + instrux_VCMPSD, + instrux_VCMPEQ_OSSS, + instrux_VCMPEQSS, + instrux_VCMPLT_OSSS, + instrux_VCMPLTSS, + instrux_VCMPLE_OSSS, + instrux_VCMPLESS, + instrux_VCMPUNORD_QSS, + instrux_VCMPUNORDSS, + instrux_VCMPNEQ_UQSS, + instrux_VCMPNEQSS, + instrux_VCMPNLT_USSS, + instrux_VCMPNLTSS, + instrux_VCMPNLE_USSS, + instrux_VCMPNLESS, + instrux_VCMPORD_QSS, + instrux_VCMPORDSS, + instrux_VCMPEQ_UQSS, + instrux_VCMPNGE_USSS, + instrux_VCMPNGESS, + instrux_VCMPNGT_USSS, + instrux_VCMPNGTSS, + instrux_VCMPFALSE_OQSS, + instrux_VCMPFALSESS, + instrux_VCMPNEQ_OQSS, + instrux_VCMPGE_OSSS, + instrux_VCMPGESS, + instrux_VCMPGT_OSSS, + instrux_VCMPGTSS, + instrux_VCMPTRUE_UQSS, + instrux_VCMPTRUESS, + instrux_VCMPLT_OQSS, + instrux_VCMPLE_OQSS, + instrux_VCMPUNORD_SSS, + instrux_VCMPNEQ_USSS, + instrux_VCMPNLT_UQSS, + instrux_VCMPNLE_UQSS, + instrux_VCMPORD_SSS, + instrux_VCMPEQ_USSS, + instrux_VCMPNGE_UQSS, + instrux_VCMPNGT_UQSS, + instrux_VCMPFALSE_OSSS, + instrux_VCMPNEQ_OSSS, + instrux_VCMPGE_OQSS, + instrux_VCMPGT_OQSS, + instrux_VCMPTRUE_USSS, + instrux_VCMPSS, + instrux_VCOMISD, + instrux_VCOMISS, + instrux_VCVTDQ2PD, + instrux_VCVTDQ2PS, + instrux_VCVTPD2DQ, + instrux_VCVTPD2PS, + instrux_VCVTPS2DQ, + instrux_VCVTPS2PD, + instrux_VCVTSD2SI, + instrux_VCVTSD2SS, + instrux_VCVTSI2SD, + instrux_VCVTSI2SS, + instrux_VCVTSS2SD, + instrux_VCVTSS2SI, + instrux_VCVTTPD2DQ, + instrux_VCVTTPS2DQ, + instrux_VCVTTSD2SI, + instrux_VCVTTSS2SI, + instrux_VDIVPD, + instrux_VDIVPS, + instrux_VDIVSD, + instrux_VDIVSS, + instrux_VDPPD, + instrux_VDPPS, + instrux_VEXTRACTF128, + instrux_VEXTRACTPS, + instrux_VHADDPD, + instrux_VHADDPS, + instrux_VHSUBPD, + instrux_VHSUBPS, + instrux_VINSERTF128, + instrux_VINSERTPS, + instrux_VLDDQU, + instrux_VLDQQU, + instrux_VLDMXCSR, + instrux_VMASKMOVDQU, + instrux_VMASKMOVPS, + instrux_VMASKMOVPD, + instrux_VMAXPD, + instrux_VMAXPS, + instrux_VMAXSD, + instrux_VMAXSS, + instrux_VMINPD, + instrux_VMINPS, + instrux_VMINSD, + instrux_VMINSS, + instrux_VMOVAPD, + instrux_VMOVAPS, + instrux_VMOVD, + instrux_VMOVQ, + instrux_VMOVDDUP, + instrux_VMOVDQA, + instrux_VMOVQQA, + instrux_VMOVDQU, + instrux_VMOVQQU, + instrux_VMOVHLPS, + instrux_VMOVHPD, + instrux_VMOVHPS, + instrux_VMOVLHPS, + instrux_VMOVLPD, + instrux_VMOVLPS, + instrux_VMOVMSKPD, + instrux_VMOVMSKPS, + instrux_VMOVNTDQ, + instrux_VMOVNTQQ, + instrux_VMOVNTDQA, + instrux_VMOVNTPD, + instrux_VMOVNTPS, + instrux_VMOVSD, + instrux_VMOVSHDUP, + instrux_VMOVSLDUP, + instrux_VMOVSS, + instrux_VMOVUPD, + instrux_VMOVUPS, + instrux_VMPSADBW, + instrux_VMULPD, + instrux_VMULPS, + instrux_VMULSD, + instrux_VMULSS, + instrux_VORPD, + instrux_VORPS, + instrux_VPABSB, + instrux_VPABSW, + instrux_VPABSD, + instrux_VPACKSSWB, + instrux_VPACKSSDW, + instrux_VPACKUSWB, + instrux_VPACKUSDW, + instrux_VPADDB, + instrux_VPADDW, + instrux_VPADDD, + instrux_VPADDQ, + instrux_VPADDSB, + instrux_VPADDSW, + instrux_VPADDUSB, + instrux_VPADDUSW, + instrux_VPALIGNR, + instrux_VPAND, + instrux_VPANDN, + instrux_VPAVGB, + instrux_VPAVGW, + instrux_VPBLENDVB, + instrux_VPBLENDW, + instrux_VPCMPESTRI, + instrux_VPCMPESTRM, + instrux_VPCMPISTRI, + instrux_VPCMPISTRM, + instrux_VPCMPEQB, + instrux_VPCMPEQW, + instrux_VPCMPEQD, + instrux_VPCMPEQQ, + instrux_VPCMPGTB, + instrux_VPCMPGTW, + instrux_VPCMPGTD, + instrux_VPCMPGTQ, + instrux_VPERMILPD, + instrux_VPERMILPS, + instrux_VPERM2F128, + instrux_VPEXTRB, + instrux_VPEXTRW, + instrux_VPEXTRD, + instrux_VPEXTRQ, + instrux_VPHADDW, + instrux_VPHADDD, + instrux_VPHADDSW, + instrux_VPHMINPOSUW, + instrux_VPHSUBW, + instrux_VPHSUBD, + instrux_VPHSUBSW, + instrux_VPINSRB, + instrux_VPINSRW, + instrux_VPINSRD, + instrux_VPINSRQ, + instrux_VPMADDWD, + instrux_VPMADDUBSW, + instrux_VPMAXSB, + instrux_VPMAXSW, + instrux_VPMAXSD, + instrux_VPMAXUB, + instrux_VPMAXUW, + instrux_VPMAXUD, + instrux_VPMINSB, + instrux_VPMINSW, + instrux_VPMINSD, + instrux_VPMINUB, + instrux_VPMINUW, + instrux_VPMINUD, + instrux_VPMOVMSKB, + instrux_VPMOVSXBW, + instrux_VPMOVSXBD, + instrux_VPMOVSXBQ, + instrux_VPMOVSXWD, + instrux_VPMOVSXWQ, + instrux_VPMOVSXDQ, + instrux_VPMOVZXBW, + instrux_VPMOVZXBD, + instrux_VPMOVZXBQ, + instrux_VPMOVZXWD, + instrux_VPMOVZXWQ, + instrux_VPMOVZXDQ, + instrux_VPMULHUW, + instrux_VPMULHRSW, + instrux_VPMULHW, + instrux_VPMULLW, + instrux_VPMULLD, + instrux_VPMULUDQ, + instrux_VPMULDQ, + instrux_VPOR, + instrux_VPSADBW, + instrux_VPSHUFB, + instrux_VPSHUFD, + instrux_VPSHUFHW, + instrux_VPSHUFLW, + instrux_VPSIGNB, + instrux_VPSIGNW, + instrux_VPSIGND, + instrux_VPSLLDQ, + instrux_VPSRLDQ, + instrux_VPSLLW, + instrux_VPSLLD, + instrux_VPSLLQ, + instrux_VPSRAW, + instrux_VPSRAD, + instrux_VPSRLW, + instrux_VPSRLD, + instrux_VPSRLQ, + instrux_VPTEST, + instrux_VPSUBB, + instrux_VPSUBW, + instrux_VPSUBD, + instrux_VPSUBQ, + instrux_VPSUBSB, + instrux_VPSUBSW, + instrux_VPSUBUSB, + instrux_VPSUBUSW, + instrux_VPUNPCKHBW, + instrux_VPUNPCKHWD, + instrux_VPUNPCKHDQ, + instrux_VPUNPCKHQDQ, + instrux_VPUNPCKLBW, + instrux_VPUNPCKLWD, + instrux_VPUNPCKLDQ, + instrux_VPUNPCKLQDQ, + instrux_VPXOR, + instrux_VRCPPS, + instrux_VRCPSS, + instrux_VRSQRTPS, + instrux_VRSQRTSS, + instrux_VROUNDPD, + instrux_VROUNDPS, + instrux_VROUNDSD, + instrux_VROUNDSS, + instrux_VSHUFPD, + instrux_VSHUFPS, + instrux_VSQRTPD, + instrux_VSQRTPS, + instrux_VSQRTSD, + instrux_VSQRTSS, + instrux_VSTMXCSR, + instrux_VSUBPD, + instrux_VSUBPS, + instrux_VSUBSD, + instrux_VSUBSS, + instrux_VTESTPS, + instrux_VTESTPD, + instrux_VUCOMISD, + instrux_VUCOMISS, + instrux_VUNPCKHPD, + instrux_VUNPCKHPS, + instrux_VUNPCKLPD, + instrux_VUNPCKLPS, + instrux_VXORPD, + instrux_VXORPS, + instrux_VZEROALL, + instrux_VZEROUPPER, + instrux_PCLMULLQLQDQ, + instrux_PCLMULHQLQDQ, + instrux_PCLMULLQHQDQ, + instrux_PCLMULHQHQDQ, + instrux_PCLMULQDQ, + instrux_VPCLMULLQLQDQ, + instrux_VPCLMULHQLQDQ, + instrux_VPCLMULLQHQDQ, + instrux_VPCLMULHQHQDQ, + instrux_VPCLMULQDQ, + instrux_VFMADD132PS, + instrux_VFMADD132PD, + instrux_VFMADD312PS, + instrux_VFMADD312PD, + instrux_VFMADD213PS, + instrux_VFMADD213PD, + instrux_VFMADD123PS, + instrux_VFMADD123PD, + instrux_VFMADD231PS, + instrux_VFMADD231PD, + instrux_VFMADD321PS, + instrux_VFMADD321PD, + instrux_VFMADDSUB132PS, + instrux_VFMADDSUB132PD, + instrux_VFMADDSUB312PS, + instrux_VFMADDSUB312PD, + instrux_VFMADDSUB213PS, + instrux_VFMADDSUB213PD, + instrux_VFMADDSUB123PS, + instrux_VFMADDSUB123PD, + instrux_VFMADDSUB231PS, + instrux_VFMADDSUB231PD, + instrux_VFMADDSUB321PS, + instrux_VFMADDSUB321PD, + instrux_VFMSUB132PS, + instrux_VFMSUB132PD, + instrux_VFMSUB312PS, + instrux_VFMSUB312PD, + instrux_VFMSUB213PS, + instrux_VFMSUB213PD, + instrux_VFMSUB123PS, + instrux_VFMSUB123PD, + instrux_VFMSUB231PS, + instrux_VFMSUB231PD, + instrux_VFMSUB321PS, + instrux_VFMSUB321PD, + instrux_VFMSUBADD132PS, + instrux_VFMSUBADD132PD, + instrux_VFMSUBADD312PS, + instrux_VFMSUBADD312PD, + instrux_VFMSUBADD213PS, + instrux_VFMSUBADD213PD, + instrux_VFMSUBADD123PS, + instrux_VFMSUBADD123PD, + instrux_VFMSUBADD231PS, + instrux_VFMSUBADD231PD, + instrux_VFMSUBADD321PS, + instrux_VFMSUBADD321PD, + instrux_VFNMADD132PS, + instrux_VFNMADD132PD, + instrux_VFNMADD312PS, + instrux_VFNMADD312PD, + instrux_VFNMADD213PS, + instrux_VFNMADD213PD, + instrux_VFNMADD123PS, + instrux_VFNMADD123PD, + instrux_VFNMADD231PS, + instrux_VFNMADD231PD, + instrux_VFNMADD321PS, + instrux_VFNMADD321PD, + instrux_VFNMSUB132PS, + instrux_VFNMSUB132PD, + instrux_VFNMSUB312PS, + instrux_VFNMSUB312PD, + instrux_VFNMSUB213PS, + instrux_VFNMSUB213PD, + instrux_VFNMSUB123PS, + instrux_VFNMSUB123PD, + instrux_VFNMSUB231PS, + instrux_VFNMSUB231PD, + instrux_VFNMSUB321PS, + instrux_VFNMSUB321PD, + instrux_VFMADD132SS, + instrux_VFMADD132SD, + instrux_VFMADD312SS, + instrux_VFMADD312SD, + instrux_VFMADD213SS, + instrux_VFMADD213SD, + instrux_VFMADD123SS, + instrux_VFMADD123SD, + instrux_VFMADD231SS, + instrux_VFMADD231SD, + instrux_VFMADD321SS, + instrux_VFMADD321SD, + instrux_VFMSUB132SS, + instrux_VFMSUB132SD, + instrux_VFMSUB312SS, + instrux_VFMSUB312SD, + instrux_VFMSUB213SS, + instrux_VFMSUB213SD, + instrux_VFMSUB123SS, + instrux_VFMSUB123SD, + instrux_VFMSUB231SS, + instrux_VFMSUB231SD, + instrux_VFMSUB321SS, + instrux_VFMSUB321SD, + instrux_VFNMADD132SS, + instrux_VFNMADD132SD, + instrux_VFNMADD312SS, + instrux_VFNMADD312SD, + instrux_VFNMADD213SS, + instrux_VFNMADD213SD, + instrux_VFNMADD123SS, + instrux_VFNMADD123SD, + instrux_VFNMADD231SS, + instrux_VFNMADD231SD, + instrux_VFNMADD321SS, + instrux_VFNMADD321SD, + instrux_VFNMSUB132SS, + instrux_VFNMSUB132SD, + instrux_VFNMSUB312SS, + instrux_VFNMSUB312SD, + instrux_VFNMSUB213SS, + instrux_VFNMSUB213SD, + instrux_VFNMSUB123SS, + instrux_VFNMSUB123SD, + instrux_VFNMSUB231SS, + instrux_VFNMSUB231SD, + instrux_VFNMSUB321SS, + instrux_VFNMSUB321SD, + instrux_RDFSBASE, + instrux_RDGSBASE, + instrux_RDRAND, + instrux_WRFSBASE, + instrux_WRGSBASE, + instrux_VCVTPH2PS, + instrux_VCVTPS2PH, + instrux_ADCX, + instrux_ADOX, + instrux_RDSEED, + instrux_CLAC, + instrux_STAC, + instrux_XSTORE, + instrux_XCRYPTECB, + instrux_XCRYPTCBC, + instrux_XCRYPTCTR, + instrux_XCRYPTCFB, + instrux_XCRYPTOFB, + instrux_MONTMUL, + instrux_XSHA1, + instrux_XSHA256, + instrux_LLWPCB, + instrux_SLWPCB, + instrux_LWPVAL, + instrux_LWPINS, + instrux_VFMADDPD, + instrux_VFMADDPS, + instrux_VFMADDSD, + instrux_VFMADDSS, + instrux_VFMADDSUBPD, + instrux_VFMADDSUBPS, + instrux_VFMSUBADDPD, + instrux_VFMSUBADDPS, + instrux_VFMSUBPD, + instrux_VFMSUBPS, + instrux_VFMSUBSD, + instrux_VFMSUBSS, + instrux_VFNMADDPD, + instrux_VFNMADDPS, + instrux_VFNMADDSD, + instrux_VFNMADDSS, + instrux_VFNMSUBPD, + instrux_VFNMSUBPS, + instrux_VFNMSUBSD, + instrux_VFNMSUBSS, + instrux_VFRCZPD, + instrux_VFRCZPS, + instrux_VFRCZSD, + instrux_VFRCZSS, + instrux_VPCMOV, + instrux_VPCOMB, + instrux_VPCOMD, + instrux_VPCOMQ, + instrux_VPCOMUB, + instrux_VPCOMUD, + instrux_VPCOMUQ, + instrux_VPCOMUW, + instrux_VPCOMW, + instrux_VPHADDBD, + instrux_VPHADDBQ, + instrux_VPHADDBW, + instrux_VPHADDDQ, + instrux_VPHADDUBD, + instrux_VPHADDUBQ, + instrux_VPHADDUBW, + instrux_VPHADDUDQ, + instrux_VPHADDUWD, + instrux_VPHADDUWQ, + instrux_VPHADDWD, + instrux_VPHADDWQ, + instrux_VPHSUBBW, + instrux_VPHSUBDQ, + instrux_VPHSUBWD, + instrux_VPMACSDD, + instrux_VPMACSDQH, + instrux_VPMACSDQL, + instrux_VPMACSSDD, + instrux_VPMACSSDQH, + instrux_VPMACSSDQL, + instrux_VPMACSSWD, + instrux_VPMACSSWW, + instrux_VPMACSWD, + instrux_VPMACSWW, + instrux_VPMADCSSWD, + instrux_VPMADCSWD, + instrux_VPPERM, + instrux_VPROTB, + instrux_VPROTD, + instrux_VPROTQ, + instrux_VPROTW, + instrux_VPSHAB, + instrux_VPSHAD, + instrux_VPSHAQ, + instrux_VPSHAW, + instrux_VPSHLB, + instrux_VPSHLD, + instrux_VPSHLQ, + instrux_VPSHLW, + instrux_VBROADCASTI128, + instrux_VPBLENDD, + instrux_VPBROADCASTB, + instrux_VPBROADCASTW, + instrux_VPBROADCASTD, + instrux_VPBROADCASTQ, + instrux_VPERMD, + instrux_VPERMPD, + instrux_VPERMPS, + instrux_VPERMQ, + instrux_VPERM2I128, + instrux_VEXTRACTI128, + instrux_VINSERTI128, + instrux_VPMASKMOVD, + instrux_VPMASKMOVQ, + instrux_VPSLLVD, + instrux_VPSLLVQ, + instrux_VPSRAVD, + instrux_VPSRLVD, + instrux_VPSRLVQ, + instrux_VGATHERDPD, + instrux_VGATHERQPD, + instrux_VGATHERDPS, + instrux_VGATHERQPS, + instrux_VPGATHERDD, + instrux_VPGATHERQD, + instrux_VPGATHERDQ, + instrux_VPGATHERQQ, + instrux_XABORT, + instrux_XBEGIN, + instrux_XEND, + instrux_XTEST, + instrux_ANDN, + instrux_BEXTR, + instrux_BLCI, + instrux_BLCIC, + instrux_BLSI, + instrux_BLSIC, + instrux_BLCFILL, + instrux_BLSFILL, + instrux_BLCMSK, + instrux_BLSMSK, + instrux_BLSR, + instrux_BLCS, + instrux_BZHI, + instrux_MULX, + instrux_PDEP, + instrux_PEXT, + instrux_RORX, + instrux_SARX, + instrux_SHLX, + instrux_SHRX, + instrux_TZCNT, + instrux_TZMSK, + instrux_T1MSKC, + instrux_PREFETCHWT1, + instrux_BNDMK, + instrux_BNDCL, + instrux_BNDCU, + instrux_BNDCN, + instrux_BNDMOV, + instrux_BNDLDX, + instrux_BNDSTX, + instrux_SHA1MSG1, + instrux_SHA1MSG2, + instrux_SHA1NEXTE, + instrux_SHA1RNDS4, + instrux_SHA256MSG1, + instrux_SHA256MSG2, + instrux_SHA256RNDS2, + instrux_VBCSTNEBF16PS, + instrux_VBCSTNESH2PS, + instrux_VCVTNEEBF162PS, + instrux_VCVTNEEPH2PS, + instrux_VCVTNEOBF162PS, + instrux_VCVTNEOPH2PS, + instrux_VCVTNEPS2BF16, + instrux_VPDPBSSD, + instrux_VPDPBSSDS, + instrux_VPDPBSUD, + instrux_VPDPBSUDS, + instrux_VPDPBUUD, + instrux_VPDPBUUDS, + instrux_VPMADD52HUQ, + instrux_VPMADD52LUQ, + instrux_KADDB, + instrux_KADDD, + instrux_KADDQ, + instrux_KADDW, + instrux_KANDB, + instrux_KANDD, + instrux_KANDNB, + instrux_KANDND, + instrux_KANDNQ, + instrux_KANDNW, + instrux_KANDQ, + instrux_KANDW, + instrux_KMOVB, + instrux_KMOVD, + instrux_KMOVQ, + instrux_KMOVW, + instrux_KNOTB, + instrux_KNOTD, + instrux_KNOTQ, + instrux_KNOTW, + instrux_KORB, + instrux_KORD, + instrux_KORQ, + instrux_KORW, + instrux_KORTESTB, + instrux_KORTESTD, + instrux_KORTESTQ, + instrux_KORTESTW, + instrux_KSHIFTLB, + instrux_KSHIFTLD, + instrux_KSHIFTLQ, + instrux_KSHIFTLW, + instrux_KSHIFTRB, + instrux_KSHIFTRD, + instrux_KSHIFTRQ, + instrux_KSHIFTRW, + instrux_KTESTB, + instrux_KTESTD, + instrux_KTESTQ, + instrux_KTESTW, + instrux_KUNPCKBW, + instrux_KUNPCKDQ, + instrux_KUNPCKWD, + instrux_KXNORB, + instrux_KXNORD, + instrux_KXNORQ, + instrux_KXNORW, + instrux_KXORB, + instrux_KXORD, + instrux_KXORQ, + instrux_KXORW, + instrux_KADD, + instrux_KAND, + instrux_KANDN, + instrux_KMOV, + instrux_KNOT, + instrux_KOR, + instrux_KORTEST, + instrux_KSHIFTL, + instrux_KSHIFTR, + instrux_KTEST, + instrux_KUNPCK, + instrux_KXNOR, + instrux_KXOR, + instrux_VALIGND, + instrux_VALIGNQ, + instrux_VBLENDMPD, + instrux_VBLENDMPS, + instrux_VBROADCASTF32X2, + instrux_VBROADCASTF32X4, + instrux_VBROADCASTF32X8, + instrux_VBROADCASTF64X2, + instrux_VBROADCASTF64X4, + instrux_VBROADCASTI32X2, + instrux_VBROADCASTI32X4, + instrux_VBROADCASTI32X8, + instrux_VBROADCASTI64X2, + instrux_VBROADCASTI64X4, + instrux_VCMPEQ_OQPD, + instrux_VCMPEQ_OQPS, + instrux_VCMPEQ_OQSD, + instrux_VCMPEQ_OQSS, + instrux_VCOMPRESSPD, + instrux_VCOMPRESSPS, + instrux_VCVTPD2QQ, + instrux_VCVTPD2UDQ, + instrux_VCVTPD2UQQ, + instrux_VCVTPS2QQ, + instrux_VCVTPS2UDQ, + instrux_VCVTPS2UQQ, + instrux_VCVTQQ2PD, + instrux_VCVTQQ2PS, + instrux_VCVTSD2USI, + instrux_VCVTSS2USI, + instrux_VCVTTPD2QQ, + instrux_VCVTTPD2UDQ, + instrux_VCVTTPD2UQQ, + instrux_VCVTTPS2QQ, + instrux_VCVTTPS2UDQ, + instrux_VCVTTPS2UQQ, + instrux_VCVTTSD2USI, + instrux_VCVTTSS2USI, + instrux_VCVTUDQ2PD, + instrux_VCVTUDQ2PS, + instrux_VCVTUQQ2PD, + instrux_VCVTUQQ2PS, + instrux_VCVTUSI2SD, + instrux_VCVTUSI2SS, + instrux_VDBPSADBW, + instrux_VEXP2PD, + instrux_VEXP2PS, + instrux_VEXPANDPD, + instrux_VEXPANDPS, + instrux_VEXTRACTF32X4, + instrux_VEXTRACTF32X8, + instrux_VEXTRACTF64X2, + instrux_VEXTRACTF64X4, + instrux_VEXTRACTI32X4, + instrux_VEXTRACTI32X8, + instrux_VEXTRACTI64X2, + instrux_VEXTRACTI64X4, + instrux_VFIXUPIMMPD, + instrux_VFIXUPIMMPS, + instrux_VFIXUPIMMSD, + instrux_VFIXUPIMMSS, + instrux_VFPCLASSPD, + instrux_VFPCLASSPS, + instrux_VFPCLASSSD, + instrux_VFPCLASSSS, + instrux_VGATHERPF0DPD, + instrux_VGATHERPF0DPS, + instrux_VGATHERPF0QPD, + instrux_VGATHERPF0QPS, + instrux_VGATHERPF1DPD, + instrux_VGATHERPF1DPS, + instrux_VGATHERPF1QPD, + instrux_VGATHERPF1QPS, + instrux_VGETEXPPD, + instrux_VGETEXPPS, + instrux_VGETEXPSD, + instrux_VGETEXPSS, + instrux_VGETMANTPD, + instrux_VGETMANTPS, + instrux_VGETMANTSD, + instrux_VGETMANTSS, + instrux_VINSERTF32X4, + instrux_VINSERTF32X8, + instrux_VINSERTF64X2, + instrux_VINSERTF64X4, + instrux_VINSERTI32X4, + instrux_VINSERTI32X8, + instrux_VINSERTI64X2, + instrux_VINSERTI64X4, + instrux_VMOVDQA32, + instrux_VMOVDQA64, + instrux_VMOVDQU16, + instrux_VMOVDQU32, + instrux_VMOVDQU64, + instrux_VMOVDQU8, + instrux_VPABSQ, + instrux_VPANDD, + instrux_VPANDND, + instrux_VPANDNQ, + instrux_VPANDQ, + instrux_VPBLENDMB, + instrux_VPBLENDMD, + instrux_VPBLENDMQ, + instrux_VPBLENDMW, + instrux_VPBROADCASTMB2Q, + instrux_VPBROADCASTMW2D, + instrux_VPCMPEQUB, + instrux_VPCMPEQUD, + instrux_VPCMPEQUQ, + instrux_VPCMPEQUW, + instrux_VPCMPGEB, + instrux_VPCMPGED, + instrux_VPCMPGEQ, + instrux_VPCMPGEUB, + instrux_VPCMPGEUD, + instrux_VPCMPGEUQ, + instrux_VPCMPGEUW, + instrux_VPCMPGEW, + instrux_VPCMPGTUB, + instrux_VPCMPGTUD, + instrux_VPCMPGTUQ, + instrux_VPCMPGTUW, + instrux_VPCMPLEB, + instrux_VPCMPLED, + instrux_VPCMPLEQ, + instrux_VPCMPLEUB, + instrux_VPCMPLEUD, + instrux_VPCMPLEUQ, + instrux_VPCMPLEUW, + instrux_VPCMPLEW, + instrux_VPCMPLTB, + instrux_VPCMPLTD, + instrux_VPCMPLTQ, + instrux_VPCMPLTUB, + instrux_VPCMPLTUD, + instrux_VPCMPLTUQ, + instrux_VPCMPLTUW, + instrux_VPCMPLTW, + instrux_VPCMPNEQB, + instrux_VPCMPNEQD, + instrux_VPCMPNEQQ, + instrux_VPCMPNEQUB, + instrux_VPCMPNEQUD, + instrux_VPCMPNEQUQ, + instrux_VPCMPNEQUW, + instrux_VPCMPNEQW, + instrux_VPCMPNGTB, + instrux_VPCMPNGTD, + instrux_VPCMPNGTQ, + instrux_VPCMPNGTUB, + instrux_VPCMPNGTUD, + instrux_VPCMPNGTUQ, + instrux_VPCMPNGTUW, + instrux_VPCMPNGTW, + instrux_VPCMPNLEB, + instrux_VPCMPNLED, + instrux_VPCMPNLEQ, + instrux_VPCMPNLEUB, + instrux_VPCMPNLEUD, + instrux_VPCMPNLEUQ, + instrux_VPCMPNLEUW, + instrux_VPCMPNLEW, + instrux_VPCMPNLTB, + instrux_VPCMPNLTD, + instrux_VPCMPNLTQ, + instrux_VPCMPNLTUB, + instrux_VPCMPNLTUD, + instrux_VPCMPNLTUQ, + instrux_VPCMPNLTUW, + instrux_VPCMPNLTW, + instrux_VPCMPB, + instrux_VPCMPD, + instrux_VPCMPQ, + instrux_VPCMPUB, + instrux_VPCMPUD, + instrux_VPCMPUQ, + instrux_VPCMPUW, + instrux_VPCMPW, + instrux_VPCOMPRESSD, + instrux_VPCOMPRESSQ, + instrux_VPCONFLICTD, + instrux_VPCONFLICTQ, + instrux_VPERMB, + instrux_VPERMI2B, + instrux_VPERMI2D, + instrux_VPERMI2PD, + instrux_VPERMI2PS, + instrux_VPERMI2Q, + instrux_VPERMI2W, + instrux_VPERMT2B, + instrux_VPERMT2D, + instrux_VPERMT2PD, + instrux_VPERMT2PS, + instrux_VPERMT2Q, + instrux_VPERMT2W, + instrux_VPERMW, + instrux_VPEXPANDD, + instrux_VPEXPANDQ, + instrux_VPLZCNTD, + instrux_VPLZCNTQ, + instrux_VPMAXSQ, + instrux_VPMAXUQ, + instrux_VPMINSQ, + instrux_VPMINUQ, + instrux_VPMOVB2M, + instrux_VPMOVD2M, + instrux_VPMOVDB, + instrux_VPMOVDW, + instrux_VPMOVM2B, + instrux_VPMOVM2D, + instrux_VPMOVM2Q, + instrux_VPMOVM2W, + instrux_VPMOVQ2M, + instrux_VPMOVQB, + instrux_VPMOVQD, + instrux_VPMOVQW, + instrux_VPMOVSDB, + instrux_VPMOVSDW, + instrux_VPMOVSQB, + instrux_VPMOVSQD, + instrux_VPMOVSQW, + instrux_VPMOVSWB, + instrux_VPMOVUSDB, + instrux_VPMOVUSDW, + instrux_VPMOVUSQB, + instrux_VPMOVUSQD, + instrux_VPMOVUSQW, + instrux_VPMOVUSWB, + instrux_VPMOVW2M, + instrux_VPMOVWB, + instrux_VPMULLQ, + instrux_VPMULTISHIFTQB, + instrux_VPORD, + instrux_VPORQ, + instrux_VPROLD, + instrux_VPROLQ, + instrux_VPROLVD, + instrux_VPROLVQ, + instrux_VPRORD, + instrux_VPRORQ, + instrux_VPRORVD, + instrux_VPRORVQ, + instrux_VPSCATTERDD, + instrux_VPSCATTERDQ, + instrux_VPSCATTERQD, + instrux_VPSCATTERQQ, + instrux_VPSLLVW, + instrux_VPSRAQ, + instrux_VPSRAVQ, + instrux_VPSRAVW, + instrux_VPSRLVW, + instrux_VPTERNLOGD, + instrux_VPTERNLOGQ, + instrux_VPTESTMB, + instrux_VPTESTMD, + instrux_VPTESTMQ, + instrux_VPTESTMW, + instrux_VPTESTNMB, + instrux_VPTESTNMD, + instrux_VPTESTNMQ, + instrux_VPTESTNMW, + instrux_VPXORD, + instrux_VPXORQ, + instrux_VRANGEPD, + instrux_VRANGEPS, + instrux_VRANGESD, + instrux_VRANGESS, + instrux_VRCP14PD, + instrux_VRCP14PS, + instrux_VRCP14SD, + instrux_VRCP14SS, + instrux_VRCP28PD, + instrux_VRCP28PS, + instrux_VRCP28SD, + instrux_VRCP28SS, + instrux_VREDUCEPD, + instrux_VREDUCEPS, + instrux_VREDUCESD, + instrux_VREDUCESS, + instrux_VRNDSCALEPD, + instrux_VRNDSCALEPS, + instrux_VRNDSCALESD, + instrux_VRNDSCALESS, + instrux_VRSQRT14PD, + instrux_VRSQRT14PS, + instrux_VRSQRT14SD, + instrux_VRSQRT14SS, + instrux_VRSQRT28PD, + instrux_VRSQRT28PS, + instrux_VRSQRT28SD, + instrux_VRSQRT28SS, + instrux_VSCALEFPD, + instrux_VSCALEFPS, + instrux_VSCALEFSD, + instrux_VSCALEFSS, + instrux_VSCATTERDPD, + instrux_VSCATTERDPS, + instrux_VSCATTERPF0DPD, + instrux_VSCATTERPF0DPS, + instrux_VSCATTERPF0QPD, + instrux_VSCATTERPF0QPS, + instrux_VSCATTERPF1DPD, + instrux_VSCATTERPF1DPS, + instrux_VSCATTERPF1QPD, + instrux_VSCATTERPF1QPS, + instrux_VSCATTERQPD, + instrux_VSCATTERQPS, + instrux_VSHUFF32X4, + instrux_VSHUFF64X2, + instrux_VSHUFI32X4, + instrux_VSHUFI64X2, + instrux_RDPKRU, + instrux_WRPKRU, + instrux_RDPID, + instrux_CLFLUSHOPT, + instrux_CLWB, + instrux_PCOMMIT, + instrux_CLZERO, + instrux_PTWRITE, + instrux_CLDEMOTE, + instrux_MOVDIRI, + instrux_MOVDIR64B, + instrux_PCONFIG, + instrux_TPAUSE, + instrux_UMONITOR, + instrux_UMWAIT, + instrux_WBNOINVD, + instrux_GF2P8AFFINEINVQB, + instrux_VGF2P8AFFINEINVQB, + instrux_GF2P8AFFINEQB, + instrux_VGF2P8AFFINEQB, + instrux_GF2P8MULB, + instrux_VGF2P8MULB, + instrux_VPCOMPRESSB, + instrux_VPCOMPRESSW, + instrux_VPEXPANDB, + instrux_VPEXPANDW, + instrux_VPSHLDW, + instrux_VPSHLDD, + instrux_VPSHLDQ, + instrux_VPSHLDVW, + instrux_VPSHLDVD, + instrux_VPSHLDVQ, + instrux_VPSHRDW, + instrux_VPSHRDD, + instrux_VPSHRDQ, + instrux_VPSHRDVW, + instrux_VPSHRDVD, + instrux_VPSHRDVQ, + instrux_VPDPBUSD, + instrux_VPDPBUSDS, + instrux_VPDPWSSD, + instrux_VPDPWSSDS, + instrux_VPOPCNTB, + instrux_VPOPCNTW, + instrux_VPOPCNTD, + instrux_VPOPCNTQ, + instrux_VPSHUFBITQMB, + instrux_V4FMADDPS, + instrux_V4FNMADDPS, + instrux_V4FMADDSS, + instrux_V4FNMADDSS, + instrux_V4DPWSSDS, + instrux_V4DPWSSD, + instrux_ENCLS, + instrux_ENCLU, + instrux_ENCLV, + instrux_CLRSSBSY, + instrux_ENDBR32, + instrux_ENDBR64, + instrux_INCSSPD, + instrux_INCSSPQ, + instrux_RDSSPD, + instrux_RDSSPQ, + instrux_RSTORSSP, + instrux_SAVEPREVSSP, + instrux_SETSSBSY, + instrux_WRUSSD, + instrux_WRUSSQ, + instrux_WRSSD, + instrux_WRSSQ, + instrux_ENQCMD, + instrux_ENQCMDS, + instrux_SERIALIZE, + instrux_XRESLDTRK, + instrux_XSUSLDTRK, + instrux_VCVTNE2PS2BF16, + instrux_VDPBF16PS, + instrux_VP2INTERSECTD, + instrux_LDTILECFG, + instrux_STTILECFG, + instrux_TDPBF16PS, + instrux_TDPBSSD, + instrux_TDPBSUD, + instrux_TDPBUSD, + instrux_TDPBUUD, + instrux_TILELOADD, + instrux_TILELOADDT1, + instrux_TILERELEASE, + instrux_TILESTORED, + instrux_TILEZERO, + instrux_VADDPH, + instrux_VADDSH, + instrux_VCMPPH, + instrux_VCMPSH, + instrux_VCOMISH, + instrux_VCVTDQ2PH, + instrux_VCVTPD2PH, + instrux_VCVTPH2DQ, + instrux_VCVTPH2PD, + instrux_VCVTPH2PSX, + instrux_VCVTPH2QQ, + instrux_VCVTPH2UDQ, + instrux_VCVTPH2UQQ, + instrux_VCVTPH2UW, + instrux_VCVTPH2W, + instrux_VCVTQQ2PH, + instrux_VCVTSD2SH, + instrux_VCVTSH2SD, + instrux_VCVTSH2SI, + instrux_VCVTSH2SS, + instrux_VCVTSH2USI, + instrux_VCVTSI2SH, + instrux_VCVTSS2SH, + instrux_VCVTTPH2DQ, + instrux_VCVTTPH2QQ, + instrux_VCVTTPH2UDQ, + instrux_VCVTTPH2UQQ, + instrux_VCVTTPH2UW, + instrux_VCVTTPH2W, + instrux_VCVTTSH2SI, + instrux_VCVTTSH2USI, + instrux_VCVTUDQ2PH, + instrux_VCVTUQQ2PH, + instrux_VCVTUSI2SH, + instrux_VCVTUW2PH, + instrux_VCVTW2PH, + instrux_VDIVPH, + instrux_VDIVSH, + instrux_VFCMADDCPH, + instrux_VFMADDCPH, + instrux_VFCMADDCSH, + instrux_VFMADDCSH, + instrux_VFCMULCPCH, + instrux_VFMULCPCH, + instrux_VFCMULCSH, + instrux_VFMULCSH, + instrux_VFMADDSUB132PH, + instrux_VFMADDSUB213PH, + instrux_VFMADDSUB231PH, + instrux_VFMSUBADD132PH, + instrux_VFMSUBADD213PH, + instrux_VFMSUBADD231PH, + instrux_VPMADD132PH, + instrux_VPMADD213PH, + instrux_VPMADD231PH, + instrux_VFMADD132PH, + instrux_VFMADD213PH, + instrux_VFMADD231PH, + instrux_VPMADD132SH, + instrux_VPMADD213SH, + instrux_VPMADD231SH, + instrux_VPNMADD132SH, + instrux_VPNMADD213SH, + instrux_VPNMADD231SH, + instrux_VPMSUB132PH, + instrux_VPMSUB213PH, + instrux_VPMSUB231PH, + instrux_VFMSUB132PH, + instrux_VFMSUB213PH, + instrux_VFMSUB231PH, + instrux_VPMSUB132SH, + instrux_VPMSUB213SH, + instrux_VPMSUB231SH, + instrux_VPNMSUB132SH, + instrux_VPNMSUB213SH, + instrux_VPNMSUB231SH, + instrux_VFPCLASSPH, + instrux_VFPCLASSSH, + instrux_VGETEXPPH, + instrux_VGETEXPSH, + instrux_VGETMANTPH, + instrux_VGETMANTSH, + instrux_VGETMAXPH, + instrux_VGETMAXSH, + instrux_VGETMINPH, + instrux_VGETMINSH, + instrux_VMOVSH, + instrux_VMOVW, + instrux_VMULPH, + instrux_VMULSH, + instrux_VRCPPH, + instrux_VRCPSH, + instrux_VREDUCEPH, + instrux_VREDUCESH, + instrux_VENDSCALEPH, + instrux_VENDSCALESH, + instrux_VRSQRTPH, + instrux_VRSQRTSH, + instrux_VSCALEFPH, + instrux_VSCALEFSH, + instrux_VSQRTPH, + instrux_VSQRTSH, + instrux_VSUBPH, + instrux_VSUBSH, + instrux_VUCOMISH, + instrux_AADD, + instrux_AAND, + instrux_AXOR, + instrux_CLUI, + instrux_SENDUIPI, + instrux_STUI, + instrux_TESTUI, + instrux_UIRET, + instrux_CMPAXADD, + instrux_CMPAEXADD, + instrux_CMPBXADD, + instrux_CMPBEXADD, + instrux_CMPCXADD, + instrux_CMPEXADD, + instrux_CMPGXADD, + instrux_CMPGEXADD, + instrux_CMPLXADD, + instrux_CMPLEXADD, + instrux_CMPNAXADD, + instrux_CMPNAEXADD, + instrux_CMPNBXADD, + instrux_CMPNBEXADD, + instrux_CMPNCXADD, + instrux_CMPNEXADD, + instrux_CMPNGXADD, + instrux_CMPNGEXADD, + instrux_CMPNLXADD, + instrux_CMPNLEXADD, + instrux_CMPNOXADD, + instrux_CMPNPXADD, + instrux_CMPNSXADD, + instrux_CMPNZXADD, + instrux_CMPOXADD, + instrux_CMPPXADD, + instrux_CMPPEXADD, + instrux_CMPPOXADD, + instrux_CMPSXADD, + instrux_CMPZXADD, + instrux_WRMSRNS, + instrux_RDMSRLIST, + instrux_WRMSRLIST, + instrux_HRESET, + instrux_HINT_NOP0, + instrux_HINT_NOP1, + instrux_HINT_NOP2, + instrux_HINT_NOP3, + instrux_HINT_NOP4, + instrux_HINT_NOP5, + instrux_HINT_NOP6, + instrux_HINT_NOP7, + instrux_HINT_NOP8, + instrux_HINT_NOP9, + instrux_HINT_NOP10, + instrux_HINT_NOP11, + instrux_HINT_NOP12, + instrux_HINT_NOP13, + instrux_HINT_NOP14, + instrux_HINT_NOP15, + instrux_HINT_NOP16, + instrux_HINT_NOP17, + instrux_HINT_NOP18, + instrux_HINT_NOP19, + instrux_HINT_NOP20, + instrux_HINT_NOP21, + instrux_HINT_NOP22, + instrux_HINT_NOP23, + instrux_HINT_NOP24, + instrux_HINT_NOP25, + instrux_HINT_NOP26, + instrux_HINT_NOP27, + instrux_HINT_NOP28, + instrux_HINT_NOP29, + instrux_HINT_NOP30, + instrux_HINT_NOP31, + instrux_HINT_NOP32, + instrux_HINT_NOP33, + instrux_HINT_NOP34, + instrux_HINT_NOP35, + instrux_HINT_NOP36, + instrux_HINT_NOP37, + instrux_HINT_NOP38, + instrux_HINT_NOP39, + instrux_HINT_NOP40, + instrux_HINT_NOP41, + instrux_HINT_NOP42, + instrux_HINT_NOP43, + instrux_HINT_NOP44, + instrux_HINT_NOP45, + instrux_HINT_NOP46, + instrux_HINT_NOP47, + instrux_HINT_NOP48, + instrux_HINT_NOP49, + instrux_HINT_NOP50, + instrux_HINT_NOP51, + instrux_HINT_NOP52, + instrux_HINT_NOP53, + instrux_HINT_NOP54, + instrux_HINT_NOP55, + instrux_HINT_NOP56, + instrux_HINT_NOP57, + instrux_HINT_NOP58, + instrux_HINT_NOP59, + instrux_HINT_NOP60, + instrux_HINT_NOP61, + instrux_HINT_NOP62, + instrux_HINT_NOP63, +}; |